r300-gallium, radeon-gallium: Nuke gb_pipes from orbit.
[mesa.git] / src / gallium / drivers / r300 / r300_chipset.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "r300_chipset.h"
24 #include "util/u_debug.h"
25
26 /* r300_chipset: A file all to itself for deducing the various properties of
27 * Radeons. */
28
29 /* Parse a PCI ID and fill an r300_capabilities struct with information. */
30 void r300_parse_chipset(struct r300_capabilities* caps)
31 {
32 /* Reasonable defaults */
33 caps->has_tcl = getenv("RADEON_NO_TCL") ? FALSE : TRUE;
34 caps->is_r500 = FALSE;
35 caps->num_vert_fpus = 4;
36
37 /* Note: These are not ordered by PCI ID. I leave that task to GCC,
38 * which will perform the ordering while collating jump tables. Instead,
39 * I've tried to group them according to capabilities and age. */
40 switch (caps->pci_id) {
41 case 0x4144:
42 caps->family = CHIP_FAMILY_R300;
43 break;
44
45 case 0x4145:
46 case 0x4146:
47 case 0x4147:
48 case 0x4E44:
49 case 0x4E45:
50 case 0x4E46:
51 case 0x4E47:
52 caps->family = CHIP_FAMILY_R300;
53 break;
54
55 case 0x4150:
56 case 0x4151:
57 case 0x4152:
58 case 0x4153:
59 case 0x4154:
60 case 0x4155:
61 case 0x4156:
62 case 0x4E50:
63 case 0x4E51:
64 case 0x4E52:
65 case 0x4E53:
66 case 0x4E54:
67 case 0x4E56:
68 caps->family = CHIP_FAMILY_RV350;
69 break;
70
71 case 0x4148:
72 case 0x4149:
73 case 0x414A:
74 case 0x414B:
75 case 0x4E48:
76 case 0x4E49:
77 case 0x4E4B:
78 caps->family = CHIP_FAMILY_R350;
79 break;
80
81 case 0x4E4A:
82 caps->family = CHIP_FAMILY_R360;
83 break;
84
85 case 0x5460:
86 case 0x5462:
87 case 0x5464:
88 case 0x5B60:
89 case 0x5B62:
90 case 0x5B63:
91 case 0x5B64:
92 case 0x5B65:
93 caps->family = CHIP_FAMILY_RV370;
94 break;
95
96 case 0x3150:
97 case 0x3152:
98 case 0x3154:
99 case 0x3E50:
100 case 0x3E54:
101 caps->family = CHIP_FAMILY_RV380;
102 break;
103
104 case 0x4A48:
105 case 0x4A49:
106 case 0x4A4A:
107 case 0x4A4B:
108 case 0x4A4C:
109 case 0x4A4D:
110 case 0x4A4E:
111 case 0x4A4F:
112 case 0x4A50:
113 case 0x4A54:
114 caps->family = CHIP_FAMILY_R420;
115 caps->num_vert_fpus = 6;
116 break;
117
118 case 0x5548:
119 case 0x5549:
120 case 0x554A:
121 case 0x554B:
122 case 0x5550:
123 case 0x5551:
124 case 0x5552:
125 case 0x5554:
126 case 0x5D57:
127 caps->family = CHIP_FAMILY_R423;
128 caps->num_vert_fpus = 6;
129 break;
130
131 case 0x554C:
132 case 0x554D:
133 case 0x554E:
134 case 0x554F:
135 case 0x5D48:
136 case 0x5D49:
137 case 0x5D4A:
138 caps->family = CHIP_FAMILY_R430;
139 caps->num_vert_fpus = 6;
140 break;
141
142 case 0x5D4C:
143 case 0x5D4D:
144 case 0x5D4E:
145 case 0x5D4F:
146 case 0x5D50:
147 case 0x5D52:
148 caps->family = CHIP_FAMILY_R480;
149 caps->num_vert_fpus = 6;
150 break;
151
152 case 0x4B49:
153 case 0x4B4A:
154 case 0x4B4B:
155 case 0x4B4C:
156 caps->family = CHIP_FAMILY_R481;
157 caps->num_vert_fpus = 6;
158 break;
159
160 case 0x5E4C:
161 case 0x5E4F:
162 case 0x564A:
163 case 0x564B:
164 case 0x564F:
165 case 0x5652:
166 case 0x5653:
167 case 0x5657:
168 case 0x5E48:
169 case 0x5E4A:
170 case 0x5E4B:
171 case 0x5E4D:
172 caps->family = CHIP_FAMILY_RV410;
173 caps->num_vert_fpus = 6;
174 break;
175
176 case 0x5954:
177 case 0x5955:
178 caps->family = CHIP_FAMILY_RS480;
179 caps->has_tcl = FALSE;
180 break;
181
182 case 0x5974:
183 case 0x5975:
184 caps->family = CHIP_FAMILY_RS482;
185 caps->has_tcl = FALSE;
186 break;
187
188 case 0x5A41:
189 case 0x5A42:
190 caps->family = CHIP_FAMILY_RS400;
191 caps->has_tcl = FALSE;
192 break;
193
194 case 0x5A61:
195 case 0x5A62:
196 caps->family = CHIP_FAMILY_RC410;
197 caps->has_tcl = FALSE;
198 break;
199
200 case 0x791E:
201 case 0x791F:
202 caps->family = CHIP_FAMILY_RS690;
203 caps->has_tcl = FALSE;
204 break;
205
206 case 0x793F:
207 case 0x7941:
208 case 0x7942:
209 caps->family = CHIP_FAMILY_RS600;
210 caps->has_tcl = FALSE;
211 break;
212
213 case 0x796C:
214 case 0x796D:
215 case 0x796E:
216 case 0x796F:
217 caps->family = CHIP_FAMILY_RS740;
218 caps->has_tcl = FALSE;
219 break;
220
221 case 0x7100:
222 case 0x7101:
223 case 0x7102:
224 case 0x7103:
225 case 0x7104:
226 case 0x7105:
227 case 0x7106:
228 case 0x7108:
229 case 0x7109:
230 case 0x710A:
231 case 0x710B:
232 case 0x710C:
233 case 0x710E:
234 case 0x710F:
235 caps->family = CHIP_FAMILY_R520;
236 caps->num_vert_fpus = 8;
237 caps->is_r500 = TRUE;
238 break;
239
240 case 0x7140:
241 case 0x7141:
242 case 0x7142:
243 case 0x7143:
244 case 0x7144:
245 case 0x7145:
246 case 0x7146:
247 case 0x7147:
248 case 0x7149:
249 case 0x714A:
250 case 0x714B:
251 case 0x714C:
252 case 0x714D:
253 case 0x714E:
254 case 0x714F:
255 case 0x7151:
256 case 0x7152:
257 case 0x7153:
258 case 0x715E:
259 case 0x715F:
260 case 0x7180:
261 case 0x7181:
262 case 0x7183:
263 case 0x7186:
264 case 0x7187:
265 case 0x7188:
266 case 0x718A:
267 case 0x718B:
268 case 0x718C:
269 case 0x718D:
270 case 0x718F:
271 case 0x7193:
272 case 0x7196:
273 case 0x719B:
274 case 0x719F:
275 case 0x7200:
276 case 0x7210:
277 case 0x7211:
278 caps->family = CHIP_FAMILY_RV515;
279 caps->num_vert_fpus = 2;
280 caps->is_r500 = TRUE;
281 break;
282
283 case 0x71C0:
284 case 0x71C1:
285 case 0x71C2:
286 case 0x71C3:
287 case 0x71C4:
288 case 0x71C5:
289 case 0x71C6:
290 case 0x71C7:
291 case 0x71CD:
292 case 0x71CE:
293 case 0x71D2:
294 case 0x71D4:
295 case 0x71D5:
296 case 0x71D6:
297 case 0x71DA:
298 case 0x71DE:
299 caps->family = CHIP_FAMILY_RV530;
300 caps->num_vert_fpus = 5;
301 caps->is_r500 = TRUE;
302 break;
303
304 case 0x7240:
305 case 0x7243:
306 case 0x7244:
307 case 0x7245:
308 case 0x7246:
309 case 0x7247:
310 case 0x7248:
311 case 0x7249:
312 case 0x724A:
313 case 0x724B:
314 case 0x724C:
315 case 0x724D:
316 case 0x724E:
317 case 0x724F:
318 case 0x7284:
319 caps->family = CHIP_FAMILY_R580;
320 caps->num_vert_fpus = 8;
321 caps->is_r500 = TRUE;
322 break;
323
324 case 0x7280:
325 caps->family = CHIP_FAMILY_RV570;
326 caps->num_vert_fpus = 5;
327 caps->is_r500 = TRUE;
328 break;
329
330 case 0x7281:
331 case 0x7283:
332 case 0x7287:
333 case 0x7288:
334 case 0x7289:
335 case 0x728B:
336 case 0x728C:
337 case 0x7290:
338 case 0x7291:
339 case 0x7293:
340 case 0x7297:
341 caps->family = CHIP_FAMILY_RV560;
342 caps->num_vert_fpus = 5;
343 caps->is_r500 = TRUE;
344 break;
345
346 default:
347 debug_printf("r300: Warning: Unknown chipset 0x%x\n",
348 caps->pci_id);
349 break;
350 }
351 }