src/gallium/drivers/r300/r300_chipset.h

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #ifndef R300_CHIPSET_H
  24 #define R300_CHIPSET_H
  25
  26 #include "pipe/p_compiler.h"
  27
  28 /* these are sizes in dwords */
  29 #define R300_HIZ_LIMIT 10240
  30 #define RV530_HIZ_LIMIT 15360
  31
  32 /* rv3xx have only one pipe */
  33 #define PIPE_CMASK_SIZE 4096
  34 #define PIPE_ZMASK_SIZE 4096
  35 #define RV3xx_ZMASK_SIZE 5120
  36
  37 /* The size of a compressed tile. Each compressed tile takes 2 bits
  38  * in the ZMASK RAM, so there is always 16 tiles per one dword. */
  39 enum r300_zmask_compression {
  40    R300_ZCOMP_4X4 = 4,
  41    R300_ZCOMP_8X8 = 8
  42 };
  43
  44 /* Structure containing all the possible information about a specific Radeon
  45  * in the R3xx, R4xx, and R5xx families. */
  46 struct r300_capabilities {
  47     /* Chipset family */
  48     int family;
  49     /* The number of vertex floating-point units */
  50     unsigned num_vert_fpus;
  51     /* The number of texture units. */
  52     unsigned num_tex_units;
  53     /* Whether or not TCL is physically present */
  54     boolean has_tcl;
  55     /* Some chipsets do not have HiZ RAM - other have varying amounts. */
  56     int hiz_ram;
  57     /* Some chipsets have zmask ram per pipe some don't. */
  58     int zmask_ram;
  59     /* Compression mode for ZMASK. */
  60     enum r300_zmask_compression z_compress;
  61     /* Whether or not this is RV350 or newer, including all r400 and r500
  62      * chipsets. The differences compared to the oldest r300 chips are:
  63      * - Blend LTE/GTE thresholds
  64      * - Better MACRO_SWITCH in texture tiling
  65      * - Half float vertex
  66      * - More HyperZ optimizations */
  67     boolean is_rv350;
  68     /* Whether or not this is R400. The differences compared their rv350
  69      * cousins are:
  70      * - Extended fragment shader registers
  71      * - 3DC texture compression (RGTC2) */
  72     boolean is_r400;
  73     /* Whether or not this is an RV515 or newer; R500s have many differences
  74      * that require extra consideration, compared to their rv350 cousins:
  75      * - Extra bit of width and height on texture sizes
  76      * - Blend color is split across two registers
  77      * - Universal Shader (US) block used for fragment shaders
  78      * - FP16 blending and multisampling
  79      * - Full RGTC texture compression
  80      * - 24-bit depth textures
  81      * - Stencil back-face reference value
  82      * - Ability to render up to 2^24 - 1 vertices with signed index offset */
  83     boolean is_r500;
  84     /* Whether or not the second pixel pipe is accessed with the high bit */
  85     boolean high_second_pipe;
  86     /* DXTC texture swizzling. */
  87     boolean dxtc_swizzle;
  88     /* Whether R500_US_FORMAT0_0 exists (R520-only and depends on DRM). */
  89     boolean has_us_format;
  90 };
  91
  92 void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps);
  93
  94 #endif /* R300_CHIPSET_H */