7f43281af4abb15dfa481b9cdf1062f0198960e1
[mesa.git] / src / gallium / drivers / r300 / r300_context.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "draw/draw_context.h"
24
25 #include "util/u_memory.h"
26 #include "util/u_sampler.h"
27 #include "util/u_simple_list.h"
28 #include "util/u_upload_mgr.h"
29
30 #include "r300_cb.h"
31 #include "r300_context.h"
32 #include "r300_emit.h"
33 #include "r300_screen.h"
34 #include "r300_screen_buffer.h"
35 #include "r300_winsys.h"
36
37 #include <inttypes.h>
38
39 static void r300_release_referenced_objects(struct r300_context *r300)
40 {
41 struct pipe_framebuffer_state *fb =
42 (struct pipe_framebuffer_state*)r300->fb_state.state;
43 struct r300_textures_state *textures =
44 (struct r300_textures_state*)r300->textures_state.state;
45 struct r300_query *query, *temp;
46 unsigned i;
47
48 /* Framebuffer state. */
49 util_assign_framebuffer_state(fb, NULL);
50
51 /* Textures. */
52 for (i = 0; i < textures->sampler_view_count; i++)
53 pipe_sampler_view_reference(
54 (struct pipe_sampler_view**)&textures->sampler_views[i], NULL);
55
56 /* The special dummy texture for texkill. */
57 if (r300->texkill_sampler) {
58 pipe_sampler_view_reference(
59 (struct pipe_sampler_view**)&r300->texkill_sampler,
60 NULL);
61 }
62
63 /* The SWTCL VBO. */
64 pipe_resource_reference(&r300->vbo, NULL);
65
66 /* Vertex buffers. */
67 for (i = 0; i < r300->vertex_buffer_count; i++) {
68 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL);
69 }
70
71 /* If there are any queries pending or not destroyed, remove them now. */
72 foreach_s(query, temp, &r300->query_list) {
73 remove_from_list(query);
74 FREE(query);
75 }
76 }
77
78 static void r300_destroy_context(struct pipe_context* context)
79 {
80 struct r300_context* r300 = r300_context(context);
81 struct r300_atom *atom;
82
83 util_blitter_destroy(r300->blitter);
84 draw_destroy(r300->draw);
85
86 /* Print stats, if enabled. */
87 if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) {
88 fprintf(stderr, "r300: Stats for context %p:\n", r300);
89 fprintf(stderr, " : Flushes: %" PRIu64 "\n", r300->flush_counter);
90 foreach(atom, &r300->atom_list) {
91 fprintf(stderr, " : %s: %" PRIu64 " emits\n",
92 atom->name, atom->counter);
93 }
94 }
95
96 u_upload_destroy(r300->upload_vb);
97 u_upload_destroy(r300->upload_ib);
98
99 translate_cache_destroy(r300->tran.translate_cache);
100
101 r300_release_referenced_objects(r300);
102
103 FREE(r300->aa_state.state);
104 FREE(r300->blend_color_state.state);
105 FREE(r300->clip_state.state);
106 FREE(r300->fb_state.state);
107 FREE(r300->gpu_flush.state);
108 FREE(r300->hyperz_state.state);
109 FREE(r300->invariant_state.state);
110 FREE(r300->rs_block_state.state);
111 FREE(r300->scissor_state.state);
112 FREE(r300->textures_state.state);
113 FREE(r300->vap_invariant_state.state);
114 FREE(r300->viewport_state.state);
115 FREE(r300->ztop_state.state);
116 FREE(r300->fs_constants.state);
117 FREE(r300->vs_constants.state);
118 if (!r300->screen->caps.has_tcl) {
119 FREE(r300->vertex_stream_state.state);
120 }
121 FREE(r300);
122 }
123
124 void r300_flush_cb(void *data)
125 {
126 struct r300_context* const cs_context_copy = data;
127
128 cs_context_copy->context.flush(&cs_context_copy->context, 0, NULL);
129 }
130
131 #define R300_INIT_ATOM(atomname, atomsize) \
132 r300->atomname.name = #atomname; \
133 r300->atomname.state = NULL; \
134 r300->atomname.size = atomsize; \
135 r300->atomname.emit = r300_emit_##atomname; \
136 r300->atomname.dirty = FALSE; \
137 insert_at_tail(&r300->atom_list, &r300->atomname);
138
139 static void r300_setup_atoms(struct r300_context* r300)
140 {
141 boolean is_rv350 = r300->screen->caps.is_rv350;
142 boolean is_r500 = r300->screen->caps.is_r500;
143 boolean has_tcl = r300->screen->caps.has_tcl;
144 boolean drm_2_3_0 = r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
145
146 /* Create the actual atom list.
147 *
148 * Each atom is examined and emitted in the order it appears here, which
149 * can affect performance and conformance if not handled with care.
150 *
151 * Some atoms never change size, others change every emit - those have
152 * the size of 0 here.
153 *
154 * NOTE: The framebuffer state is split into these atoms:
155 * - gpu_flush (unpipelined regs)
156 * - aa_state (unpipelined regs)
157 * - fb_state (unpipelined regs)
158 * - hyperz_state (unpipelined regs followed by pipelined ones)
159 * - fb_state_pipelined (pipelined regs)
160 * The motivation behind this is to be able to emit a strict
161 * subset of the regs, and to have reasonable register ordering. */
162 make_empty_list(&r300->atom_list);
163 /* SC, GB (unpipelined), RB3D (unpipelined), ZB (unpipelined). */
164 R300_INIT_ATOM(gpu_flush, 9);
165 R300_INIT_ATOM(aa_state, 4);
166 R300_INIT_ATOM(fb_state, 0);
167 /* ZB (unpipelined), SC. */
168 R300_INIT_ATOM(hyperz_state, 6);
169 R300_INIT_ATOM(ztop_state, 2);
170 /* ZB, FG. */
171 R300_INIT_ATOM(dsa_state, is_r500 ? 8 : 6);
172 /* RB3D. */
173 R300_INIT_ATOM(blend_state, 8);
174 R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2);
175 /* SC. */
176 R300_INIT_ATOM(scissor_state, 3);
177 /* GB, FG, GA, SU, SC, RB3D. */
178 R300_INIT_ATOM(invariant_state, 16 + (is_rv350 ? 4 : 0));
179 /* VAP. */
180 R300_INIT_ATOM(viewport_state, 9);
181 R300_INIT_ATOM(pvs_flush, 2);
182 R300_INIT_ATOM(vap_invariant_state, 9);
183 R300_INIT_ATOM(vertex_stream_state, 0);
184 R300_INIT_ATOM(vs_state, 0);
185 R300_INIT_ATOM(vs_constants, 0);
186 R300_INIT_ATOM(clip_state, has_tcl ? 5 + (6 * 4) : 2);
187 /* VAP, RS, GA, GB, SU, SC. */
188 R300_INIT_ATOM(rs_block_state, 0);
189 R300_INIT_ATOM(rs_state, 0);
190 /* SC, US. */
191 R300_INIT_ATOM(fb_state_pipelined, 5 + (drm_2_3_0 ? 3 : 0));
192 /* US. */
193 R300_INIT_ATOM(fs, 0);
194 R300_INIT_ATOM(fs_rc_constant_state, 0);
195 R300_INIT_ATOM(fs_constants, 0);
196 /* TX. */
197 R300_INIT_ATOM(texture_cache_inval, 2);
198 R300_INIT_ATOM(textures_state, 0);
199 /* ZB (unpipelined), SU. */
200 R300_INIT_ATOM(query_start, 4);
201
202 /* Replace emission functions for r500. */
203 if (is_r500) {
204 r300->fs.emit = r500_emit_fs;
205 r300->fs_rc_constant_state.emit = r500_emit_fs_rc_constant_state;
206 r300->fs_constants.emit = r500_emit_fs_constants;
207 }
208
209 /* Some non-CSO atoms need explicit space to store the state locally. */
210 r300->aa_state.state = CALLOC_STRUCT(r300_aa_state);
211 r300->blend_color_state.state = CALLOC_STRUCT(r300_blend_color_state);
212 r300->clip_state.state = CALLOC_STRUCT(r300_clip_state);
213 r300->fb_state.state = CALLOC_STRUCT(pipe_framebuffer_state);
214 r300->gpu_flush.state = CALLOC_STRUCT(pipe_framebuffer_state);
215 r300->hyperz_state.state = CALLOC_STRUCT(r300_hyperz_state);
216 r300->invariant_state.state = CALLOC_STRUCT(r300_invariant_state);
217 r300->rs_block_state.state = CALLOC_STRUCT(r300_rs_block);
218 r300->scissor_state.state = CALLOC_STRUCT(pipe_scissor_state);
219 r300->textures_state.state = CALLOC_STRUCT(r300_textures_state);
220 r300->vap_invariant_state.state = CALLOC_STRUCT(r300_vap_invariant_state);
221 r300->viewport_state.state = CALLOC_STRUCT(r300_viewport_state);
222 r300->ztop_state.state = CALLOC_STRUCT(r300_ztop_state);
223 r300->fs_constants.state = CALLOC_STRUCT(r300_constant_buffer);
224 r300->vs_constants.state = CALLOC_STRUCT(r300_constant_buffer);
225 if (!r300->screen->caps.has_tcl) {
226 r300->vertex_stream_state.state = CALLOC_STRUCT(r300_vertex_stream_state);
227 }
228
229 /* Some non-CSO atoms don't use the state pointer. */
230 r300->fb_state_pipelined.allow_null_state = TRUE;
231 r300->fs_rc_constant_state.allow_null_state = TRUE;
232 r300->pvs_flush.allow_null_state = TRUE;
233 r300->query_start.allow_null_state = TRUE;
234 r300->texture_cache_inval.allow_null_state = TRUE;
235
236 /* Some states must be marked as dirty here to properly set up
237 * hardware in the first command stream. */
238 r300->invariant_state.dirty = TRUE;
239 r300->pvs_flush.dirty = TRUE;
240 r300->vap_invariant_state.dirty = TRUE;
241 r300->texture_cache_inval.dirty = TRUE;
242 r300->textures_state.dirty = TRUE;
243 }
244
245 /* Not every state tracker calls every driver function before the first draw
246 * call and we must initialize the command buffers somehow. */
247 static void r300_init_states(struct pipe_context *pipe)
248 {
249 struct r300_context *r300 = r300_context(pipe);
250 struct pipe_blend_color bc = {{0}};
251 struct pipe_clip_state cs = {{{0}}};
252 struct pipe_scissor_state ss = {0};
253 struct r300_clip_state *clip =
254 (struct r300_clip_state*)r300->clip_state.state;
255 struct r300_gpu_flush *gpuflush =
256 (struct r300_gpu_flush*)r300->gpu_flush.state;
257 struct r300_vap_invariant_state *vap_invariant =
258 (struct r300_vap_invariant_state*)r300->vap_invariant_state.state;
259 struct r300_invariant_state *invariant =
260 (struct r300_invariant_state*)r300->invariant_state.state;
261 struct r300_hyperz_state *hyperz =
262 (struct r300_hyperz_state*)r300->hyperz_state.state;
263 CB_LOCALS;
264
265 pipe->set_blend_color(pipe, &bc);
266 pipe->set_scissor_state(pipe, &ss);
267
268 /* Initialize the clip state. */
269 if (r300_context(pipe)->screen->caps.has_tcl) {
270 pipe->set_clip_state(pipe, &cs);
271 } else {
272 BEGIN_CB(clip->cb, 2);
273 OUT_CB_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
274 END_CB;
275 }
276
277 /* Initialize the GPU flush. */
278 {
279 BEGIN_CB(gpuflush->cb_flush_clean, 6);
280
281 /* Flush and free renderbuffer caches. */
282 OUT_CB_REG(R300_RB3D_DSTCACHE_CTLSTAT,
283 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
284 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
285 OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT,
286 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
287 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
288
289 /* Wait until the GPU is idle.
290 * This fixes random pixels sometimes appearing probably caused
291 * by incomplete rendering. */
292 OUT_CB_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
293 END_CB;
294 }
295
296 /* Initialize the VAP invariant state. */
297 {
298 BEGIN_CB(vap_invariant->cb, 9);
299 OUT_CB_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff);
300 OUT_CB_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
301 OUT_CB_32F(1.0);
302 OUT_CB_32F(1.0);
303 OUT_CB_32F(1.0);
304 OUT_CB_32F(1.0);
305 OUT_CB_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO);
306 END_CB;
307 }
308
309 /* Initialize the invariant state. */
310 {
311 BEGIN_CB(invariant->cb, r300->invariant_state.size);
312 OUT_CB_REG(R300_GB_SELECT, 0);
313 OUT_CB_REG(R300_FG_FOG_BLEND, 0);
314 OUT_CB_REG(R300_GA_ROUND_MODE, 1);
315 OUT_CB_REG(R300_GA_OFFSET, 0);
316 OUT_CB_REG(R300_SU_TEX_WRAP, 0);
317 OUT_CB_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF);
318 OUT_CB_REG(R300_SU_DEPTH_OFFSET, 0);
319 OUT_CB_REG(R300_SC_EDGERULE, 0x2DA49525);
320
321 if (r300->screen->caps.is_rv350) {
322 OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x01010101);
323 OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFEFEFEFE);
324 }
325 END_CB;
326 }
327
328 /* Initialize the hyperz state. */
329 {
330 BEGIN_CB(&hyperz->cb_begin, r300->hyperz_state.size);
331 OUT_CB_REG(R300_ZB_BW_CNTL, 0);
332 OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE, 0);
333 OUT_CB_REG(R300_SC_HYPERZ, 0x1C);
334 END_CB;
335 }
336 }
337
338 struct pipe_context* r300_create_context(struct pipe_screen* screen,
339 void *priv)
340 {
341 struct r300_context* r300 = CALLOC_STRUCT(r300_context);
342 struct r300_screen* r300screen = r300_screen(screen);
343 struct r300_winsys_screen *rws = r300screen->rws;
344
345 if (!r300)
346 return NULL;
347
348 r300->rws = rws;
349 r300->screen = r300screen;
350
351 r300->context.winsys = (struct pipe_winsys*)rws;
352 r300->context.screen = screen;
353 r300->context.priv = priv;
354
355 r300->context.destroy = r300_destroy_context;
356
357 if (!r300screen->caps.has_tcl) {
358 /* Create a Draw. This is used for SW TCL. */
359 r300->draw = draw_create(&r300->context);
360 /* Enable our renderer. */
361 draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300));
362 /* Enable Draw's clipping. */
363 draw_set_driver_clipping(r300->draw, FALSE);
364 /* Disable converting points/lines to triangles. */
365 draw_wide_line_threshold(r300->draw, 10000000.f);
366 draw_wide_point_threshold(r300->draw, 10000000.f);
367 }
368
369 r300_setup_atoms(r300);
370
371 make_empty_list(&r300->query_list);
372
373 r300_init_blit_functions(r300);
374 r300_init_flush_functions(r300);
375 r300_init_query_functions(r300);
376 r300_init_render_functions(r300);
377 r300_init_state_functions(r300);
378 r300_init_resource_functions(r300);
379
380 rws->set_flush_cb(r300->rws, r300_flush_cb, r300);
381 r300->dirty_hw++;
382
383 r300->blitter = util_blitter_create(&r300->context);
384
385 r300->upload_ib = u_upload_create(&r300->context,
386 32 * 1024, 16,
387 PIPE_BIND_INDEX_BUFFER);
388
389 if (r300->upload_ib == NULL)
390 goto no_upload_ib;
391
392 r300->upload_vb = u_upload_create(&r300->context,
393 128 * 1024, 16,
394 PIPE_BIND_VERTEX_BUFFER);
395 if (r300->upload_vb == NULL)
396 goto no_upload_vb;
397
398 r300->tran.translate_cache = translate_cache_create();
399
400 r300_init_states(&r300->context);
401
402 /* The KIL opcode needs the first texture unit to be enabled
403 * on r3xx-r4xx. In order to calm down the CS checker, we bind this
404 * dummy texture there. */
405 if (!r300->screen->caps.is_r500) {
406 struct pipe_resource *tex;
407 struct pipe_resource rtempl = {{0}};
408 struct pipe_sampler_view vtempl = {{0}};
409
410 rtempl.target = PIPE_TEXTURE_2D;
411 rtempl.format = PIPE_FORMAT_I8_UNORM;
412 rtempl.bind = PIPE_BIND_SAMPLER_VIEW;
413 rtempl.width0 = 1;
414 rtempl.height0 = 1;
415 rtempl.depth0 = 1;
416 tex = screen->resource_create(screen, &rtempl);
417
418 u_sampler_view_default_template(&vtempl, tex, tex->format);
419
420 r300->texkill_sampler = (struct r300_sampler_view*)
421 r300->context.create_sampler_view(&r300->context, tex, &vtempl);
422
423 pipe_resource_reference(&tex, NULL);
424 }
425
426 return &r300->context;
427
428 no_upload_ib:
429 u_upload_destroy(r300->upload_ib);
430 no_upload_vb:
431 FREE(r300);
432 return NULL;
433 }
434
435 boolean r300_check_cs(struct r300_context *r300, unsigned size)
436 {
437 return size <= r300->rws->get_cs_free_dwords(r300->rws);
438 }
439
440 void r300_finish(struct r300_context *r300)
441 {
442 struct pipe_framebuffer_state *fb;
443 unsigned i;
444
445 /* This is a preliminary implementation of glFinish.
446 *
447 * The ideal implementation should use something like EmitIrqLocked and
448 * WaitIrq, or better, real fences.
449 */
450 if (r300->fb_state.state) {
451 fb = r300->fb_state.state;
452
453 for (i = 0; i < fb->nr_cbufs; i++) {
454 if (fb->cbufs[i]->texture) {
455 r300->rws->buffer_wait(r300->rws,
456 r300_texture(fb->cbufs[i]->texture)->buffer);
457 return;
458 }
459 }
460 if (fb->zsbuf && fb->zsbuf->texture) {
461 r300->rws->buffer_wait(r300->rws,
462 r300_texture(fb->zsbuf->texture)->buffer);
463 }
464 }
465 }