src/gallium/drivers/r300/r300_context.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "draw/draw_context.h"
  24
  25 #include "util/u_memory.h"
  26 #include "util/u_sampler.h"
  27 #include "util/simple_list.h"
  28 #include "util/u_upload_mgr.h"
  29 #include "os/os_time.h"
  30 #include "vl/vl_decoder.h"
  31 #include "vl/vl_video_buffer.h"
  32
  33 #include "r300_cb.h"
  34 #include "r300_context.h"
  35 #include "r300_emit.h"
  36 #include "r300_screen.h"
  37 #include "r300_screen_buffer.h"
  38 #include "compiler/radeon_regalloc.h"
  39
  40 #include <inttypes.h>
  41
  42 static void r300_release_referenced_objects(struct r300_context *r300)
  43 {
  44     struct pipe_framebuffer_state *fb =
  45             (struct pipe_framebuffer_state*)r300->fb_state.state;
  46     struct r300_textures_state *textures =
  47             (struct r300_textures_state*)r300->textures_state.state;
  48     unsigned i;
  49
  50     /* Framebuffer state. */
  51     util_unreference_framebuffer_state(fb);
  52
  53     /* Textures. */
  54     for (i = 0; i < textures->sampler_view_count; i++)
  55         pipe_sampler_view_reference(
  56                 (struct pipe_sampler_view**)&textures->sampler_views[i], NULL);
  57
  58     /* The special dummy texture for texkill. */
  59     if (r300->texkill_sampler) {
  60         pipe_sampler_view_reference(
  61                 (struct pipe_sampler_view**)&r300->texkill_sampler,
  62                 NULL);
  63     }
  64
  65     /* Manually-created vertex buffers. */
  66     pipe_resource_reference(&r300->dummy_vb.buffer, NULL);
  67     pb_reference(&r300->vbo, NULL);
  68
  69     r300->context.delete_depth_stencil_alpha_state(&r300->context,
  70                                                    r300->dsa_decompress_zmask);
  71 }
  72
  73 static void r300_destroy_context(struct pipe_context* context)
  74 {
  75     struct r300_context* r300 = r300_context(context);
  76
  77     if (r300->cs && r300->hyperz_enabled) {
  78         r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_HYPERZ_ACCESS, FALSE);
  79     }
  80     if (r300->cs && r300->cmask_access) {
  81         r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_CMASK_ACCESS, FALSE);
  82     }
  83
  84     if (r300->blitter)
  85         util_blitter_destroy(r300->blitter);
  86     if (r300->draw)
  87         draw_destroy(r300->draw);
  88
  89     if (r300->uploader)
  90         u_upload_destroy(r300->uploader);
  91
  92     /* XXX: This function assumes r300->query_list was initialized */
  93     r300_release_referenced_objects(r300);
  94
  95     if (r300->cs)
  96         r300->rws->cs_destroy(r300->cs);
  97
  98     rc_destroy_regalloc_state(&r300->fs_regalloc_state);
  99
 100     /* XXX: No way to tell if this was initialized or not? */
 101     util_slab_destroy(&r300->pool_transfers);
 102
 103     /* Free the structs allocated in r300_setup_atoms() */
 104     if (r300->aa_state.state) {
 105         FREE(r300->aa_state.state);
 106         FREE(r300->blend_color_state.state);
 107         FREE(r300->clip_state.state);
 108         FREE(r300->fb_state.state);
 109         FREE(r300->gpu_flush.state);
 110         FREE(r300->hyperz_state.state);
 111         FREE(r300->invariant_state.state);
 112         FREE(r300->rs_block_state.state);
 113         FREE(r300->sample_mask.state);
 114         FREE(r300->scissor_state.state);
 115         FREE(r300->textures_state.state);
 116         FREE(r300->vap_invariant_state.state);
 117         FREE(r300->viewport_state.state);
 118         FREE(r300->ztop_state.state);
 119         FREE(r300->fs_constants.state);
 120         FREE(r300->vs_constants.state);
 121         if (!r300->screen->caps.has_tcl) {
 122             FREE(r300->vertex_stream_state.state);
 123         }
 124     }
 125     FREE(r300);
 126 }
 127
 128 static void r300_flush_callback(void *data, unsigned flags,
 129                                 struct pipe_fence_handle **fence)
 130 {
 131     struct r300_context* const cs_context_copy = data;
 132
 133     r300_flush(&cs_context_copy->context, flags, fence);
 134 }
 135
 136 #define R300_INIT_ATOM(atomname, atomsize) \
 137  do { \
 138     r300->atomname.name = #atomname; \
 139     r300->atomname.state = NULL; \
 140     r300->atomname.size = atomsize; \
 141     r300->atomname.emit = r300_emit_##atomname; \
 142     r300->atomname.dirty = FALSE; \
 143  } while (0)
 144
 145 #define R300_ALLOC_ATOM(atomname, statetype) \
 146 do { \
 147     r300->atomname.state = CALLOC_STRUCT(statetype); \
 148     if (r300->atomname.state == NULL) \
 149         return FALSE; \
 150 } while (0)
 151
 152 static boolean r300_setup_atoms(struct r300_context* r300)
 153 {
 154     boolean is_rv350 = r300->screen->caps.is_rv350;
 155     boolean is_r500 = r300->screen->caps.is_r500;
 156     boolean has_tcl = r300->screen->caps.has_tcl;
 157     boolean drm_2_6_0 = r300->screen->info.drm_minor >= 6;
 158
 159     /* Create the actual atom list.
 160      *
 161      * Some atoms never change size, others change every emit - those have
 162      * the size of 0 here.
 163      *
 164      * NOTE: The framebuffer state is split into these atoms:
 165      * - gpu_flush          (unpipelined regs)
 166      * - aa_state           (unpipelined regs)
 167      * - fb_state           (unpipelined regs)
 168      * - hyperz_state       (unpipelined regs followed by pipelined ones)
 169      * - fb_state_pipelined (pipelined regs)
 170      * The motivation behind this is to be able to emit a strict
 171      * subset of the regs, and to have reasonable register ordering. */
 172     /* SC, GB (unpipelined), RB3D (unpipelined), ZB (unpipelined). */
 173     R300_INIT_ATOM(gpu_flush, 9);
 174     R300_INIT_ATOM(aa_state, 4);
 175     R300_INIT_ATOM(fb_state, 0);
 176     R300_INIT_ATOM(hyperz_state, is_r500 || (is_rv350 && drm_2_6_0) ? 10 : 8);
 177     /* ZB (unpipelined), SC. */
 178     R300_INIT_ATOM(ztop_state, 2);
 179     /* ZB, FG. */
 180     R300_INIT_ATOM(dsa_state, is_r500 ? (drm_2_6_0 ? 10 : 8) : 6);
 181     /* RB3D. */
 182     R300_INIT_ATOM(blend_state, 8);
 183     R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2);
 184     /* SC. */
 185     R300_INIT_ATOM(sample_mask, 2);
 186     R300_INIT_ATOM(scissor_state, 3);
 187     /* GB, FG, GA, SU, SC, RB3D. */
 188     R300_INIT_ATOM(invariant_state, 14 + (is_rv350 ? 4 : 0) + (is_r500 ? 4 : 0));
 189     /* VAP. */
 190     R300_INIT_ATOM(viewport_state, 9);
 191     R300_INIT_ATOM(pvs_flush, 2);
 192     R300_INIT_ATOM(vap_invariant_state, is_r500 ? 11 : 9);
 193     R300_INIT_ATOM(vertex_stream_state, 0);
 194     R300_INIT_ATOM(vs_state, 0);
 195     R300_INIT_ATOM(vs_constants, 0);
 196     R300_INIT_ATOM(clip_state, has_tcl ? 3 + (6 * 4) : 0);
 197     /* VAP, RS, GA, GB, SU, SC. */
 198     R300_INIT_ATOM(rs_block_state, 0);
 199     R300_INIT_ATOM(rs_state, 0);
 200     /* SC, US. */
 201     R300_INIT_ATOM(fb_state_pipelined, 8);
 202     /* US. */
 203     R300_INIT_ATOM(fs, 0);
 204     R300_INIT_ATOM(fs_rc_constant_state, 0);
 205     R300_INIT_ATOM(fs_constants, 0);
 206     /* TX. */
 207     R300_INIT_ATOM(texture_cache_inval, 2);
 208     R300_INIT_ATOM(textures_state, 0);
 209     /* Clear commands */
 210     R300_INIT_ATOM(hiz_clear, r300->screen->caps.hiz_ram > 0 ? 4 : 0);
 211     R300_INIT_ATOM(zmask_clear, r300->screen->caps.zmask_ram > 0 ? 4 : 0);
 212     R300_INIT_ATOM(cmask_clear, 4);
 213     /* ZB (unpipelined), SU. */
 214     R300_INIT_ATOM(query_start, 4);
 215
 216     /* Replace emission functions for r500. */
 217     if (is_r500) {
 218         r300->fs.emit = r500_emit_fs;
 219         r300->fs_rc_constant_state.emit = r500_emit_fs_rc_constant_state;
 220         r300->fs_constants.emit = r500_emit_fs_constants;
 221     }
 222
 223     /* Some non-CSO atoms need explicit space to store the state locally. */
 224     R300_ALLOC_ATOM(aa_state, r300_aa_state);
 225     R300_ALLOC_ATOM(blend_color_state, r300_blend_color_state);
 226     R300_ALLOC_ATOM(clip_state, r300_clip_state);
 227     R300_ALLOC_ATOM(hyperz_state, r300_hyperz_state);
 228     R300_ALLOC_ATOM(invariant_state, r300_invariant_state);
 229     R300_ALLOC_ATOM(textures_state, r300_textures_state);
 230     R300_ALLOC_ATOM(vap_invariant_state, r300_vap_invariant_state);
 231     R300_ALLOC_ATOM(viewport_state, r300_viewport_state);
 232     R300_ALLOC_ATOM(ztop_state, r300_ztop_state);
 233     R300_ALLOC_ATOM(fb_state, pipe_framebuffer_state);
 234     R300_ALLOC_ATOM(gpu_flush, pipe_framebuffer_state);
 235     r300->sample_mask.state = malloc(4);
 236     R300_ALLOC_ATOM(scissor_state, pipe_scissor_state);
 237     R300_ALLOC_ATOM(rs_block_state, r300_rs_block);
 238     R300_ALLOC_ATOM(fs_constants, r300_constant_buffer);
 239     R300_ALLOC_ATOM(vs_constants, r300_constant_buffer);
 240     if (!r300->screen->caps.has_tcl) {
 241         R300_ALLOC_ATOM(vertex_stream_state, r300_vertex_stream_state);
 242     }
 243
 244     /* Some non-CSO atoms don't use the state pointer. */
 245     r300->fb_state_pipelined.allow_null_state = TRUE;
 246     r300->fs_rc_constant_state.allow_null_state = TRUE;
 247     r300->pvs_flush.allow_null_state = TRUE;
 248     r300->query_start.allow_null_state = TRUE;
 249     r300->texture_cache_inval.allow_null_state = TRUE;
 250
 251     /* Some states must be marked as dirty here to properly set up
 252      * hardware in the first command stream. */
 253     r300_mark_atom_dirty(r300, &r300->invariant_state);
 254     r300_mark_atom_dirty(r300, &r300->pvs_flush);
 255     r300_mark_atom_dirty(r300, &r300->vap_invariant_state);
 256     r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
 257     r300_mark_atom_dirty(r300, &r300->textures_state);
 258
 259     return TRUE;
 260 }
 261
 262 /* Not every state tracker calls every driver function before the first draw
 263  * call and we must initialize the command buffers somehow. */
 264 static void r300_init_states(struct pipe_context *pipe)
 265 {
 266     struct r300_context *r300 = r300_context(pipe);
 267     struct pipe_blend_color bc = {{0}};
 268     struct pipe_clip_state cs = {{{0}}};
 269     struct pipe_scissor_state ss = {0};
 270     struct r300_gpu_flush *gpuflush =
 271             (struct r300_gpu_flush*)r300->gpu_flush.state;
 272     struct r300_vap_invariant_state *vap_invariant =
 273             (struct r300_vap_invariant_state*)r300->vap_invariant_state.state;
 274     struct r300_invariant_state *invariant =
 275             (struct r300_invariant_state*)r300->invariant_state.state;
 276
 277     CB_LOCALS;
 278
 279     pipe->set_blend_color(pipe, &bc);
 280     pipe->set_clip_state(pipe, &cs);
 281     pipe->set_scissor_states(pipe, 0, 1, &ss);
 282     pipe->set_sample_mask(pipe, ~0);
 283
 284     /* Initialize the GPU flush. */
 285     {
 286         BEGIN_CB(gpuflush->cb_flush_clean, 6);
 287
 288         /* Flush and free renderbuffer caches. */
 289         OUT_CB_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 290             R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 291             R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 292         OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT,
 293             R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 294             R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 295
 296         /* Wait until the GPU is idle.
 297          * This fixes random pixels sometimes appearing probably caused
 298          * by incomplete rendering. */
 299         OUT_CB_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
 300         END_CB;
 301     }
 302
 303     /* Initialize the VAP invariant state. */
 304     {
 305         BEGIN_CB(vap_invariant->cb, r300->vap_invariant_state.size);
 306         OUT_CB_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff);
 307         OUT_CB_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
 308         OUT_CB_32F(1.0);
 309         OUT_CB_32F(1.0);
 310         OUT_CB_32F(1.0);
 311         OUT_CB_32F(1.0);
 312         OUT_CB_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO);
 313
 314         if (r300->screen->caps.is_r500) {
 315             OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL, 0);
 316         }
 317         END_CB;
 318     }
 319
 320     /* Initialize the invariant state. */
 321     {
 322         BEGIN_CB(invariant->cb, r300->invariant_state.size);
 323         OUT_CB_REG(R300_GB_SELECT, 0);
 324         OUT_CB_REG(R300_FG_FOG_BLEND, 0);
 325         OUT_CB_REG(R300_GA_OFFSET, 0);
 326         OUT_CB_REG(R300_SU_TEX_WRAP, 0);
 327         OUT_CB_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF);
 328         OUT_CB_REG(R300_SU_DEPTH_OFFSET, 0);
 329         OUT_CB_REG(R300_SC_EDGERULE, 0x2DA49525);
 330
 331         if (r300->screen->caps.is_rv350) {
 332             OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x01010101);
 333             OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFEFEFEFE);
 334         }
 335
 336         if (r300->screen->caps.is_r500) {
 337             OUT_CB_REG(R500_GA_COLOR_CONTROL_PS3, 0);
 338             OUT_CB_REG(R500_SU_TEX_WRAP_PS3, 0);
 339         }
 340         END_CB;
 341     }
 342
 343     /* Initialize the hyperz state. */
 344     {
 345         struct r300_hyperz_state *hyperz =
 346             (struct r300_hyperz_state*)r300->hyperz_state.state;
 347         BEGIN_CB(&hyperz->cb_flush_begin, r300->hyperz_state.size);
 348         OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT,
 349                    R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE);
 350         OUT_CB_REG(R300_ZB_BW_CNTL, 0);
 351         OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE, 0);
 352         OUT_CB_REG(R300_SC_HYPERZ, R300_SC_HYPERZ_ADJ_2);
 353
 354         if (r300->screen->caps.is_r500 ||
 355             (r300->screen->caps.is_rv350 &&
 356              r300->screen->info.drm_minor >= 6)) {
 357             OUT_CB_REG(R300_GB_Z_PEQ_CONFIG, 0);
 358         }
 359         END_CB;
 360     }
 361 }
 362
 363 struct pipe_context* r300_create_context(struct pipe_screen* screen,
 364                                          void *priv)
 365 {
 366     struct r300_context* r300 = CALLOC_STRUCT(r300_context);
 367     struct r300_screen* r300screen = r300_screen(screen);
 368     struct radeon_winsys *rws = r300screen->rws;
 369
 370     if (!r300)
 371         return NULL;
 372
 373     r300->rws = rws;
 374     r300->screen = r300screen;
 375
 376     r300->context.screen = screen;
 377     r300->context.priv = priv;
 378
 379     r300->context.destroy = r300_destroy_context;
 380
 381     util_slab_create(&r300->pool_transfers,
 382                      sizeof(struct pipe_transfer), 64,
 383                      UTIL_SLAB_SINGLETHREADED);
 384
 385     r300->cs = rws->cs_create(rws, RING_GFX, r300_flush_callback, r300, NULL);
 386     if (r300->cs == NULL)
 387         goto fail;
 388
 389     if (!r300screen->caps.has_tcl) {
 390         /* Create a Draw. This is used for SW TCL. */
 391         r300->draw = draw_create(&r300->context);
 392         if (r300->draw == NULL)
 393             goto fail;
 394         /* Enable our renderer. */
 395         draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300));
 396         /* Disable converting points/lines to triangles. */
 397         draw_wide_line_threshold(r300->draw, 10000000.f);
 398         draw_wide_point_threshold(r300->draw, 10000000.f);
 399         draw_wide_point_sprites(r300->draw, FALSE);
 400         draw_enable_line_stipple(r300->draw, TRUE);
 401         draw_enable_point_sprites(r300->draw, FALSE);
 402     }
 403
 404     if (!r300_setup_atoms(r300))
 405         goto fail;
 406
 407     r300_init_blit_functions(r300);
 408     r300_init_flush_functions(r300);
 409     r300_init_query_functions(r300);
 410     r300_init_state_functions(r300);
 411     r300_init_resource_functions(r300);
 412     r300_init_render_functions(r300);
 413     r300_init_states(&r300->context);
 414
 415     r300->context.create_video_codec = vl_create_decoder;
 416     r300->context.create_video_buffer = vl_video_buffer_create;
 417
 418     r300->uploader = u_upload_create(&r300->context, 256 * 1024, 4,
 419                                      PIPE_BIND_CUSTOM);
 420
 421     r300->blitter = util_blitter_create(&r300->context);
 422     if (r300->blitter == NULL)
 423         goto fail;
 424     r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
 425
 426     /* The KIL opcode needs the first texture unit to be enabled
 427      * on r3xx-r4xx. In order to calm down the CS checker, we bind this
 428      * dummy texture there. */
 429     if (!r300->screen->caps.is_r500) {
 430         struct pipe_resource *tex;
 431         struct pipe_resource rtempl = {{0}};
 432         struct pipe_sampler_view vtempl = {{0}};
 433
 434         rtempl.target = PIPE_TEXTURE_2D;
 435         rtempl.format = PIPE_FORMAT_I8_UNORM;
 436         rtempl.usage = PIPE_USAGE_IMMUTABLE;
 437         rtempl.width0 = 1;
 438         rtempl.height0 = 1;
 439         rtempl.depth0 = 1;
 440         tex = screen->resource_create(screen, &rtempl);
 441
 442         u_sampler_view_default_template(&vtempl, tex, tex->format);
 443
 444         r300->texkill_sampler = (struct r300_sampler_view*)
 445             r300->context.create_sampler_view(&r300->context, tex, &vtempl);
 446
 447         pipe_resource_reference(&tex, NULL);
 448     }
 449
 450     if (r300screen->caps.has_tcl) {
 451         struct pipe_resource vb;
 452         memset(&vb, 0, sizeof(vb));
 453         vb.target = PIPE_BUFFER;
 454         vb.format = PIPE_FORMAT_R8_UNORM;
 455         vb.usage = PIPE_USAGE_DEFAULT;
 456         vb.width0 = sizeof(float) * 16;
 457         vb.height0 = 1;
 458         vb.depth0 = 1;
 459
 460         r300->dummy_vb.buffer = screen->resource_create(screen, &vb);
 461         r300->context.set_vertex_buffers(&r300->context, 0, 1, &r300->dummy_vb);
 462     }
 463
 464     {
 465         struct pipe_depth_stencil_alpha_state dsa;
 466         memset(&dsa, 0, sizeof(dsa));
 467         dsa.depth.writemask = 1;
 468
 469         r300->dsa_decompress_zmask =
 470             r300->context.create_depth_stencil_alpha_state(&r300->context,
 471                                                            &dsa);
 472     }
 473
 474     r300->hyperz_time_of_last_flush = os_time_get();
 475
 476     /* Register allocator state */
 477     rc_init_regalloc_state(&r300->fs_regalloc_state);
 478
 479     /* Print driver info. */
 480 #ifdef DEBUG
 481     {
 482 #else
 483     if (DBG_ON(r300, DBG_INFO)) {
 484 #endif
 485         fprintf(stderr,
 486                 "r300: DRM version: %d.%d.%d, Name: %s, ID: 0x%04x, GB: %d, Z: %d\n"
 487                 "r300: GART size: %"PRIu64" MB, VRAM size: %"PRIu64" MB\n"
 488                 "r300: AA compression RAM: %s, Z compression RAM: %s, HiZ RAM: %s\n",
 489                 r300->screen->info.drm_major,
 490                 r300->screen->info.drm_minor,
 491                 r300->screen->info.drm_patchlevel,
 492                 screen->get_name(screen),
 493                 r300->screen->info.pci_id,
 494                 r300->screen->info.r300_num_gb_pipes,
 495                 r300->screen->info.r300_num_z_pipes,
 496                 r300->screen->info.gart_size >> 20,
 497                 r300->screen->info.vram_size >> 20,
 498                 "YES", /* XXX really? */
 499                 r300->screen->caps.zmask_ram ? "YES" : "NO",
 500                 r300->screen->caps.hiz_ram ? "YES" : "NO");
 501     }
 502
 503     return &r300->context;
 504
 505 fail:
 506     r300_destroy_context(&r300->context);
 507     return NULL;
 508 }