2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #include "draw/draw_context.h"
25 #include "util/u_memory.h"
26 #include "util/u_sampler.h"
27 #include "util/u_simple_list.h"
28 #include "util/u_upload_mgr.h"
29 #include "os/os_time.h"
30 #include "vl/vl_decoder.h"
31 #include "vl/vl_video_buffer.h"
34 #include "r300_context.h"
35 #include "r300_emit.h"
36 #include "r300_screen.h"
37 #include "r300_screen_buffer.h"
39 static void r300_update_num_contexts(struct r300_screen
*r300screen
,
42 pipe_mutex_lock(r300screen
->num_contexts_mutex
);
44 r300screen
->num_contexts
++;
46 if (r300screen
->num_contexts
> 1)
47 util_slab_set_thread_safety(&r300screen
->pool_buffers
,
48 UTIL_SLAB_MULTITHREADED
);
50 r300screen
->num_contexts
--;
52 if (r300screen
->num_contexts
<= 1)
53 util_slab_set_thread_safety(&r300screen
->pool_buffers
,
54 UTIL_SLAB_SINGLETHREADED
);
56 pipe_mutex_unlock(r300screen
->num_contexts_mutex
);
59 static void r300_release_referenced_objects(struct r300_context
*r300
)
61 struct pipe_framebuffer_state
*fb
=
62 (struct pipe_framebuffer_state
*)r300
->fb_state
.state
;
63 struct r300_textures_state
*textures
=
64 (struct r300_textures_state
*)r300
->textures_state
.state
;
67 /* Framebuffer state. */
68 util_unreference_framebuffer_state(fb
);
71 for (i
= 0; i
< textures
->sampler_view_count
; i
++)
72 pipe_sampler_view_reference(
73 (struct pipe_sampler_view
**)&textures
->sampler_views
[i
], NULL
);
75 /* The special dummy texture for texkill. */
76 if (r300
->texkill_sampler
) {
77 pipe_sampler_view_reference(
78 (struct pipe_sampler_view
**)&r300
->texkill_sampler
,
82 /* Manually-created vertex buffers. */
83 pipe_resource_reference(&r300
->dummy_vb
, NULL
);
84 pipe_resource_reference(&r300
->vbo
, NULL
);
86 r300
->context
.delete_depth_stencil_alpha_state(&r300
->context
,
87 r300
->dsa_decompress_zmask
);
90 static void r300_destroy_context(struct pipe_context
* context
)
92 struct r300_context
* r300
= r300_context(context
);
94 if (r300
->cs
&& r300
->hyperz_enabled
) {
95 r300
->rws
->cs_request_feature(r300
->cs
, RADEON_FID_R300_HYPERZ_ACCESS
, FALSE
);
99 util_blitter_destroy(r300
->blitter
);
101 draw_destroy(r300
->draw
);
104 u_vbuf_destroy(r300
->vbuf_mgr
);
106 /* XXX: This function assumes r300->query_list was initialized */
107 r300_release_referenced_objects(r300
);
110 r300
->rws
->cs_destroy(r300
->cs
);
112 /* XXX: No way to tell if this was initialized or not? */
113 util_slab_destroy(&r300
->pool_transfers
);
115 r300_update_num_contexts(r300
->screen
, -1);
117 /* Free the structs allocated in r300_setup_atoms() */
118 if (r300
->aa_state
.state
) {
119 FREE(r300
->aa_state
.state
);
120 FREE(r300
->blend_color_state
.state
);
121 FREE(r300
->clip_state
.state
);
122 FREE(r300
->fb_state
.state
);
123 FREE(r300
->gpu_flush
.state
);
124 FREE(r300
->hyperz_state
.state
);
125 FREE(r300
->invariant_state
.state
);
126 FREE(r300
->rs_block_state
.state
);
127 FREE(r300
->scissor_state
.state
);
128 FREE(r300
->textures_state
.state
);
129 FREE(r300
->vap_invariant_state
.state
);
130 FREE(r300
->viewport_state
.state
);
131 FREE(r300
->ztop_state
.state
);
132 FREE(r300
->fs_constants
.state
);
133 FREE(r300
->vs_constants
.state
);
134 if (!r300
->screen
->caps
.has_tcl
) {
135 FREE(r300
->vertex_stream_state
.state
);
141 static void r300_flush_callback(void *data
, unsigned flags
)
143 struct r300_context
* const cs_context_copy
= data
;
145 r300_flush(&cs_context_copy
->context
, flags
, NULL
);
148 #define R300_INIT_ATOM(atomname, atomsize) \
150 r300->atomname.name = #atomname; \
151 r300->atomname.state = NULL; \
152 r300->atomname.size = atomsize; \
153 r300->atomname.emit = r300_emit_##atomname; \
154 r300->atomname.dirty = FALSE; \
157 #define R300_ALLOC_ATOM(atomname, statetype) \
159 r300->atomname.state = CALLOC_STRUCT(statetype); \
160 if (r300->atomname.state == NULL) \
164 static boolean
r300_setup_atoms(struct r300_context
* r300
)
166 boolean is_rv350
= r300
->screen
->caps
.is_rv350
;
167 boolean is_r500
= r300
->screen
->caps
.is_r500
;
168 boolean has_tcl
= r300
->screen
->caps
.has_tcl
;
169 boolean drm_2_6_0
= r300
->screen
->info
.drm_minor
>= 6;
171 /* Create the actual atom list.
173 * Some atoms never change size, others change every emit - those have
174 * the size of 0 here.
176 * NOTE: The framebuffer state is split into these atoms:
177 * - gpu_flush (unpipelined regs)
178 * - aa_state (unpipelined regs)
179 * - fb_state (unpipelined regs)
180 * - hyperz_state (unpipelined regs followed by pipelined ones)
181 * - fb_state_pipelined (pipelined regs)
182 * The motivation behind this is to be able to emit a strict
183 * subset of the regs, and to have reasonable register ordering. */
184 /* SC, GB (unpipelined), RB3D (unpipelined), ZB (unpipelined). */
185 R300_INIT_ATOM(gpu_flush
, 9);
186 R300_INIT_ATOM(aa_state
, 4);
187 R300_INIT_ATOM(fb_state
, 0);
188 R300_INIT_ATOM(hyperz_state
, is_r500
|| (is_rv350
&& drm_2_6_0
) ? 10 : 8);
189 /* ZB (unpipelined), SC. */
190 R300_INIT_ATOM(ztop_state
, 2);
192 R300_INIT_ATOM(dsa_state
, is_r500
? (drm_2_6_0
? 10 : 8) : 6);
194 R300_INIT_ATOM(blend_state
, 8);
195 R300_INIT_ATOM(blend_color_state
, is_r500
? 3 : 2);
197 R300_INIT_ATOM(scissor_state
, 3);
198 /* GB, FG, GA, SU, SC, RB3D. */
199 R300_INIT_ATOM(invariant_state
, 16 + (is_rv350
? 4 : 0) + (is_r500
? 4 : 0));
201 R300_INIT_ATOM(viewport_state
, 9);
202 R300_INIT_ATOM(pvs_flush
, 2);
203 R300_INIT_ATOM(vap_invariant_state
, is_r500
? 11 : 9);
204 R300_INIT_ATOM(vertex_stream_state
, 0);
205 R300_INIT_ATOM(vs_state
, 0);
206 R300_INIT_ATOM(vs_constants
, 0);
207 R300_INIT_ATOM(clip_state
, has_tcl
? 5 + (6 * 4) : 2);
208 /* VAP, RS, GA, GB, SU, SC. */
209 R300_INIT_ATOM(rs_block_state
, 0);
210 R300_INIT_ATOM(rs_state
, 0);
212 R300_INIT_ATOM(fb_state_pipelined
, 8);
214 R300_INIT_ATOM(fs
, 0);
215 R300_INIT_ATOM(fs_rc_constant_state
, 0);
216 R300_INIT_ATOM(fs_constants
, 0);
218 R300_INIT_ATOM(texture_cache_inval
, 2);
219 R300_INIT_ATOM(textures_state
, 0);
221 R300_INIT_ATOM(hiz_clear
, r300
->screen
->caps
.hiz_ram
> 0 ? 4 : 0);
223 R300_INIT_ATOM(zmask_clear
, r300
->screen
->caps
.zmask_ram
> 0 ? 4 : 0);
224 /* ZB (unpipelined), SU. */
225 R300_INIT_ATOM(query_start
, 4);
227 /* Replace emission functions for r500. */
229 r300
->fs
.emit
= r500_emit_fs
;
230 r300
->fs_rc_constant_state
.emit
= r500_emit_fs_rc_constant_state
;
231 r300
->fs_constants
.emit
= r500_emit_fs_constants
;
234 /* Some non-CSO atoms need explicit space to store the state locally. */
235 R300_ALLOC_ATOM(aa_state
, r300_aa_state
);
236 R300_ALLOC_ATOM(blend_color_state
, r300_blend_color_state
);
237 R300_ALLOC_ATOM(clip_state
, r300_clip_state
);
238 R300_ALLOC_ATOM(hyperz_state
, r300_hyperz_state
);
239 R300_ALLOC_ATOM(invariant_state
, r300_invariant_state
);
240 R300_ALLOC_ATOM(textures_state
, r300_textures_state
);
241 R300_ALLOC_ATOM(vap_invariant_state
, r300_vap_invariant_state
);
242 R300_ALLOC_ATOM(viewport_state
, r300_viewport_state
);
243 R300_ALLOC_ATOM(ztop_state
, r300_ztop_state
);
244 R300_ALLOC_ATOM(fb_state
, pipe_framebuffer_state
);
245 R300_ALLOC_ATOM(gpu_flush
, pipe_framebuffer_state
);
246 R300_ALLOC_ATOM(scissor_state
, pipe_scissor_state
);
247 R300_ALLOC_ATOM(rs_block_state
, r300_rs_block
);
248 R300_ALLOC_ATOM(fs_constants
, r300_constant_buffer
);
249 R300_ALLOC_ATOM(vs_constants
, r300_constant_buffer
);
250 if (!r300
->screen
->caps
.has_tcl
) {
251 R300_ALLOC_ATOM(vertex_stream_state
, r300_vertex_stream_state
);
254 /* Some non-CSO atoms don't use the state pointer. */
255 r300
->fb_state_pipelined
.allow_null_state
= TRUE
;
256 r300
->fs_rc_constant_state
.allow_null_state
= TRUE
;
257 r300
->pvs_flush
.allow_null_state
= TRUE
;
258 r300
->query_start
.allow_null_state
= TRUE
;
259 r300
->texture_cache_inval
.allow_null_state
= TRUE
;
261 /* Some states must be marked as dirty here to properly set up
262 * hardware in the first command stream. */
263 r300_mark_atom_dirty(r300
, &r300
->invariant_state
);
264 r300_mark_atom_dirty(r300
, &r300
->pvs_flush
);
265 r300_mark_atom_dirty(r300
, &r300
->vap_invariant_state
);
266 r300_mark_atom_dirty(r300
, &r300
->texture_cache_inval
);
267 r300_mark_atom_dirty(r300
, &r300
->textures_state
);
272 /* Not every state tracker calls every driver function before the first draw
273 * call and we must initialize the command buffers somehow. */
274 static void r300_init_states(struct pipe_context
*pipe
)
276 struct r300_context
*r300
= r300_context(pipe
);
277 struct pipe_blend_color bc
= {{0}};
278 struct pipe_clip_state cs
= {{{0}}};
279 struct pipe_scissor_state ss
= {0};
280 struct r300_clip_state
*clip
=
281 (struct r300_clip_state
*)r300
->clip_state
.state
;
282 struct r300_gpu_flush
*gpuflush
=
283 (struct r300_gpu_flush
*)r300
->gpu_flush
.state
;
284 struct r300_vap_invariant_state
*vap_invariant
=
285 (struct r300_vap_invariant_state
*)r300
->vap_invariant_state
.state
;
286 struct r300_invariant_state
*invariant
=
287 (struct r300_invariant_state
*)r300
->invariant_state
.state
;
291 pipe
->set_blend_color(pipe
, &bc
);
292 pipe
->set_scissor_state(pipe
, &ss
);
294 /* Initialize the clip state. */
295 if (r300
->screen
->caps
.has_tcl
) {
296 pipe
->set_clip_state(pipe
, &cs
);
298 BEGIN_CB(clip
->cb
, 2);
299 OUT_CB_REG(R300_VAP_CLIP_CNTL
, R300_CLIP_DISABLE
);
303 /* Initialize the GPU flush. */
305 BEGIN_CB(gpuflush
->cb_flush_clean
, 6);
307 /* Flush and free renderbuffer caches. */
308 OUT_CB_REG(R300_RB3D_DSTCACHE_CTLSTAT
,
309 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS
|
310 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D
);
311 OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT
,
312 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE
|
313 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE
);
315 /* Wait until the GPU is idle.
316 * This fixes random pixels sometimes appearing probably caused
317 * by incomplete rendering. */
318 OUT_CB_REG(RADEON_WAIT_UNTIL
, RADEON_WAIT_3D_IDLECLEAN
);
322 /* Initialize the VAP invariant state. */
324 BEGIN_CB(vap_invariant
->cb
, r300
->vap_invariant_state
.size
);
325 OUT_CB_REG(VAP_PVS_VTX_TIMEOUT_REG
, 0xffff);
326 OUT_CB_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ
, 4);
331 OUT_CB_REG(R300_VAP_PSC_SGN_NORM_CNTL
, R300_SGN_NORM_NO_ZERO
);
333 if (r300
->screen
->caps
.is_r500
) {
334 OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL
, 0);
339 /* Initialize the invariant state. */
341 BEGIN_CB(invariant
->cb
, r300
->invariant_state
.size
);
342 OUT_CB_REG(R300_GB_SELECT
, 0);
343 OUT_CB_REG(R300_FG_FOG_BLEND
, 0);
344 OUT_CB_REG(R300_GA_OFFSET
, 0);
345 OUT_CB_REG(R300_SU_TEX_WRAP
, 0);
346 OUT_CB_REG(R300_SU_DEPTH_SCALE
, 0x4B7FFFFF);
347 OUT_CB_REG(R300_SU_DEPTH_OFFSET
, 0);
348 OUT_CB_REG(R300_SC_EDGERULE
, 0x2DA49525);
349 OUT_CB_REG(R300_SC_SCREENDOOR
, 0xffffff);
351 if (r300
->screen
->caps
.is_rv350
) {
352 OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
, 0x01010101);
353 OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
, 0xFEFEFEFE);
356 if (r300
->screen
->caps
.is_r500
) {
357 OUT_CB_REG(R500_GA_COLOR_CONTROL_PS3
, 0);
358 OUT_CB_REG(R500_SU_TEX_WRAP_PS3
, 0);
363 /* Initialize the hyperz state. */
365 struct r300_hyperz_state
*hyperz
=
366 (struct r300_hyperz_state
*)r300
->hyperz_state
.state
;
367 BEGIN_CB(&hyperz
->cb_flush_begin
, r300
->hyperz_state
.size
);
368 OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT
,
369 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE
);
370 OUT_CB_REG(R300_ZB_BW_CNTL
, 0);
371 OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE
, 0);
372 OUT_CB_REG(R300_SC_HYPERZ
, R300_SC_HYPERZ_ADJ_2
);
374 if (r300
->screen
->caps
.is_r500
||
375 (r300
->screen
->caps
.is_rv350
&&
376 r300
->screen
->info
.drm_minor
>= 6)) {
377 OUT_CB_REG(R300_GB_Z_PEQ_CONFIG
, 0);
383 struct pipe_context
* r300_create_context(struct pipe_screen
* screen
,
386 struct r300_context
* r300
= CALLOC_STRUCT(r300_context
);
387 struct r300_screen
* r300screen
= r300_screen(screen
);
388 struct radeon_winsys
*rws
= r300screen
->rws
;
393 r300_update_num_contexts(r300screen
, 1);
396 r300
->screen
= r300screen
;
398 r300
->context
.winsys
= (struct pipe_winsys
*)rws
;
399 r300
->context
.screen
= screen
;
400 r300
->context
.priv
= priv
;
402 r300
->context
.destroy
= r300_destroy_context
;
404 util_slab_create(&r300
->pool_transfers
,
405 sizeof(struct pipe_transfer
), 64,
406 UTIL_SLAB_SINGLETHREADED
);
408 r300
->cs
= rws
->cs_create(rws
);
409 if (r300
->cs
== NULL
)
412 if (!r300screen
->caps
.has_tcl
) {
413 /* Create a Draw. This is used for SW TCL. */
414 r300
->draw
= draw_create(&r300
->context
);
415 if (r300
->draw
== NULL
)
417 /* Enable our renderer. */
418 draw_set_rasterize_stage(r300
->draw
, r300_draw_stage(r300
));
419 /* Disable converting points/lines to triangles. */
420 draw_wide_line_threshold(r300
->draw
, 10000000.f
);
421 draw_wide_point_threshold(r300
->draw
, 10000000.f
);
424 if (!r300_setup_atoms(r300
))
427 r300_init_blit_functions(r300
);
428 r300_init_flush_functions(r300
);
429 r300_init_query_functions(r300
);
430 r300_init_state_functions(r300
);
431 r300_init_resource_functions(r300
);
433 r300
->context
.create_video_decoder
= vl_create_decoder
;
434 r300
->context
.create_video_buffer
= vl_video_buffer_create
;
436 r300
->vbuf_mgr
= u_vbuf_create(&r300
->context
, 1024 * 1024, 16,
437 PIPE_BIND_VERTEX_BUFFER
|
438 PIPE_BIND_INDEX_BUFFER
,
439 U_VERTEX_FETCH_DWORD_ALIGNED
);
442 r300
->vbuf_mgr
->caps
.format_fixed32
= 0;
444 r300
->blitter
= util_blitter_create(&r300
->context
);
445 if (r300
->blitter
== NULL
)
448 /* Render functions must be initialized after blitter. */
449 r300_init_render_functions(r300
);
450 r300_init_states(&r300
->context
);
452 rws
->cs_set_flush_callback(r300
->cs
, r300_flush_callback
, r300
);
454 /* The KIL opcode needs the first texture unit to be enabled
455 * on r3xx-r4xx. In order to calm down the CS checker, we bind this
456 * dummy texture there. */
457 if (!r300
->screen
->caps
.is_r500
) {
458 struct pipe_resource
*tex
;
459 struct pipe_resource rtempl
= {{0}};
460 struct pipe_sampler_view vtempl
= {{0}};
462 rtempl
.target
= PIPE_TEXTURE_2D
;
463 rtempl
.format
= PIPE_FORMAT_I8_UNORM
;
464 rtempl
.bind
= PIPE_BIND_SAMPLER_VIEW
;
465 rtempl
.usage
= PIPE_USAGE_IMMUTABLE
;
469 tex
= screen
->resource_create(screen
, &rtempl
);
471 u_sampler_view_default_template(&vtempl
, tex
, tex
->format
);
473 r300
->texkill_sampler
= (struct r300_sampler_view
*)
474 r300
->context
.create_sampler_view(&r300
->context
, tex
, &vtempl
);
476 pipe_resource_reference(&tex
, NULL
);
480 struct pipe_resource vb
;
481 memset(&vb
, 0, sizeof(vb
));
482 vb
.target
= PIPE_BUFFER
;
483 vb
.format
= PIPE_FORMAT_R8_UNORM
;
484 vb
.bind
= PIPE_BIND_VERTEX_BUFFER
;
485 vb
.usage
= PIPE_USAGE_IMMUTABLE
;
486 vb
.width0
= sizeof(float) * 16;
490 r300
->dummy_vb
= screen
->resource_create(screen
, &vb
);
494 struct pipe_depth_stencil_alpha_state dsa
;
495 memset(&dsa
, 0, sizeof(dsa
));
496 dsa
.depth
.writemask
= 1;
498 r300
->dsa_decompress_zmask
=
499 r300
->context
.create_depth_stencil_alpha_state(&r300
->context
,
503 r300
->hyperz_time_of_last_flush
= os_time_get();
505 /* Print driver info. */
509 if (DBG_ON(r300
, DBG_INFO
)) {
512 "r300: DRM version: %d.%d.%d, Name: %s, ID: 0x%04x, GB: %d, Z: %d\n"
513 "r300: GART size: %d MB, VRAM size: %d MB\n"
514 "r300: AA compression RAM: %s, Z compression RAM: %s, HiZ RAM: %s\n",
515 r300
->screen
->info
.drm_major
,
516 r300
->screen
->info
.drm_minor
,
517 r300
->screen
->info
.drm_patchlevel
,
518 screen
->get_name(screen
),
519 r300
->screen
->info
.pci_id
,
520 r300
->screen
->info
.r300_num_gb_pipes
,
521 r300
->screen
->info
.r300_num_z_pipes
,
522 r300
->screen
->info
.gart_size
>> 20,
523 r300
->screen
->info
.vram_size
>> 20,
524 "YES", /* XXX really? */
525 r300
->screen
->caps
.zmask_ram
? "YES" : "NO",
526 r300
->screen
->caps
.hiz_ram
? "YES" : "NO");
529 return &r300
->context
;
532 r300_destroy_context(&r300
->context
);