src/gallium/drivers/r300/r300_context.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "draw/draw_context.h"
  24
  25 #include "util/u_memory.h"
  26 #include "util/u_sampler.h"
  27 #include "util/simple_list.h"
  28 #include "util/u_upload_mgr.h"
  29 #include "os/os_time.h"
  30 #include "vl/vl_decoder.h"
  31 #include "vl/vl_video_buffer.h"
  32
  33 #include "r300_cb.h"
  34 #include "r300_context.h"
  35 #include "r300_emit.h"
  36 #include "r300_screen.h"
  37 #include "r300_screen_buffer.h"
  38 #include "compiler/radeon_regalloc.h"
  39
  40 #include <inttypes.h>
  41
  42 static void r300_release_referenced_objects(struct r300_context *r300)
  43 {
  44     struct pipe_framebuffer_state *fb =
  45             (struct pipe_framebuffer_state*)r300->fb_state.state;
  46     struct r300_textures_state *textures =
  47             (struct r300_textures_state*)r300->textures_state.state;
  48     unsigned i;
  49
  50     /* Framebuffer state. */
  51     util_unreference_framebuffer_state(fb);
  52
  53     /* Textures. */
  54     for (i = 0; i < textures->sampler_view_count; i++)
  55         pipe_sampler_view_reference(
  56                 (struct pipe_sampler_view**)&textures->sampler_views[i], NULL);
  57
  58     /* The special dummy texture for texkill. */
  59     if (r300->texkill_sampler) {
  60         pipe_sampler_view_reference(
  61                 (struct pipe_sampler_view**)&r300->texkill_sampler,
  62                 NULL);
  63     }
  64
  65     /* Manually-created vertex buffers. */
  66     pipe_resource_reference(&r300->dummy_vb.buffer, NULL);
  67     pb_reference(&r300->vbo, NULL);
  68
  69     r300->context.delete_depth_stencil_alpha_state(&r300->context,
  70                                                    r300->dsa_decompress_zmask);
  71 }
  72
  73 static void r300_destroy_context(struct pipe_context* context)
  74 {
  75     struct r300_context* r300 = r300_context(context);
  76
  77     if (r300->cs && r300->hyperz_enabled) {
  78         r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_HYPERZ_ACCESS, FALSE);
  79     }
  80     if (r300->cs && r300->cmask_access) {
  81         r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_CMASK_ACCESS, FALSE);
  82     }
  83
  84     if (r300->blitter)
  85         util_blitter_destroy(r300->blitter);
  86     if (r300->draw)
  87         draw_destroy(r300->draw);
  88
  89     if (r300->uploader)
  90         u_upload_destroy(r300->uploader);
  91
  92     /* XXX: This function assumes r300->query_list was initialized */
  93     r300_release_referenced_objects(r300);
  94
  95     if (r300->cs)
  96         r300->rws->cs_destroy(r300->cs);
  97     if (r300->ctx)
  98         r300->rws->ctx_destroy(r300->ctx);
  99
 100     rc_destroy_regalloc_state(&r300->fs_regalloc_state);
 101
 102     /* XXX: No way to tell if this was initialized or not? */
 103     util_slab_destroy(&r300->pool_transfers);
 104
 105     /* Free the structs allocated in r300_setup_atoms() */
 106     if (r300->aa_state.state) {
 107         FREE(r300->aa_state.state);
 108         FREE(r300->blend_color_state.state);
 109         FREE(r300->clip_state.state);
 110         FREE(r300->fb_state.state);
 111         FREE(r300->gpu_flush.state);
 112         FREE(r300->hyperz_state.state);
 113         FREE(r300->invariant_state.state);
 114         FREE(r300->rs_block_state.state);
 115         FREE(r300->sample_mask.state);
 116         FREE(r300->scissor_state.state);
 117         FREE(r300->textures_state.state);
 118         FREE(r300->vap_invariant_state.state);
 119         FREE(r300->viewport_state.state);
 120         FREE(r300->ztop_state.state);
 121         FREE(r300->fs_constants.state);
 122         FREE(r300->vs_constants.state);
 123         if (!r300->screen->caps.has_tcl) {
 124             FREE(r300->vertex_stream_state.state);
 125         }
 126     }
 127     FREE(r300);
 128 }
 129
 130 static void r300_flush_callback(void *data, unsigned flags,
 131                                 struct pipe_fence_handle **fence)
 132 {
 133     struct r300_context* const cs_context_copy = data;
 134
 135     r300_flush(&cs_context_copy->context, flags, fence);
 136 }
 137
 138 #define R300_INIT_ATOM(atomname, atomsize) \
 139  do { \
 140     r300->atomname.name = #atomname; \
 141     r300->atomname.state = NULL; \
 142     r300->atomname.size = atomsize; \
 143     r300->atomname.emit = r300_emit_##atomname; \
 144     r300->atomname.dirty = FALSE; \
 145  } while (0)
 146
 147 #define R300_ALLOC_ATOM(atomname, statetype) \
 148 do { \
 149     r300->atomname.state = CALLOC_STRUCT(statetype); \
 150     if (r300->atomname.state == NULL) \
 151         return FALSE; \
 152 } while (0)
 153
 154 static boolean r300_setup_atoms(struct r300_context* r300)
 155 {
 156     boolean is_rv350 = r300->screen->caps.is_rv350;
 157     boolean is_r500 = r300->screen->caps.is_r500;
 158     boolean has_tcl = r300->screen->caps.has_tcl;
 159     boolean drm_2_6_0 = r300->screen->info.drm_minor >= 6;
 160
 161     /* Create the actual atom list.
 162      *
 163      * Some atoms never change size, others change every emit - those have
 164      * the size of 0 here.
 165      *
 166      * NOTE: The framebuffer state is split into these atoms:
 167      * - gpu_flush          (unpipelined regs)
 168      * - aa_state           (unpipelined regs)
 169      * - fb_state           (unpipelined regs)
 170      * - hyperz_state       (unpipelined regs followed by pipelined ones)
 171      * - fb_state_pipelined (pipelined regs)
 172      * The motivation behind this is to be able to emit a strict
 173      * subset of the regs, and to have reasonable register ordering. */
 174     /* SC, GB (unpipelined), RB3D (unpipelined), ZB (unpipelined). */
 175     R300_INIT_ATOM(gpu_flush, 9);
 176     R300_INIT_ATOM(aa_state, 4);
 177     R300_INIT_ATOM(fb_state, 0);
 178     R300_INIT_ATOM(hyperz_state, is_r500 || (is_rv350 && drm_2_6_0) ? 10 : 8);
 179     /* ZB (unpipelined), SC. */
 180     R300_INIT_ATOM(ztop_state, 2);
 181     /* ZB, FG. */
 182     R300_INIT_ATOM(dsa_state, is_r500 ? (drm_2_6_0 ? 10 : 8) : 6);
 183     /* RB3D. */
 184     R300_INIT_ATOM(blend_state, 8);
 185     R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2);
 186     /* SC. */
 187     R300_INIT_ATOM(sample_mask, 2);
 188     R300_INIT_ATOM(scissor_state, 3);
 189     /* GB, FG, GA, SU, SC, RB3D. */
 190     R300_INIT_ATOM(invariant_state, 14 + (is_rv350 ? 4 : 0) + (is_r500 ? 4 : 0));
 191     /* VAP. */
 192     R300_INIT_ATOM(viewport_state, 9);
 193     R300_INIT_ATOM(pvs_flush, 2);
 194     R300_INIT_ATOM(vap_invariant_state, is_r500 ? 11 : 9);
 195     R300_INIT_ATOM(vertex_stream_state, 0);
 196     R300_INIT_ATOM(vs_state, 0);
 197     R300_INIT_ATOM(vs_constants, 0);
 198     R300_INIT_ATOM(clip_state, has_tcl ? 3 + (6 * 4) : 0);
 199     /* VAP, RS, GA, GB, SU, SC. */
 200     R300_INIT_ATOM(rs_block_state, 0);
 201     R300_INIT_ATOM(rs_state, 0);
 202     /* SC, US. */
 203     R300_INIT_ATOM(fb_state_pipelined, 8);
 204     /* US. */
 205     R300_INIT_ATOM(fs, 0);
 206     R300_INIT_ATOM(fs_rc_constant_state, 0);
 207     R300_INIT_ATOM(fs_constants, 0);
 208     /* TX. */
 209     R300_INIT_ATOM(texture_cache_inval, 2);
 210     R300_INIT_ATOM(textures_state, 0);
 211     /* Clear commands */
 212     R300_INIT_ATOM(hiz_clear, r300->screen->caps.hiz_ram > 0 ? 4 : 0);
 213     R300_INIT_ATOM(zmask_clear, r300->screen->caps.zmask_ram > 0 ? 4 : 0);
 214     R300_INIT_ATOM(cmask_clear, 4);
 215     /* ZB (unpipelined), SU. */
 216     R300_INIT_ATOM(query_start, 4);
 217
 218     /* Replace emission functions for r500. */
 219     if (is_r500) {
 220         r300->fs.emit = r500_emit_fs;
 221         r300->fs_rc_constant_state.emit = r500_emit_fs_rc_constant_state;
 222         r300->fs_constants.emit = r500_emit_fs_constants;
 223     }
 224
 225     /* Some non-CSO atoms need explicit space to store the state locally. */
 226     R300_ALLOC_ATOM(aa_state, r300_aa_state);
 227     R300_ALLOC_ATOM(blend_color_state, r300_blend_color_state);
 228     R300_ALLOC_ATOM(clip_state, r300_clip_state);
 229     R300_ALLOC_ATOM(hyperz_state, r300_hyperz_state);
 230     R300_ALLOC_ATOM(invariant_state, r300_invariant_state);
 231     R300_ALLOC_ATOM(textures_state, r300_textures_state);
 232     R300_ALLOC_ATOM(vap_invariant_state, r300_vap_invariant_state);
 233     R300_ALLOC_ATOM(viewport_state, r300_viewport_state);
 234     R300_ALLOC_ATOM(ztop_state, r300_ztop_state);
 235     R300_ALLOC_ATOM(fb_state, pipe_framebuffer_state);
 236     R300_ALLOC_ATOM(gpu_flush, pipe_framebuffer_state);
 237     r300->sample_mask.state = malloc(4);
 238     R300_ALLOC_ATOM(scissor_state, pipe_scissor_state);
 239     R300_ALLOC_ATOM(rs_block_state, r300_rs_block);
 240     R300_ALLOC_ATOM(fs_constants, r300_constant_buffer);
 241     R300_ALLOC_ATOM(vs_constants, r300_constant_buffer);
 242     if (!r300->screen->caps.has_tcl) {
 243         R300_ALLOC_ATOM(vertex_stream_state, r300_vertex_stream_state);
 244     }
 245
 246     /* Some non-CSO atoms don't use the state pointer. */
 247     r300->fb_state_pipelined.allow_null_state = TRUE;
 248     r300->fs_rc_constant_state.allow_null_state = TRUE;
 249     r300->pvs_flush.allow_null_state = TRUE;
 250     r300->query_start.allow_null_state = TRUE;
 251     r300->texture_cache_inval.allow_null_state = TRUE;
 252
 253     /* Some states must be marked as dirty here to properly set up
 254      * hardware in the first command stream. */
 255     r300_mark_atom_dirty(r300, &r300->invariant_state);
 256     r300_mark_atom_dirty(r300, &r300->pvs_flush);
 257     r300_mark_atom_dirty(r300, &r300->vap_invariant_state);
 258     r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
 259     r300_mark_atom_dirty(r300, &r300->textures_state);
 260
 261     return TRUE;
 262 }
 263
 264 /* Not every state tracker calls every driver function before the first draw
 265  * call and we must initialize the command buffers somehow. */
 266 static void r300_init_states(struct pipe_context *pipe)
 267 {
 268     struct r300_context *r300 = r300_context(pipe);
 269     struct pipe_blend_color bc = {{0}};
 270     struct pipe_clip_state cs = {{{0}}};
 271     struct pipe_scissor_state ss = {0};
 272     struct r300_gpu_flush *gpuflush =
 273             (struct r300_gpu_flush*)r300->gpu_flush.state;
 274     struct r300_vap_invariant_state *vap_invariant =
 275             (struct r300_vap_invariant_state*)r300->vap_invariant_state.state;
 276     struct r300_invariant_state *invariant =
 277             (struct r300_invariant_state*)r300->invariant_state.state;
 278
 279     CB_LOCALS;
 280
 281     pipe->set_blend_color(pipe, &bc);
 282     pipe->set_clip_state(pipe, &cs);
 283     pipe->set_scissor_states(pipe, 0, 1, &ss);
 284     pipe->set_sample_mask(pipe, ~0);
 285
 286     /* Initialize the GPU flush. */
 287     {
 288         BEGIN_CB(gpuflush->cb_flush_clean, 6);
 289
 290         /* Flush and free renderbuffer caches. */
 291         OUT_CB_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 292             R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 293             R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 294         OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT,
 295             R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 296             R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 297
 298         /* Wait until the GPU is idle.
 299          * This fixes random pixels sometimes appearing probably caused
 300          * by incomplete rendering. */
 301         OUT_CB_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
 302         END_CB;
 303     }
 304
 305     /* Initialize the VAP invariant state. */
 306     {
 307         BEGIN_CB(vap_invariant->cb, r300->vap_invariant_state.size);
 308         OUT_CB_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff);
 309         OUT_CB_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
 310         OUT_CB_32F(1.0);
 311         OUT_CB_32F(1.0);
 312         OUT_CB_32F(1.0);
 313         OUT_CB_32F(1.0);
 314         OUT_CB_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO);
 315
 316         if (r300->screen->caps.is_r500) {
 317             OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL, 0);
 318         }
 319         END_CB;
 320     }
 321
 322     /* Initialize the invariant state. */
 323     {
 324         BEGIN_CB(invariant->cb, r300->invariant_state.size);
 325         OUT_CB_REG(R300_GB_SELECT, 0);
 326         OUT_CB_REG(R300_FG_FOG_BLEND, 0);
 327         OUT_CB_REG(R300_GA_OFFSET, 0);
 328         OUT_CB_REG(R300_SU_TEX_WRAP, 0);
 329         OUT_CB_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF);
 330         OUT_CB_REG(R300_SU_DEPTH_OFFSET, 0);
 331         OUT_CB_REG(R300_SC_EDGERULE, 0x2DA49525);
 332
 333         if (r300->screen->caps.is_rv350) {
 334             OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x01010101);
 335             OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFEFEFEFE);
 336         }
 337
 338         if (r300->screen->caps.is_r500) {
 339             OUT_CB_REG(R500_GA_COLOR_CONTROL_PS3, 0);
 340             OUT_CB_REG(R500_SU_TEX_WRAP_PS3, 0);
 341         }
 342         END_CB;
 343     }
 344
 345     /* Initialize the hyperz state. */
 346     {
 347         struct r300_hyperz_state *hyperz =
 348             (struct r300_hyperz_state*)r300->hyperz_state.state;
 349         BEGIN_CB(&hyperz->cb_flush_begin, r300->hyperz_state.size);
 350         OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT,
 351                    R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE);
 352         OUT_CB_REG(R300_ZB_BW_CNTL, 0);
 353         OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE, 0);
 354         OUT_CB_REG(R300_SC_HYPERZ, R300_SC_HYPERZ_ADJ_2);
 355
 356         if (r300->screen->caps.is_r500 ||
 357             (r300->screen->caps.is_rv350 &&
 358              r300->screen->info.drm_minor >= 6)) {
 359             OUT_CB_REG(R300_GB_Z_PEQ_CONFIG, 0);
 360         }
 361         END_CB;
 362     }
 363 }
 364
 365 struct pipe_context* r300_create_context(struct pipe_screen* screen,
 366                                          void *priv, unsigned flags)
 367 {
 368     struct r300_context* r300 = CALLOC_STRUCT(r300_context);
 369     struct r300_screen* r300screen = r300_screen(screen);
 370     struct radeon_winsys *rws = r300screen->rws;
 371
 372     if (!r300)
 373         return NULL;
 374
 375     r300->rws = rws;
 376     r300->screen = r300screen;
 377
 378     r300->context.screen = screen;
 379     r300->context.priv = priv;
 380
 381     r300->context.destroy = r300_destroy_context;
 382
 383     util_slab_create(&r300->pool_transfers,
 384                      sizeof(struct pipe_transfer), 64,
 385                      UTIL_SLAB_SINGLETHREADED);
 386
 387     r300->ctx = rws->ctx_create(rws);
 388     if (!r300->ctx)
 389         goto fail;
 390
 391     r300->cs = rws->cs_create(r300->ctx, RING_GFX, r300_flush_callback, r300, NULL);
 392     if (r300->cs == NULL)
 393         goto fail;
 394
 395     if (!r300screen->caps.has_tcl) {
 396         /* Create a Draw. This is used for SW TCL. */
 397         r300->draw = draw_create(&r300->context);
 398         if (r300->draw == NULL)
 399             goto fail;
 400         /* Enable our renderer. */
 401         draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300));
 402         /* Disable converting points/lines to triangles. */
 403         draw_wide_line_threshold(r300->draw, 10000000.f);
 404         draw_wide_point_threshold(r300->draw, 10000000.f);
 405         draw_wide_point_sprites(r300->draw, FALSE);
 406         draw_enable_line_stipple(r300->draw, TRUE);
 407         draw_enable_point_sprites(r300->draw, FALSE);
 408     }
 409
 410     if (!r300_setup_atoms(r300))
 411         goto fail;
 412
 413     r300_init_blit_functions(r300);
 414     r300_init_flush_functions(r300);
 415     r300_init_query_functions(r300);
 416     r300_init_state_functions(r300);
 417     r300_init_resource_functions(r300);
 418     r300_init_render_functions(r300);
 419     r300_init_states(&r300->context);
 420
 421     r300->context.create_video_codec = vl_create_decoder;
 422     r300->context.create_video_buffer = vl_video_buffer_create;
 423
 424     r300->uploader = u_upload_create(&r300->context, 256 * 1024,
 425                                      PIPE_BIND_CUSTOM);
 426
 427     r300->blitter = util_blitter_create(&r300->context);
 428     if (r300->blitter == NULL)
 429         goto fail;
 430     r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
 431
 432     /* The KIL opcode needs the first texture unit to be enabled
 433      * on r3xx-r4xx. In order to calm down the CS checker, we bind this
 434      * dummy texture there. */
 435     if (!r300->screen->caps.is_r500) {
 436         struct pipe_resource *tex;
 437         struct pipe_resource rtempl = {{0}};
 438         struct pipe_sampler_view vtempl = {{0}};
 439
 440         rtempl.target = PIPE_TEXTURE_2D;
 441         rtempl.format = PIPE_FORMAT_I8_UNORM;
 442         rtempl.usage = PIPE_USAGE_IMMUTABLE;
 443         rtempl.width0 = 1;
 444         rtempl.height0 = 1;
 445         rtempl.depth0 = 1;
 446         tex = screen->resource_create(screen, &rtempl);
 447
 448         u_sampler_view_default_template(&vtempl, tex, tex->format);
 449
 450         r300->texkill_sampler = (struct r300_sampler_view*)
 451             r300->context.create_sampler_view(&r300->context, tex, &vtempl);
 452
 453         pipe_resource_reference(&tex, NULL);
 454     }
 455
 456     if (r300screen->caps.has_tcl) {
 457         struct pipe_resource vb;
 458         memset(&vb, 0, sizeof(vb));
 459         vb.target = PIPE_BUFFER;
 460         vb.format = PIPE_FORMAT_R8_UNORM;
 461         vb.usage = PIPE_USAGE_DEFAULT;
 462         vb.width0 = sizeof(float) * 16;
 463         vb.height0 = 1;
 464         vb.depth0 = 1;
 465
 466         r300->dummy_vb.buffer = screen->resource_create(screen, &vb);
 467         r300->context.set_vertex_buffers(&r300->context, 0, 1, &r300->dummy_vb);
 468     }
 469
 470     {
 471         struct pipe_depth_stencil_alpha_state dsa;
 472         memset(&dsa, 0, sizeof(dsa));
 473         dsa.depth.writemask = 1;
 474
 475         r300->dsa_decompress_zmask =
 476             r300->context.create_depth_stencil_alpha_state(&r300->context,
 477                                                            &dsa);
 478     }
 479
 480     r300->hyperz_time_of_last_flush = os_time_get();
 481
 482     /* Register allocator state */
 483     rc_init_regalloc_state(&r300->fs_regalloc_state);
 484
 485     /* Print driver info. */
 486 #ifdef DEBUG
 487     {
 488 #else
 489     if (DBG_ON(r300, DBG_INFO)) {
 490 #endif
 491         fprintf(stderr,
 492                 "r300: DRM version: %d.%d.%d, Name: %s, ID: 0x%04x, GB: %d, Z: %d\n"
 493                 "r300: GART size: %"PRIu64" MB, VRAM size: %"PRIu64" MB\n"
 494                 "r300: AA compression RAM: %s, Z compression RAM: %s, HiZ RAM: %s\n",
 495                 r300->screen->info.drm_major,
 496                 r300->screen->info.drm_minor,
 497                 r300->screen->info.drm_patchlevel,
 498                 screen->get_name(screen),
 499                 r300->screen->info.pci_id,
 500                 r300->screen->info.r300_num_gb_pipes,
 501                 r300->screen->info.r300_num_z_pipes,
 502                 r300->screen->info.gart_size >> 20,
 503                 r300->screen->info.vram_size >> 20,
 504                 "YES", /* XXX really? */
 505                 r300->screen->caps.zmask_ram ? "YES" : "NO",
 506                 r300->screen->caps.hiz_ram ? "YES" : "NO");
 507     }
 508
 509     return &r300->context;
 510
 511 fail:
 512     r300_destroy_context(&r300->context);
 513     return NULL;
 514 }