src/gallium/drivers/r300/r300_context.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "draw/draw_context.h"
  24
  25 #include "util/u_memory.h"
  26 #include "util/u_sampler.h"
  27 #include "util/u_simple_list.h"
  28 #include "util/u_upload_mgr.h"
  29 #include "os/os_time.h"
  30 #include "vl/vl_decoder.h"
  31 #include "vl/vl_video_buffer.h"
  32
  33 #include "r300_cb.h"
  34 #include "r300_context.h"
  35 #include "r300_emit.h"
  36 #include "r300_screen.h"
  37 #include "r300_screen_buffer.h"
  38
  39 static void r300_update_num_contexts(struct r300_screen *r300screen,
  40                                      int diff)
  41 {
  42     pipe_mutex_lock(r300screen->num_contexts_mutex);
  43     if (diff > 0) {
  44         r300screen->num_contexts++;
  45
  46         if (r300screen->num_contexts > 1)
  47             util_slab_set_thread_safety(&r300screen->pool_buffers,
  48                                         UTIL_SLAB_MULTITHREADED);
  49     } else {
  50         r300screen->num_contexts--;
  51
  52         if (r300screen->num_contexts <= 1)
  53             util_slab_set_thread_safety(&r300screen->pool_buffers,
  54                                         UTIL_SLAB_SINGLETHREADED);
  55     }
  56     pipe_mutex_unlock(r300screen->num_contexts_mutex);
  57 }
  58
  59 static void r300_release_referenced_objects(struct r300_context *r300)
  60 {
  61     struct pipe_framebuffer_state *fb =
  62             (struct pipe_framebuffer_state*)r300->fb_state.state;
  63     struct r300_textures_state *textures =
  64             (struct r300_textures_state*)r300->textures_state.state;
  65     unsigned i;
  66
  67     /* Framebuffer state. */
  68     util_unreference_framebuffer_state(fb);
  69
  70     /* Textures. */
  71     for (i = 0; i < textures->sampler_view_count; i++)
  72         pipe_sampler_view_reference(
  73                 (struct pipe_sampler_view**)&textures->sampler_views[i], NULL);
  74
  75     /* The special dummy texture for texkill. */
  76     if (r300->texkill_sampler) {
  77         pipe_sampler_view_reference(
  78                 (struct pipe_sampler_view**)&r300->texkill_sampler,
  79                 NULL);
  80     }
  81
  82     /* Manually-created vertex buffers. */
  83     pipe_resource_reference(&r300->dummy_vb.buffer, NULL);
  84     pipe_resource_reference(&r300->vbo, NULL);
  85
  86     r300->context.delete_depth_stencil_alpha_state(&r300->context,
  87                                                    r300->dsa_decompress_zmask);
  88 }
  89
  90 static void r300_destroy_context(struct pipe_context* context)
  91 {
  92     struct r300_context* r300 = r300_context(context);
  93
  94     if (r300->cs && r300->hyperz_enabled) {
  95         r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_HYPERZ_ACCESS, FALSE);
  96     }
  97
  98     if (r300->blitter)
  99         util_blitter_destroy(r300->blitter);
 100     if (r300->draw)
 101         draw_destroy(r300->draw);
 102
 103     u_upload_destroy(r300->uploader);
 104
 105     /* XXX: This function assumes r300->query_list was initialized */
 106     r300_release_referenced_objects(r300);
 107
 108     if (r300->cs)
 109         r300->rws->cs_destroy(r300->cs);
 110
 111     /* XXX: No way to tell if this was initialized or not? */
 112     util_slab_destroy(&r300->pool_transfers);
 113
 114     r300_update_num_contexts(r300->screen, -1);
 115
 116     /* Free the structs allocated in r300_setup_atoms() */
 117     if (r300->aa_state.state) {
 118         FREE(r300->aa_state.state);
 119         FREE(r300->blend_color_state.state);
 120         FREE(r300->clip_state.state);
 121         FREE(r300->fb_state.state);
 122         FREE(r300->gpu_flush.state);
 123         FREE(r300->hyperz_state.state);
 124         FREE(r300->invariant_state.state);
 125         FREE(r300->rs_block_state.state);
 126         FREE(r300->scissor_state.state);
 127         FREE(r300->textures_state.state);
 128         FREE(r300->vap_invariant_state.state);
 129         FREE(r300->viewport_state.state);
 130         FREE(r300->ztop_state.state);
 131         FREE(r300->fs_constants.state);
 132         FREE(r300->vs_constants.state);
 133         if (!r300->screen->caps.has_tcl) {
 134             FREE(r300->vertex_stream_state.state);
 135         }
 136     }
 137     FREE(r300);
 138 }
 139
 140 static void r300_flush_callback(void *data, unsigned flags)
 141 {
 142     struct r300_context* const cs_context_copy = data;
 143
 144     r300_flush(&cs_context_copy->context, flags, NULL);
 145 }
 146
 147 #define R300_INIT_ATOM(atomname, atomsize) \
 148  do { \
 149     r300->atomname.name = #atomname; \
 150     r300->atomname.state = NULL; \
 151     r300->atomname.size = atomsize; \
 152     r300->atomname.emit = r300_emit_##atomname; \
 153     r300->atomname.dirty = FALSE; \
 154  } while (0)
 155
 156 #define R300_ALLOC_ATOM(atomname, statetype) \
 157 do { \
 158     r300->atomname.state = CALLOC_STRUCT(statetype); \
 159     if (r300->atomname.state == NULL) \
 160         return FALSE; \
 161 } while (0)
 162
 163 static boolean r300_setup_atoms(struct r300_context* r300)
 164 {
 165     boolean is_rv350 = r300->screen->caps.is_rv350;
 166     boolean is_r500 = r300->screen->caps.is_r500;
 167     boolean has_tcl = r300->screen->caps.has_tcl;
 168     boolean drm_2_6_0 = r300->screen->info.drm_minor >= 6;
 169
 170     /* Create the actual atom list.
 171      *
 172      * Some atoms never change size, others change every emit - those have
 173      * the size of 0 here.
 174      *
 175      * NOTE: The framebuffer state is split into these atoms:
 176      * - gpu_flush          (unpipelined regs)
 177      * - aa_state           (unpipelined regs)
 178      * - fb_state           (unpipelined regs)
 179      * - hyperz_state       (unpipelined regs followed by pipelined ones)
 180      * - fb_state_pipelined (pipelined regs)
 181      * The motivation behind this is to be able to emit a strict
 182      * subset of the regs, and to have reasonable register ordering. */
 183     /* SC, GB (unpipelined), RB3D (unpipelined), ZB (unpipelined). */
 184     R300_INIT_ATOM(gpu_flush, 9);
 185     R300_INIT_ATOM(aa_state, 4);
 186     R300_INIT_ATOM(fb_state, 0);
 187     R300_INIT_ATOM(hyperz_state, is_r500 || (is_rv350 && drm_2_6_0) ? 10 : 8);
 188     /* ZB (unpipelined), SC. */
 189     R300_INIT_ATOM(ztop_state, 2);
 190     /* ZB, FG. */
 191     R300_INIT_ATOM(dsa_state, is_r500 ? (drm_2_6_0 ? 10 : 8) : 6);
 192     /* RB3D. */
 193     R300_INIT_ATOM(blend_state, 8);
 194     R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2);
 195     /* SC. */
 196     R300_INIT_ATOM(scissor_state, 3);
 197     /* GB, FG, GA, SU, SC, RB3D. */
 198     R300_INIT_ATOM(invariant_state, 16 + (is_rv350 ? 4 : 0) + (is_r500 ? 4 : 0));
 199     /* VAP. */
 200     R300_INIT_ATOM(viewport_state, 9);
 201     R300_INIT_ATOM(pvs_flush, 2);
 202     R300_INIT_ATOM(vap_invariant_state, is_r500 ? 11 : 9);
 203     R300_INIT_ATOM(vertex_stream_state, 0);
 204     R300_INIT_ATOM(vs_state, 0);
 205     R300_INIT_ATOM(vs_constants, 0);
 206     R300_INIT_ATOM(clip_state, has_tcl ? 3 + (6 * 4) : 0);
 207     /* VAP, RS, GA, GB, SU, SC. */
 208     R300_INIT_ATOM(rs_block_state, 0);
 209     R300_INIT_ATOM(rs_state, 0);
 210     /* SC, US. */
 211     R300_INIT_ATOM(fb_state_pipelined, 8);
 212     /* US. */
 213     R300_INIT_ATOM(fs, 0);
 214     R300_INIT_ATOM(fs_rc_constant_state, 0);
 215     R300_INIT_ATOM(fs_constants, 0);
 216     /* TX. */
 217     R300_INIT_ATOM(texture_cache_inval, 2);
 218     R300_INIT_ATOM(textures_state, 0);
 219     /* HiZ Clear */
 220     R300_INIT_ATOM(hiz_clear, r300->screen->caps.hiz_ram > 0 ? 4 : 0);
 221     /* zmask clear */
 222     R300_INIT_ATOM(zmask_clear, r300->screen->caps.zmask_ram > 0 ? 4 : 0);
 223     /* ZB (unpipelined), SU. */
 224     R300_INIT_ATOM(query_start, 4);
 225
 226     /* Replace emission functions for r500. */
 227     if (is_r500) {
 228         r300->fs.emit = r500_emit_fs;
 229         r300->fs_rc_constant_state.emit = r500_emit_fs_rc_constant_state;
 230         r300->fs_constants.emit = r500_emit_fs_constants;
 231     }
 232
 233     /* Some non-CSO atoms need explicit space to store the state locally. */
 234     R300_ALLOC_ATOM(aa_state, r300_aa_state);
 235     R300_ALLOC_ATOM(blend_color_state, r300_blend_color_state);
 236     R300_ALLOC_ATOM(clip_state, r300_clip_state);
 237     R300_ALLOC_ATOM(hyperz_state, r300_hyperz_state);
 238     R300_ALLOC_ATOM(invariant_state, r300_invariant_state);
 239     R300_ALLOC_ATOM(textures_state, r300_textures_state);
 240     R300_ALLOC_ATOM(vap_invariant_state, r300_vap_invariant_state);
 241     R300_ALLOC_ATOM(viewport_state, r300_viewport_state);
 242     R300_ALLOC_ATOM(ztop_state, r300_ztop_state);
 243     R300_ALLOC_ATOM(fb_state, pipe_framebuffer_state);
 244     R300_ALLOC_ATOM(gpu_flush, pipe_framebuffer_state);
 245     R300_ALLOC_ATOM(scissor_state, pipe_scissor_state);
 246     R300_ALLOC_ATOM(rs_block_state, r300_rs_block);
 247     R300_ALLOC_ATOM(fs_constants, r300_constant_buffer);
 248     R300_ALLOC_ATOM(vs_constants, r300_constant_buffer);
 249     if (!r300->screen->caps.has_tcl) {
 250         R300_ALLOC_ATOM(vertex_stream_state, r300_vertex_stream_state);
 251     }
 252
 253     /* Some non-CSO atoms don't use the state pointer. */
 254     r300->fb_state_pipelined.allow_null_state = TRUE;
 255     r300->fs_rc_constant_state.allow_null_state = TRUE;
 256     r300->pvs_flush.allow_null_state = TRUE;
 257     r300->query_start.allow_null_state = TRUE;
 258     r300->texture_cache_inval.allow_null_state = TRUE;
 259
 260     /* Some states must be marked as dirty here to properly set up
 261      * hardware in the first command stream. */
 262     r300_mark_atom_dirty(r300, &r300->invariant_state);
 263     r300_mark_atom_dirty(r300, &r300->pvs_flush);
 264     r300_mark_atom_dirty(r300, &r300->vap_invariant_state);
 265     r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
 266     r300_mark_atom_dirty(r300, &r300->textures_state);
 267
 268     return TRUE;
 269 }
 270
 271 /* Not every state tracker calls every driver function before the first draw
 272  * call and we must initialize the command buffers somehow. */
 273 static void r300_init_states(struct pipe_context *pipe)
 274 {
 275     struct r300_context *r300 = r300_context(pipe);
 276     struct pipe_blend_color bc = {{0}};
 277     struct pipe_clip_state cs = {{{0}}};
 278     struct pipe_scissor_state ss = {0};
 279     struct r300_gpu_flush *gpuflush =
 280             (struct r300_gpu_flush*)r300->gpu_flush.state;
 281     struct r300_vap_invariant_state *vap_invariant =
 282             (struct r300_vap_invariant_state*)r300->vap_invariant_state.state;
 283     struct r300_invariant_state *invariant =
 284             (struct r300_invariant_state*)r300->invariant_state.state;
 285
 286     CB_LOCALS;
 287
 288     pipe->set_blend_color(pipe, &bc);
 289     pipe->set_clip_state(pipe, &cs);
 290     pipe->set_scissor_state(pipe, &ss);
 291
 292     /* Initialize the GPU flush. */
 293     {
 294         BEGIN_CB(gpuflush->cb_flush_clean, 6);
 295
 296         /* Flush and free renderbuffer caches. */
 297         OUT_CB_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 298             R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 299             R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 300         OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT,
 301             R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 302             R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 303
 304         /* Wait until the GPU is idle.
 305          * This fixes random pixels sometimes appearing probably caused
 306          * by incomplete rendering. */
 307         OUT_CB_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
 308         END_CB;
 309     }
 310
 311     /* Initialize the VAP invariant state. */
 312     {
 313         BEGIN_CB(vap_invariant->cb, r300->vap_invariant_state.size);
 314         OUT_CB_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff);
 315         OUT_CB_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
 316         OUT_CB_32F(1.0);
 317         OUT_CB_32F(1.0);
 318         OUT_CB_32F(1.0);
 319         OUT_CB_32F(1.0);
 320         OUT_CB_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO);
 321
 322         if (r300->screen->caps.is_r500) {
 323             OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL, 0);
 324         }
 325         END_CB;
 326     }
 327
 328     /* Initialize the invariant state. */
 329     {
 330         BEGIN_CB(invariant->cb, r300->invariant_state.size);
 331         OUT_CB_REG(R300_GB_SELECT, 0);
 332         OUT_CB_REG(R300_FG_FOG_BLEND, 0);
 333         OUT_CB_REG(R300_GA_OFFSET, 0);
 334         OUT_CB_REG(R300_SU_TEX_WRAP, 0);
 335         OUT_CB_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF);
 336         OUT_CB_REG(R300_SU_DEPTH_OFFSET, 0);
 337         OUT_CB_REG(R300_SC_EDGERULE, 0x2DA49525);
 338         OUT_CB_REG(R300_SC_SCREENDOOR, 0xffffff);
 339
 340         if (r300->screen->caps.is_rv350) {
 341             OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x01010101);
 342             OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFEFEFEFE);
 343         }
 344
 345         if (r300->screen->caps.is_r500) {
 346             OUT_CB_REG(R500_GA_COLOR_CONTROL_PS3, 0);
 347             OUT_CB_REG(R500_SU_TEX_WRAP_PS3, 0);
 348         }
 349         END_CB;
 350     }
 351
 352     /* Initialize the hyperz state. */
 353     {
 354         struct r300_hyperz_state *hyperz =
 355             (struct r300_hyperz_state*)r300->hyperz_state.state;
 356         BEGIN_CB(&hyperz->cb_flush_begin, r300->hyperz_state.size);
 357         OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT,
 358                    R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE);
 359         OUT_CB_REG(R300_ZB_BW_CNTL, 0);
 360         OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE, 0);
 361         OUT_CB_REG(R300_SC_HYPERZ, R300_SC_HYPERZ_ADJ_2);
 362
 363         if (r300->screen->caps.is_r500 ||
 364             (r300->screen->caps.is_rv350 &&
 365              r300->screen->info.drm_minor >= 6)) {
 366             OUT_CB_REG(R300_GB_Z_PEQ_CONFIG, 0);
 367         }
 368         END_CB;
 369     }
 370 }
 371
 372 struct pipe_context* r300_create_context(struct pipe_screen* screen,
 373                                          void *priv)
 374 {
 375     struct r300_context* r300 = CALLOC_STRUCT(r300_context);
 376     struct r300_screen* r300screen = r300_screen(screen);
 377     struct radeon_winsys *rws = r300screen->rws;
 378
 379     if (!r300)
 380         return NULL;
 381
 382     r300_update_num_contexts(r300screen, 1);
 383
 384     r300->rws = rws;
 385     r300->screen = r300screen;
 386
 387     r300->context.screen = screen;
 388     r300->context.priv = priv;
 389
 390     r300->context.destroy = r300_destroy_context;
 391
 392     util_slab_create(&r300->pool_transfers,
 393                      sizeof(struct pipe_transfer), 64,
 394                      UTIL_SLAB_SINGLETHREADED);
 395
 396     r300->cs = rws->cs_create(rws);
 397     if (r300->cs == NULL)
 398         goto fail;
 399
 400     if (!r300screen->caps.has_tcl) {
 401         /* Create a Draw. This is used for SW TCL. */
 402         r300->draw = draw_create(&r300->context);
 403         if (r300->draw == NULL)
 404             goto fail;
 405         /* Enable our renderer. */
 406         draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300));
 407         /* Disable converting points/lines to triangles. */
 408         draw_wide_line_threshold(r300->draw, 10000000.f);
 409         draw_wide_point_threshold(r300->draw, 10000000.f);
 410         draw_wide_point_sprites(r300->draw, FALSE);
 411         draw_enable_line_stipple(r300->draw, TRUE);
 412         draw_enable_point_sprites(r300->draw, FALSE);
 413     }
 414
 415     if (!r300_setup_atoms(r300))
 416         goto fail;
 417
 418     r300_init_blit_functions(r300);
 419     r300_init_flush_functions(r300);
 420     r300_init_query_functions(r300);
 421     r300_init_state_functions(r300);
 422     r300_init_resource_functions(r300);
 423     r300_init_render_functions(r300);
 424     r300_init_states(&r300->context);
 425
 426     r300->context.create_video_decoder = vl_create_decoder;
 427     r300->context.create_video_buffer = vl_video_buffer_create;
 428
 429     r300->uploader = u_upload_create(&r300->context, 256 * 1024, 4,
 430                                      PIPE_BIND_INDEX_BUFFER);
 431
 432     r300->blitter = util_blitter_create(&r300->context);
 433     if (r300->blitter == NULL)
 434         goto fail;
 435     r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
 436
 437     rws->cs_set_flush_callback(r300->cs, r300_flush_callback, r300);
 438
 439     /* The KIL opcode needs the first texture unit to be enabled
 440      * on r3xx-r4xx. In order to calm down the CS checker, we bind this
 441      * dummy texture there. */
 442     if (!r300->screen->caps.is_r500) {
 443         struct pipe_resource *tex;
 444         struct pipe_resource rtempl = {{0}};
 445         struct pipe_sampler_view vtempl = {{0}};
 446
 447         rtempl.target = PIPE_TEXTURE_2D;
 448         rtempl.format = PIPE_FORMAT_I8_UNORM;
 449         rtempl.bind = PIPE_BIND_SAMPLER_VIEW;
 450         rtempl.usage = PIPE_USAGE_IMMUTABLE;
 451         rtempl.width0 = 1;
 452         rtempl.height0 = 1;
 453         rtempl.depth0 = 1;
 454         tex = screen->resource_create(screen, &rtempl);
 455
 456         u_sampler_view_default_template(&vtempl, tex, tex->format);
 457
 458         r300->texkill_sampler = (struct r300_sampler_view*)
 459             r300->context.create_sampler_view(&r300->context, tex, &vtempl);
 460
 461         pipe_resource_reference(&tex, NULL);
 462     }
 463
 464     {
 465         struct pipe_resource vb;
 466         memset(&vb, 0, sizeof(vb));
 467         vb.target = PIPE_BUFFER;
 468         vb.format = PIPE_FORMAT_R8_UNORM;
 469         vb.bind = PIPE_BIND_VERTEX_BUFFER;
 470         vb.usage = PIPE_USAGE_IMMUTABLE;
 471         vb.width0 = sizeof(float) * 16;
 472         vb.height0 = 1;
 473         vb.depth0 = 1;
 474
 475         r300->dummy_vb.buffer = screen->resource_create(screen, &vb);
 476     }
 477
 478     {
 479         struct pipe_depth_stencil_alpha_state dsa;
 480         memset(&dsa, 0, sizeof(dsa));
 481         dsa.depth.writemask = 1;
 482
 483         r300->dsa_decompress_zmask =
 484             r300->context.create_depth_stencil_alpha_state(&r300->context,
 485                                                            &dsa);
 486     }
 487
 488     r300->hyperz_time_of_last_flush = os_time_get();
 489
 490     /* Print driver info. */
 491 #ifdef DEBUG
 492     {
 493 #else
 494     if (DBG_ON(r300, DBG_INFO)) {
 495 #endif
 496         fprintf(stderr,
 497                 "r300: DRM version: %d.%d.%d, Name: %s, ID: 0x%04x, GB: %d, Z: %d\n"
 498                 "r300: GART size: %d MB, VRAM size: %d MB\n"
 499                 "r300: AA compression RAM: %s, Z compression RAM: %s, HiZ RAM: %s\n",
 500                 r300->screen->info.drm_major,
 501                 r300->screen->info.drm_minor,
 502                 r300->screen->info.drm_patchlevel,
 503                 screen->get_name(screen),
 504                 r300->screen->info.pci_id,
 505                 r300->screen->info.r300_num_gb_pipes,
 506                 r300->screen->info.r300_num_z_pipes,
 507                 r300->screen->info.gart_size >> 20,
 508                 r300->screen->info.vram_size >> 20,
 509                 "YES", /* XXX really? */
 510                 r300->screen->caps.zmask_ram ? "YES" : "NO",
 511                 r300->screen->caps.hiz_ram ? "YES" : "NO");
 512     }
 513
 514     return &r300->context;
 515
 516 fail:
 517     r300_destroy_context(&r300->context);
 518     return NULL;
 519 }