src/gallium/drivers/r300/r300_context.h

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #ifndef R300_CONTEXT_H
  24 #define R300_CONTEXT_H
  25
  26 #include "draw/draw_vertex.h"
  27
  28 #include "util/u_blitter.h"
  29
  30 #include "pipe/p_context.h"
  31 #include "util/u_inlines.h"
  32
  33 #include "r300_screen.h"
  34
  35 struct r300_context;
  36
  37 struct r300_fragment_shader;
  38 struct r300_vertex_shader;
  39
  40 struct r300_atom {
  41     /* List pointers. */
  42     struct r300_atom *prev, *next;
  43     /* Name, for debugging. */
  44     const char* name;
  45     /* Opaque state. */
  46     void* state;
  47     /* Emit the state to the context. */
  48     void (*emit)(struct r300_context*, void*);
  49     /* Upper bound on number of dwords to emit. */
  50     unsigned size;
  51     /* Whether this atom should be emitted. */
  52     boolean dirty;
  53     /* Another dirty flag that is never automatically cleared. */
  54     boolean always_dirty;
  55 };
  56
  57 struct r300_blend_state {
  58     uint32_t blend_control;       /* R300_RB3D_CBLEND: 0x4e04 */
  59     uint32_t alpha_blend_control; /* R300_RB3D_ABLEND: 0x4e08 */
  60     uint32_t color_channel_mask;  /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
  61     uint32_t rop;                 /* R300_RB3D_ROPCNTL: 0x4e18 */
  62     uint32_t dither;              /* R300_RB3D_DITHER_CTL: 0x4e50 */
  63 };
  64
  65 struct r300_blend_color_state {
  66     /* RV515 and earlier */
  67     uint32_t blend_color;            /* R300_RB3D_BLEND_COLOR: 0x4e10 */
  68     /* R520 and newer */
  69     uint32_t blend_color_red_alpha;  /* R500_RB3D_CONSTANT_COLOR_AR: 0x4ef8 */
  70     uint32_t blend_color_green_blue; /* R500_RB3D_CONSTANT_COLOR_GB: 0x4efc */
  71 };
  72
  73 struct r300_dsa_state {
  74     uint32_t alpha_function;    /* R300_FG_ALPHA_FUNC: 0x4bd4 */
  75     uint32_t alpha_reference;   /* R500_FG_ALPHA_VALUE: 0x4be0 */
  76     uint32_t z_buffer_control;  /* R300_ZB_CNTL: 0x4f00 */
  77     uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
  78     uint32_t stencil_ref_mask;  /* R300_ZB_STENCILREFMASK: 0x4f08 */
  79     uint32_t stencil_ref_bf;    /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
  80 };
  81
  82 struct r300_rs_state {
  83     /* Draw-specific rasterizer state */
  84     struct pipe_rasterizer_state rs;
  85
  86     uint32_t vap_control_status;    /* R300_VAP_CNTL_STATUS: 0x2140 */
  87     uint32_t antialiasing_config;   /* R300_GB_AA_CONFIG: 0x4020 */
  88     uint32_t point_size;            /* R300_GA_POINT_SIZE: 0x421c */
  89     uint32_t point_minmax;          /* R300_GA_POINT_MINMAX: 0x4230 */
  90     uint32_t line_control;          /* R300_GA_LINE_CNTL: 0x4234 */
  91     float depth_scale;            /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */
  92                                   /* R300_SU_POLY_OFFSET_BACK_SCALE: 0x42ac */
  93     float depth_offset;           /* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */
  94                                   /* R300_SU_POLY_OFFSET_BACK_OFFSET: 0x42b0 */
  95     uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
  96     uint32_t cull_mode;             /* R300_SU_CULL_MODE: 0x42b8 */
  97     uint32_t line_stipple_config;   /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
  98     uint32_t line_stipple_value;    /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
  99     uint32_t color_control;         /* R300_GA_COLOR_CONTROL: 0x4278 */
 100     uint32_t polygon_mode;          /* R300_GA_POLY_MODE: 0x4288 */
 101 };
 102
 103 struct r300_rs_block {
 104     uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
 105     uint32_t count; /* R300_RS_COUNT */
 106     uint32_t inst_count; /* R300_RS_INST_COUNT */
 107     uint32_t inst[8]; /* R300_RS_INST_[0-7] */
 108 };
 109
 110 struct r300_sampler_state {
 111     struct pipe_sampler_state state;
 112
 113     uint32_t filter0;      /* R300_TX_FILTER0: 0x4400 */
 114     uint32_t filter1;      /* R300_TX_FILTER1: 0x4440 */
 115     uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
 116
 117     /* Min/max LOD must be clamped to [0, last_level], thus
 118      * it's dependent on a currently bound texture */
 119     unsigned min_lod, max_lod;
 120 };
 121
 122 struct r300_texture_state {
 123     uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */
 124     uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */
 125     uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */
 126 };
 127
 128 struct r300_viewport_state {
 129     float xscale;         /* R300_VAP_VPORT_XSCALE:  0x2098 */
 130     float xoffset;        /* R300_VAP_VPORT_XOFFSET: 0x209c */
 131     float yscale;         /* R300_VAP_VPORT_YSCALE:  0x20a0 */
 132     float yoffset;        /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
 133     float zscale;         /* R300_VAP_VPORT_ZSCALE:  0x20a8 */
 134     float zoffset;        /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
 135     uint32_t vte_control; /* R300_VAP_VTE_CNTL:      0x20b0 */
 136 };
 137
 138 struct r300_ztop_state {
 139     uint32_t z_buffer_top;      /* R300_ZB_ZTOP: 0x4f14 */
 140 };
 141
 142 #define R300_NEW_FRAGMENT_SHADER 0x00000020
 143 #define R300_NEW_FRAGMENT_SHADER_CONSTANTS    0x00000040
 144 #define R300_NEW_SAMPLER         0x00000200
 145 #define R300_ANY_NEW_SAMPLERS    0x0001fe00
 146 #define R300_NEW_TEXTURE         0x00040000
 147 #define R300_ANY_NEW_TEXTURES    0x03fc0000
 148 #define R300_NEW_VERTEX_SHADER   0x08000000
 149 #define R300_NEW_VERTEX_SHADER_CONSTANTS    0x10000000
 150 #define R300_NEW_QUERY           0x40000000
 151 #define R300_NEW_KITCHEN_SINK    0x7fffffff
 152
 153 /* The next several objects are not pure Radeon state; they inherit from
 154  * various Gallium classes. */
 155
 156 struct r300_constant_buffer {
 157     /* Buffer of constants */
 158     float constants[256][4];
 159     /* Total number of constants */
 160     unsigned count;
 161 };
 162
 163 /* Query object.
 164  *
 165  * This is not a subclass of pipe_query because pipe_query is never
 166  * actually fully defined. So, rather than have it as a member, and do
 167  * subclass-style casting, we treat pipe_query as an opaque, and just
 168  * trust that our state tracker does not ever mess up query objects.
 169  */
 170 struct r300_query {
 171     /* The kind of query. Currently only OQ is supported. */
 172     unsigned type;
 173     /* Whether this query is currently active. Only active queries will
 174      * get emitted into the command stream, and only active queries get
 175      * tallied. */
 176     boolean active;
 177     /* The current count of this query. Required to be at least 32 bits. */
 178     unsigned int count;
 179     /* The offset of this query into the query buffer, in bytes. */
 180     unsigned offset;
 181     /* if we've flushed the query */
 182     boolean flushed;
 183     /* if begin has been emitted */
 184     boolean begin_emitted;
 185     /* Linked list members. */
 186     struct r300_query* prev;
 187     struct r300_query* next;
 188 };
 189
 190 enum r300_buffer_tiling {
 191     R300_BUFFER_LINEAR = 0,
 192     R300_BUFFER_TILED,
 193     R300_BUFFER_SQUARETILED
 194 };
 195
 196 struct r300_texture {
 197     /* Parent class */
 198     struct pipe_texture tex;
 199
 200     /* Offsets into the buffer. */
 201     unsigned offset[PIPE_MAX_TEXTURE_LEVELS];
 202
 203     /* A pitch for each mip-level */
 204     unsigned pitch[PIPE_MAX_TEXTURE_LEVELS];
 205
 206     /* Size of one zslice or face based on the texture target */
 207     unsigned layer_size[PIPE_MAX_TEXTURE_LEVELS];
 208
 209     /* Whether the mipmap level is macrotiled. */
 210     enum r300_buffer_tiling mip_macrotile[PIPE_MAX_TEXTURE_LEVELS];
 211
 212     /**
 213      * If non-zero, override the natural texture layout with
 214      * a custom stride (in bytes).
 215      *
 216      * \note Mipmapping fails for textures with a non-natural layout!
 217      *
 218      * \sa r300_texture_get_stride
 219      */
 220     unsigned stride_override;
 221
 222     /* Total size of this texture, in bytes. */
 223     unsigned size;
 224
 225     /* Whether this texture has non-power-of-two dimensions.
 226      * It can be either a regular texture or a rectangle one.
 227      */
 228     boolean is_npot;
 229
 230     /* Pipe buffer backing this texture. */
 231     struct pipe_buffer* buffer;
 232
 233     /* Registers carrying texture format data. */
 234     struct r300_texture_state state;
 235
 236     /* Buffer tiling */
 237     enum r300_buffer_tiling microtile, macrotile;
 238 };
 239
 240 struct r300_vertex_info {
 241     /* Parent class */
 242     struct vertex_info vinfo;
 243
 244     /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
 245     uint32_t vap_prog_stream_cntl[8];
 246     /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
 247     uint32_t vap_prog_stream_cntl_ext[8];
 248 };
 249
 250 struct r300_velems_state {
 251     unsigned count;
 252     struct pipe_vertex_element velem[];
 253 };
 254
 255 extern struct pipe_viewport_state r300_viewport_identity;
 256
 257 struct r300_context {
 258     /* Parent class */
 259     struct pipe_context context;
 260
 261     /* The interface to the windowing system, etc. */
 262     struct radeon_winsys* winsys;
 263     /* Draw module. Used mostly for SW TCL. */
 264     struct draw_context* draw;
 265     /* Accelerated blit support. */
 266     struct blitter_context* blitter;
 267
 268     /* Vertex buffer for rendering. */
 269     struct pipe_buffer* vbo;
 270     /* Offset into the VBO. */
 271     size_t vbo_offset;
 272
 273     /* Occlusion query buffer. */
 274     struct pipe_buffer* oqbo;
 275     /* Query list. */
 276     struct r300_query *query_current;
 277     struct r300_query query_list;
 278
 279     /* Vertex formatting information. */
 280     struct r300_atom vertex_format_state;
 281
 282     /* Various CSO state objects. */
 283     /* Beginning of atom list. */
 284     struct r300_atom atom_list;
 285     /* Blend state. */
 286     struct r300_atom blend_state;
 287     /* Blend color state. */
 288     struct r300_atom blend_color_state;
 289     /* User clip planes. */
 290     struct r300_atom clip_state;
 291     /* Shader constants. */
 292     struct r300_constant_buffer shader_constants[PIPE_SHADER_TYPES];
 293     /* Depth, stencil, and alpha state. */
 294     struct r300_atom dsa_state;
 295     /* Fragment shader. */
 296     struct r300_fragment_shader* fs;
 297     /* Framebuffer state. */
 298     struct r300_atom fb_state;
 299     /* Rasterizer state. */
 300     struct r300_atom rs_state;
 301     /* RS block state. */
 302     struct r300_atom rs_block_state;
 303     /* Sampler states. */
 304     struct r300_sampler_state* sampler_states[8];
 305     int sampler_count;
 306     /* Scissor state. */
 307     struct r300_atom scissor_state;
 308     /* Texture states. */
 309     struct r300_texture* textures[8];
 310     int texture_count;
 311     /* Vertex shader. */
 312     struct r300_vertex_shader* vs;
 313     /* Viewport state. */
 314     struct r300_atom viewport_state;
 315     /* ZTOP state. */
 316     struct r300_atom ztop_state;
 317
 318     /* Invariant state. This must be emitted to get the engine started. */
 319     struct r300_atom invariant_state;
 320
 321     /* Vertex buffers for Gallium. */
 322     struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 323     int vertex_buffer_count;
 324     /* Vertex elements for Gallium. */
 325     struct r300_velems_state *velems;
 326
 327     struct pipe_stencil_ref stencil_ref;
 328
 329     /* Bitmask of dirty state objects. */
 330     uint32_t dirty_state;
 331     /* Flag indicating whether or not the HW is dirty. */
 332     uint32_t dirty_hw;
 333     /* Whether the TCL engine should be in bypass mode. */
 334     boolean tcl_bypass;
 335     /* Whether polygon offset is enabled. */
 336     boolean polygon_offset_enabled;
 337     /* Z buffer bit depth. */
 338     uint32_t zbuffer_bpp;
 339 };
 340
 341 /* Convenience cast wrapper. */
 342 static INLINE struct r300_context* r300_context(struct pipe_context* context)
 343 {
 344     return (struct r300_context*)context;
 345 }
 346
 347
 348 struct pipe_context* r300_create_context(struct pipe_screen* screen,
 349                                          void *priv);
 350
 351 /* Context initialization. */
 352 struct draw_stage* r300_draw_stage(struct r300_context* r300);
 353 void r300_init_state_functions(struct r300_context* r300);
 354 void r300_init_surface_functions(struct r300_context* r300);
 355
 356 static INLINE boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags)
 357 {
 358     return SCREEN_DBG_ON(r300_screen(ctx->context.screen), flags);
 359 }
 360
 361 static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags,
 362                        const char * fmt, ...)
 363 {
 364     if (CTX_DBG_ON(ctx, flags)) {
 365         va_list va;
 366         va_start(va, fmt);
 367         debug_vprintf(fmt, va);
 368         va_end(va);
 369     }
 370 }
 371
 372 #define DBG_ON  CTX_DBG_ON
 373 #define DBG     CTX_DBG
 374
 375 #endif /* R300_CONTEXT_H */
 376