2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #ifndef R300_CONTEXT_H
24 #define R300_CONTEXT_H
26 #define R300_BUFFER_ALIGNMENT 64
28 #include "draw/draw_vertex.h"
30 #include "util/u_blitter.h"
32 #include "pipe/p_context.h"
33 #include "util/u_inlines.h"
34 #include "util/u_transfer.h"
36 #include "r300_defines.h"
37 #include "r300_screen.h"
38 #include "compiler/radeon_regalloc.h"
39 #include "../../winsys/radeon/drm/radeon_winsys.h"
43 struct r300_fragment_shader
;
44 struct r300_vertex_shader
;
45 struct r300_stencilref_context
;
47 enum colormask_swizzle
{
54 COLORMASK_NUM_SWIZZLES
58 /* Name, for debugging. */
62 /* Emit the state to the context. */
63 void (*emit
)(struct r300_context
*, unsigned, void*);
64 /* Upper bound on number of dwords to emit. */
66 /* Whether this atom should be emitted. */
68 /* Whether this atom may be emitted with state == NULL. */
69 boolean allow_null_state
;
72 struct r300_aa_state
{
73 struct r300_surface
*dest
;
78 struct r300_blend_state
{
79 struct pipe_blend_state state
;
81 uint32_t cb_clamp
[COLORMASK_NUM_SWIZZLES
][8];
82 uint32_t cb_noclamp
[8];
83 uint32_t cb_no_readwrite
[8];
86 struct r300_blend_color_state
{
87 struct pipe_blend_color state
;
91 struct r300_clip_state
{
95 struct r300_dsa_state
{
96 struct pipe_depth_stencil_alpha_state dsa
;
98 /* This is actually a command buffer with named dwords. */
100 uint32_t z_buffer_control
; /* R300_ZB_CNTL: 0x4f00 */
101 uint32_t z_stencil_control
; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
102 uint32_t stencil_ref_mask
; /* R300_ZB_STENCILREFMASK: 0x4f08 */
104 uint32_t stencil_ref_bf
; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
106 uint32_t alpha_value
; /* R500_FG_ALPHA_VALUE: 0x4be0 */
108 /* Same, but without ZB reads and writes. */
109 uint32_t cb_zb_no_readwrite
[8]; /* ZB not bound */
111 /* Emitted separately: */
112 uint32_t alpha_function
;
114 /* Whether a two-sided stencil is enabled. */
116 /* Whether a fallback should be used for a two-sided stencil ref value. */
117 boolean two_sided_stencil_ref
;
120 struct r300_hyperz_state
{
122 /* This is actually a command buffer with named dwords. */
123 uint32_t cb_flush_begin
;
124 uint32_t zb_zcache_ctlstat
; /* R300_ZB_CACHE_CNTL */
126 uint32_t zb_bw_cntl
; /* R300_ZB_BW_CNTL */
128 uint32_t zb_depthclearvalue
; /* R300_ZB_DEPTHCLEARVALUE */
130 uint32_t sc_hyperz
; /* R300_SC_HYPERZ */
132 uint32_t gb_z_peq_config
; /* R300_GB_Z_PEQ_CONFIG: 0x4028 */
135 struct r300_gpu_flush
{
136 uint32_t cb_flush_clean
[6];
139 #define RS_STATE_MAIN_SIZE 27
141 struct r300_rs_state
{
142 /* Original rasterizer state. */
143 struct pipe_rasterizer_state rs
;
144 /* Draw-specific rasterizer state. */
145 struct pipe_rasterizer_state rs_draw
;
147 /* Command buffers. */
148 uint32_t cb_main
[RS_STATE_MAIN_SIZE
];
149 uint32_t cb_poly_offset_zb16
[5];
150 uint32_t cb_poly_offset_zb24
[5];
152 /* The index to cb_main where the cull_mode register value resides. */
153 unsigned cull_mode_index
;
155 /* Whether polygon offset is enabled. */
156 boolean polygon_offset_enable
;
158 /* This is emitted in the draw function. */
159 uint32_t color_control
; /* R300_GA_COLOR_CONTROL: 0x4278 */
162 struct r300_rs_block
{
163 uint32_t vap_vtx_state_cntl
; /* R300_VAP_VTX_STATE_CNTL: 0x2180 */
164 uint32_t vap_vsm_vtx_assm
; /* R300_VAP_VSM_VTX_ASSM: 0x2184 */
165 uint32_t vap_out_vtx_fmt
[2]; /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */
168 uint32_t ip
[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
169 uint32_t count
; /* R300_RS_COUNT */
170 uint32_t inst_count
; /* R300_RS_INST_COUNT */
171 uint32_t inst
[8]; /* R300_RS_INST_[0-7] */
174 struct r300_sampler_state
{
175 struct pipe_sampler_state state
;
177 uint32_t filter0
; /* R300_TX_FILTER0: 0x4400 */
178 uint32_t filter1
; /* R300_TX_FILTER1: 0x4440 */
180 /* Min/max LOD must be clamped to [0, last_level], thus
181 * it's dependent on a currently bound texture */
182 unsigned min_lod
, max_lod
;
185 struct r300_texture_format_state
{
186 uint32_t format0
; /* R300_TX_FORMAT0: 0x4480 */
187 uint32_t format1
; /* R300_TX_FORMAT1: 0x44c0 */
188 uint32_t format2
; /* R300_TX_FORMAT2: 0x4500 */
189 uint32_t tile_config
; /* R300_TX_OFFSET (subset thereof) */
190 uint32_t us_format0
; /* R500_US_FORMAT0_0: 0x4640 (through 15) */
193 struct r300_sampler_view
{
194 struct pipe_sampler_view base
;
196 /* For resource_copy_region. */
197 unsigned width0_override
;
198 unsigned height0_override
;
200 /* Swizzles in the UTIL_FORMAT_SWIZZLE_* representation,
201 * derived from base. */
202 unsigned char swizzle
[4];
204 /* Copy of r300_texture::texture_format_state with format-specific bits
206 struct r300_texture_format_state format
;
208 /* The texture cache region for this texture. */
209 uint32_t texcache_region
;
212 struct r300_texture_sampler_state
{
213 struct r300_texture_format_state format
;
214 uint32_t filter0
; /* R300_TX_FILTER0: 0x4400 */
215 uint32_t filter1
; /* R300_TX_FILTER1: 0x4440 */
216 uint32_t border_color
; /* R300_TX_BORDER_COLOR: 0x45c0 */
219 struct r300_textures_state
{
221 struct r300_sampler_view
*sampler_views
[16];
222 int sampler_view_count
;
223 /* Sampler states. */
224 struct r300_sampler_state
*sampler_states
[16];
225 int sampler_state_count
;
227 /* This is the merge of the texture and sampler states. */
229 uint32_t tx_enable
; /* R300_TX_ENABLE: 0x4101 */
230 struct r300_texture_sampler_state regs
[16];
233 struct r300_vertex_stream_state
{
234 /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
235 uint32_t vap_prog_stream_cntl
[8];
236 /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
237 uint32_t vap_prog_stream_cntl_ext
[8];
242 struct r300_invariant_state
{
246 struct r300_vap_invariant_state
{
250 struct r300_viewport_state
{
251 float xscale
; /* R300_VAP_VPORT_XSCALE: 0x2098 */
252 float xoffset
; /* R300_VAP_VPORT_XOFFSET: 0x209c */
253 float yscale
; /* R300_VAP_VPORT_YSCALE: 0x20a0 */
254 float yoffset
; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
255 float zscale
; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */
256 float zoffset
; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
257 uint32_t vte_control
; /* R300_VAP_VTE_CNTL: 0x20b0 */
260 struct r300_ztop_state
{
261 uint32_t z_buffer_top
; /* R300_ZB_ZTOP: 0x4f14 */
264 /* The next several objects are not pure Radeon state; they inherit from
265 * various Gallium classes. */
267 struct r300_constant_buffer
{
268 /* Buffer of constants */
270 /* Remapping table. */
271 unsigned *remap_table
;
272 /* const buffer base */
273 uint32_t buffer_base
;
278 * This is not a subclass of pipe_query because pipe_query is never
279 * actually fully defined. So, rather than have it as a member, and do
280 * subclass-style casting, we treat pipe_query as an opaque, and just
281 * trust that our state tracker does not ever mess up query objects.
284 /* The kind of query. Currently only OQ is supported. */
286 /* The number of pipes where query results are stored. */
288 /* How many results have been written, in dwords. It's incremented
289 * after end_query and flush. */
290 unsigned num_results
;
291 /* if begin has been emitted */
292 boolean begin_emitted
;
294 /* The buffer where query results are stored. */
295 struct pb_buffer
*buf
;
296 struct radeon_winsys_cs_handle
*cs_buf
;
299 struct r300_surface
{
300 struct pipe_surface base
;
302 /* Winsys buffer backing the texture. */
303 struct pb_buffer
*buf
;
304 struct radeon_winsys_cs_handle
*cs_buf
;
306 enum radeon_bo_domain domain
;
308 uint32_t offset
; /* COLOROFFSET or DEPTHOFFSET. */
309 uint32_t pitch
; /* COLORPITCH or DEPTHPITCH. */
310 uint32_t pitch_zmask
; /* ZMASK_PITCH */
311 uint32_t pitch_hiz
; /* HIZ_PITCH */
312 uint32_t format
; /* US_OUT_FMT or ZB_FORMAT. */
314 /* Parameters dedicated to the CBZB clear. */
315 uint32_t cbzb_width
; /* Aligned width. */
316 uint32_t cbzb_height
; /* Half of the height. */
317 uint32_t cbzb_midpoint_offset
; /* DEPTHOFFSET. */
318 uint32_t cbzb_pitch
; /* DEPTHPITCH. */
319 uint32_t cbzb_format
; /* ZB_FORMAT. */
321 /* Whether the CBZB clear is allowed on the surface. */
322 boolean cbzb_allowed
;
324 unsigned colormask_swizzle
;
327 struct r300_texture_desc
{
328 /* Width, height, and depth.
329 * Most of the time, these are equal to pipe_texture::width0, height0,
330 * and depth0. However, NPOT 3D textures must have dimensions aligned
331 * to POT, and this is the only case when these variables differ from
333 unsigned width0
, height0
, depth0
;
336 * Macrotiling is specified per-level because small mipmaps cannot
338 enum radeon_bo_layout microtile
;
339 enum radeon_bo_layout macrotile
[R300_MAX_TEXTURE_LEVELS
];
341 /* Offsets into the buffer. */
342 unsigned offset_in_bytes
[R300_MAX_TEXTURE_LEVELS
];
344 /* Strides for each mip-level. */
345 unsigned stride_in_bytes
[R300_MAX_TEXTURE_LEVELS
];
347 /* Size of one zslice or face or 2D image based on the texture target. */
348 unsigned layer_size_in_bytes
[R300_MAX_TEXTURE_LEVELS
];
350 /* Total size of this texture, in bytes,
351 * derived from the texture properties. */
352 unsigned size_in_bytes
;
355 * If non-zero, override the natural texture layout with
356 * a custom stride (in bytes).
358 * \note Mipmapping fails for textures with a non-natural layout!
360 * \sa r300_texture_get_stride
362 unsigned stride_in_bytes_override
;
364 /* Whether this texture has non-power-of-two dimensions.
365 * It can be either a regular texture or a rectangle one. */
368 /* This flag says that hardware must use the stride for addressing
369 * instead of the width. */
370 boolean uses_stride_addressing
;
372 /* Whether CBZB fast color clear is allowed on the miplevel. */
373 boolean cbzb_allowed
[R300_MAX_TEXTURE_LEVELS
];
375 /* Zbuffer compression info for each miplevel. */
376 boolean zcomp8x8
[R300_MAX_TEXTURE_LEVELS
];
377 /* If zero, then disable Z compression/HiZ. */
378 unsigned zmask_dwords
[R300_MAX_TEXTURE_LEVELS
];
379 unsigned hiz_dwords
[R300_MAX_TEXTURE_LEVELS
];
380 /* Zmask/HiZ strides for each miplevel. */
381 unsigned zmask_stride_in_pixels
[R300_MAX_TEXTURE_LEVELS
];
382 unsigned hiz_stride_in_pixels
[R300_MAX_TEXTURE_LEVELS
];
389 /* Winsys buffer backing this resource. */
390 struct pb_buffer
*buf
;
391 struct radeon_winsys_cs_handle
*cs_buf
;
392 enum radeon_bo_domain domain
;
394 /* Constant buffers and SWTCL vertex and index buffers are in user
396 uint8_t *malloced_buffer
;
398 /* Texture description (addressing, layout, special features). */
399 struct r300_texture_desc tex
;
401 /* This is the level tiling flags were last time set for.
402 * It's used to prevent redundant tiling-flags changes from happening.*/
403 unsigned surface_level
;
406 struct r300_vertex_element_state
{
408 struct pipe_vertex_element velem
[PIPE_MAX_ATTRIBS
];
409 unsigned format_size
[PIPE_MAX_ATTRIBS
];
411 /* The size of the vertex, in dwords. */
412 unsigned vertex_size_dwords
;
414 struct r300_vertex_stream_state vertex_stream
;
420 /* The function, when determined, is set in stone
421 * until the next HiZ clear. */
423 /* MAX is written to the HiZ buffer.
424 * Used for LESS, LEQUAL. */
427 /* MIN is written to the HiZ buffer.
428 * Used for GREATER, GEQUAL. */
432 /* For deferred fragment shader state validation. */
433 enum r300_fs_validity_status
{
434 FRAGMENT_SHADER_VALID
, /* No need to change/validate the FS. */
435 FRAGMENT_SHADER_MAYBE_DIRTY
,/* Validate the FS if external state was changed. */
436 FRAGMENT_SHADER_DIRTY
/* Always validate the FS (if the FS was changed) */
439 struct r300_context
{
441 struct pipe_context context
;
443 /* The interface to the windowing system, etc. */
444 struct radeon_winsys
*rws
;
445 /* The command stream. */
446 struct radeon_winsys_cs
*cs
;
448 struct r300_screen
*screen
;
450 /* Draw module. Used mostly for SW TCL. */
451 struct draw_context
* draw
;
452 /* Vertex buffer for SW TCL. */
453 struct pb_buffer
*vbo
;
454 struct radeon_winsys_cs_handle
*vbo_cs
;
455 /* Offset and size into the SW TCL VBO. */
456 size_t draw_vbo_offset
;
458 /* Accelerated blit support. */
459 struct blitter_context
* blitter
;
460 /* Stencil two-sided reference value fallback. */
461 struct r300_stencilref_context
*stencilref_fallback
;
463 /* The KIL opcode needs the first texture unit to be enabled
464 * on r3xx-r4xx. In order to calm down the CS checker, we bind this
465 * dummy texture there. */
466 struct r300_sampler_view
*texkill_sampler
;
468 /* When no vertex buffer is set, this one is used instead to prevent
470 struct pipe_vertex_buffer dummy_vb
;
472 /* The currently active query. */
473 struct r300_query
*query_current
;
474 /* The saved query for blitter operations. */
475 struct r300_query
*blitter_saved_query
;
477 struct r300_query query_list
;
479 /* Various CSO state objects. */
481 /* Each atom is emitted in the order it appears here, which can affect
482 * performance and stability if not handled with care. */
484 struct r300_atom gpu_flush
;
485 /* Anti-aliasing (MSAA) state. */
486 struct r300_atom aa_state
;
487 /* Framebuffer state. */
488 struct r300_atom fb_state
;
489 /* HyperZ state (various SC/ZB bits). */
490 struct r300_atom hyperz_state
;
492 struct r300_atom ztop_state
;
493 /* Depth, stencil, and alpha state. */
494 struct r300_atom dsa_state
;
496 struct r300_atom blend_state
;
497 /* Blend color state. */
498 struct r300_atom blend_color_state
;
500 struct r300_atom scissor_state
;
502 struct r300_atom sample_mask
;
503 /* Invariant state. This must be emitted to get the engine started. */
504 struct r300_atom invariant_state
;
505 /* Viewport state. */
506 struct r300_atom viewport_state
;
508 struct r300_atom pvs_flush
;
509 /* VAP invariant state. */
510 struct r300_atom vap_invariant_state
;
511 /* Vertex stream formatting state. */
512 struct r300_atom vertex_stream_state
;
514 struct r300_atom vs_state
;
515 /* User clip planes. */
516 struct r300_atom clip_state
;
517 /* RS block state + VAP (vertex shader) output mapping state. */
518 struct r300_atom rs_block_state
;
519 /* Rasterizer state. */
520 struct r300_atom rs_state
;
521 /* Framebuffer state (pipelined regs). */
522 struct r300_atom fb_state_pipelined
;
523 /* Fragment shader. */
525 /* Fragment shader RC_CONSTANT_STATE variables. */
526 struct r300_atom fs_rc_constant_state
;
527 /* Fragment shader constant buffer. */
528 struct r300_atom fs_constants
;
529 /* Vertex shader constant buffer. */
530 struct r300_atom vs_constants
;
531 /* Texture cache invalidate. */
532 struct r300_atom texture_cache_inval
;
533 /* Textures state. */
534 struct r300_atom textures_state
;
536 struct r300_atom hiz_clear
;
538 struct r300_atom zmask_clear
;
539 /* Occlusion query. */
540 struct r300_atom query_start
;
542 /* The pointers to the first and the last atom. */
543 struct r300_atom
*first_dirty
, *last_dirty
;
545 /* Vertex elements for Gallium. */
546 struct r300_vertex_element_state
*velems
;
548 /* Vertex info for Draw. */
549 struct vertex_info vertex_info
;
551 struct pipe_stencil_ref stencil_ref
;
552 struct pipe_viewport_state viewport
;
554 /* Stream locations for SWTCL. */
555 int stream_loc_notcl
[16];
557 /* Flag indicating whether or not the HW is dirty. */
559 /* Whether polygon offset is enabled. */
560 boolean polygon_offset_enabled
;
561 /* Z buffer bit depth. */
562 uint32_t zbuffer_bpp
;
563 /* Whether rendering is conditional and should be skipped. */
564 boolean skip_rendering
;
565 /* The flag above saved by blitter. */
566 unsigned char blitter_saved_skip_rendering
;
567 /* Point sprites texcoord index, 1 bit per texcoord */
568 int sprite_coord_enable
;
569 /* Whether two-sided color selection is enabled (AKA light_twoside). */
570 boolean two_sided_color
;
571 /* Whether fast color clear is enabled. */
573 /* Whether fragment shader needs to be validated. */
574 enum r300_fs_validity_status fs_status
;
575 /* Framebuffer multi-write. */
576 boolean fb_multiwrite
;
577 unsigned num_samples
;
579 boolean alpha_to_one
;
580 boolean alpha_to_coverage
;
582 void *dsa_decompress_zmask
;
584 struct pipe_index_buffer index_buffer
;
585 struct pipe_vertex_buffer vertex_buffer
[PIPE_MAX_ATTRIBS
];
586 unsigned nr_vertex_buffers
;
587 struct u_upload_mgr
*uploader
;
589 struct util_slab_mempool pool_transfers
;
592 uint64_t flush_counter
;
594 /* const tracking for VS */
597 /* Vertex array state info */
598 boolean vertex_arrays_dirty
;
599 boolean vertex_arrays_indexed
;
600 int vertex_arrays_offset
;
601 int vertex_arrays_instance_id
;
602 boolean instancing_enabled
;
605 boolean hyperz_enabled
; /* Whether it owns Hyper-Z access. */
606 int64_t hyperz_time_of_last_flush
; /* Time of the last flush with Z clear. */
607 unsigned num_z_clears
; /* Since the last flush. */
610 boolean zmask_in_use
; /* Whether ZMASK is enabled. */
611 boolean zmask_decompress
; /* Whether ZMASK is being decompressed. */
612 struct pipe_surface
*locked_zbuffer
; /* Unbound zbuffer which still has data in ZMASK. */
615 boolean hiz_in_use
; /* Whether HIZ is enabled. */
616 enum r300_hiz_func hiz_func
; /* HiZ function. Can be either MIN or MAX. */
617 uint32_t hiz_clear_value
; /* HiZ clear value. */
619 /* Compiler state. */
620 struct rc_regalloc_state fs_regalloc_state
; /* Register allocator info for
621 * fragment shaders. */
624 #define foreach_atom(r300, atom) \
625 for (atom = &r300->gpu_flush; atom != (&r300->query_start)+1; atom++)
627 #define foreach_dirty_atom(r300, atom) \
628 for (atom = r300->first_dirty; atom != r300->last_dirty; atom++)
630 /* Convenience cast wrappers. */
631 static INLINE
struct r300_query
* r300_query(struct pipe_query
* q
)
633 return (struct r300_query
*)q
;
636 static INLINE
struct r300_surface
* r300_surface(struct pipe_surface
* surf
)
638 return (struct r300_surface
*)surf
;
641 static INLINE
struct r300_resource
* r300_resource(struct pipe_resource
* tex
)
643 return (struct r300_resource
*)tex
;
646 static INLINE
struct r300_context
* r300_context(struct pipe_context
* context
)
648 return (struct r300_context
*)context
;
651 static INLINE
struct r300_fragment_shader
*r300_fs(struct r300_context
*r300
)
653 return (struct r300_fragment_shader
*)r300
->fs
.state
;
656 static INLINE
void r300_mark_atom_dirty(struct r300_context
*r300
,
657 struct r300_atom
*atom
)
661 if (!r300
->first_dirty
) {
662 r300
->first_dirty
= atom
;
663 r300
->last_dirty
= atom
+1;
665 if (atom
< r300
->first_dirty
)
666 r300
->first_dirty
= atom
;
667 else if (atom
+1 > r300
->last_dirty
)
668 r300
->last_dirty
= atom
+1;
672 struct pipe_context
* r300_create_context(struct pipe_screen
* screen
,
675 /* Context initialization. */
676 struct draw_stage
* r300_draw_stage(struct r300_context
* r300
);
677 void r300_init_blit_functions(struct r300_context
*r300
);
678 void r300_init_flush_functions(struct r300_context
* r300
);
679 void r300_init_query_functions(struct r300_context
* r300
);
680 void r300_init_render_functions(struct r300_context
*r300
);
681 void r300_init_state_functions(struct r300_context
* r300
);
682 void r300_init_resource_functions(struct r300_context
* r300
);
685 void r300_decompress_zmask(struct r300_context
*r300
);
686 void r300_decompress_zmask_locked_unsafe(struct r300_context
*r300
);
687 void r300_decompress_zmask_locked(struct r300_context
*r300
);
688 bool r300_is_blit_supported(enum pipe_format format
);
691 void r300_flush(struct pipe_context
*pipe
,
693 struct pipe_fence_handle
**fence
);
696 void r300_update_hyperz_state(struct r300_context
* r300
);
699 void r300_resume_query(struct r300_context
*r300
,
700 struct r300_query
*query
);
701 void r300_stop_query(struct r300_context
*r300
);
703 /* r300_render_translate.c */
704 void r300_translate_index_buffer(struct r300_context
*r300
,
705 struct pipe_index_buffer
*ib
,
706 struct pipe_resource
**out_index_buffer
,
707 unsigned *index_size
, unsigned index_offset
,
708 unsigned *start
, unsigned count
);
710 /* r300_render_stencilref.c */
711 void r300_plug_in_stencil_ref_fallback(struct r300_context
*r300
);
714 void r500_emit_index_bias(struct r300_context
*r300
, int index_bias
);
715 void r300_blitter_draw_rectangle(struct blitter_context
*blitter
,
716 int x1
, int y1
, int x2
, int y2
,
718 enum blitter_attrib_type type
,
719 const union pipe_color_union
*attrib
);
722 enum r300_fb_state_change
{
723 R300_CHANGED_FB_STATE
= 0,
724 R300_CHANGED_HYPERZ_FLAG
,
725 R300_CHANGED_MULTIWRITE
728 void r300_mark_fb_state_dirty(struct r300_context
*r300
,
729 enum r300_fb_state_change change
);
730 void r300_mark_fs_code_dirty(struct r300_context
*r300
);
732 struct pipe_sampler_view
*
733 r300_create_sampler_view_custom(struct pipe_context
*pipe
,
734 struct pipe_resource
*texture
,
735 const struct pipe_sampler_view
*templ
,
736 unsigned width0_override
,
737 unsigned height0_override
);
739 /* r300_state_derived.c */
740 void r300_update_derived_state(struct r300_context
* r300
);
743 void r500_dump_rs_block(struct r300_rs_block
*rs
);
746 static INLINE boolean
CTX_DBG_ON(struct r300_context
* ctx
, unsigned flags
)
748 return SCREEN_DBG_ON(ctx
->screen
, flags
);
751 static INLINE
void CTX_DBG(struct r300_context
* ctx
, unsigned flags
,
752 const char * fmt
, ...)
754 if (CTX_DBG_ON(ctx
, flags
)) {
757 vfprintf(stderr
, fmt
, va
);
762 #define DBG_ON CTX_DBG_ON
765 #endif /* R300_CONTEXT_H */