src/gallium/drivers/r300/r300_context.h

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #ifndef R300_CONTEXT_H
  24 #define R300_CONTEXT_H
  25
  26 #include "draw/draw_vertex.h"
  27
  28 #include "util/u_blitter.h"
  29
  30 #include "pipe/p_context.h"
  31 #include "util/u_inlines.h"
  32
  33 #include "r300_screen.h"
  34
  35 struct r300_context;
  36
  37 struct r300_fragment_shader;
  38 struct r300_vertex_shader;
  39
  40 struct r300_atom {
  41     /* List pointers. */
  42     struct r300_atom *prev, *next;
  43     /* Name, for debugging. */
  44     const char* name;
  45     /* Opaque state. */
  46     void* state;
  47     /* Emit the state to the context. */
  48     void (*emit)(struct r300_context*, unsigned, void*);
  49     /* Upper bound on number of dwords to emit. */
  50     unsigned size;
  51     /* Whether this atom should be emitted. */
  52     boolean dirty;
  53     /* Another dirty flag that is never automatically cleared. */
  54     boolean always_dirty;
  55 };
  56
  57 struct r300_blend_state {
  58     uint32_t blend_control;       /* R300_RB3D_CBLEND: 0x4e04 */
  59     uint32_t alpha_blend_control; /* R300_RB3D_ABLEND: 0x4e08 */
  60     uint32_t color_channel_mask;  /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
  61     uint32_t rop;                 /* R300_RB3D_ROPCNTL: 0x4e18 */
  62     uint32_t dither;              /* R300_RB3D_DITHER_CTL: 0x4e50 */
  63 };
  64
  65 struct r300_blend_color_state {
  66     /* RV515 and earlier */
  67     uint32_t blend_color;            /* R300_RB3D_BLEND_COLOR: 0x4e10 */
  68     /* R520 and newer */
  69     uint32_t blend_color_red_alpha;  /* R500_RB3D_CONSTANT_COLOR_AR: 0x4ef8 */
  70     uint32_t blend_color_green_blue; /* R500_RB3D_CONSTANT_COLOR_GB: 0x4efc */
  71 };
  72
  73 struct r300_dsa_state {
  74     uint32_t alpha_function;    /* R300_FG_ALPHA_FUNC: 0x4bd4 */
  75     uint32_t alpha_reference;   /* R500_FG_ALPHA_VALUE: 0x4be0 */
  76     uint32_t z_buffer_control;  /* R300_ZB_CNTL: 0x4f00 */
  77     uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
  78     uint32_t stencil_ref_mask;  /* R300_ZB_STENCILREFMASK: 0x4f08 */
  79     uint32_t stencil_ref_bf;    /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
  80 };
  81
  82 struct r300_rs_state {
  83     /* Draw-specific rasterizer state */
  84     struct pipe_rasterizer_state rs;
  85
  86     uint32_t vap_control_status;    /* R300_VAP_CNTL_STATUS: 0x2140 */
  87     uint32_t antialiasing_config;   /* R300_GB_AA_CONFIG: 0x4020 */
  88     uint32_t point_size;            /* R300_GA_POINT_SIZE: 0x421c */
  89     uint32_t line_control;          /* R300_GA_LINE_CNTL: 0x4234 */
  90     float depth_scale;            /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */
  91                                   /* R300_SU_POLY_OFFSET_BACK_SCALE: 0x42ac */
  92     float depth_offset;           /* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */
  93                                   /* R300_SU_POLY_OFFSET_BACK_OFFSET: 0x42b0 */
  94     uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
  95     uint32_t cull_mode;             /* R300_SU_CULL_MODE: 0x42b8 */
  96     uint32_t line_stipple_config;   /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
  97     uint32_t line_stipple_value;    /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
  98     uint32_t color_control;         /* R300_GA_COLOR_CONTROL: 0x4278 */
  99     uint32_t polygon_mode;          /* R300_GA_POLY_MODE: 0x4288 */
 100 };
 101
 102 struct r300_rs_block {
 103     uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
 104     uint32_t count; /* R300_RS_COUNT */
 105     uint32_t inst_count; /* R300_RS_INST_COUNT */
 106     uint32_t inst[8]; /* R300_RS_INST_[0-7] */
 107 };
 108
 109 struct r300_sampler_state {
 110     struct pipe_sampler_state state;
 111
 112     uint32_t filter0;      /* R300_TX_FILTER0: 0x4400 */
 113     uint32_t filter1;      /* R300_TX_FILTER1: 0x4440 */
 114     uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
 115
 116     /* Min/max LOD must be clamped to [0, last_level], thus
 117      * it's dependent on a currently bound texture */
 118     unsigned min_lod, max_lod;
 119 };
 120
 121 struct r300_texture_format_state {
 122     uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */
 123     uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */
 124     uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */
 125 };
 126
 127 struct r300_texture_fb_state {
 128     /* Colorbuffer. */
 129     uint32_t colorpitch[PIPE_MAX_TEXTURE_LEVELS]; /* R300_RB3D_COLORPITCH[0-3]*/
 130     uint32_t us_out_fmt; /* R300_US_OUT_FMT[0-3] */
 131
 132     /* Zbuffer. */
 133     uint32_t depthpitch[PIPE_MAX_TEXTURE_LEVELS]; /* R300_RB3D_DEPTHPITCH */
 134     uint32_t zb_format; /* R300_ZB_FORMAT */
 135 };
 136
 137 struct r300_textures_state {
 138     /* Textures. */
 139     struct r300_texture *textures[8];
 140     int texture_count;
 141     /* Sampler states. */
 142     struct r300_sampler_state *sampler_states[8];
 143     int sampler_count;
 144
 145     /* These is the merge of the texture and sampler states. */
 146     unsigned count;
 147     uint32_t tx_enable;         /* R300_TX_ENABLE: 0x4101 */
 148     struct r300_texture_sampler_state {
 149         uint32_t format[3];     /* R300_TX_FORMAT[0-2] */
 150         uint32_t filter[2];     /* R300_TX_FILTER[0-1] */
 151         uint32_t border_color;  /* R300_TX_BORDER_COLOR: 0x45c0 */
 152         uint32_t tile_config;   /* R300_TX_OFFSET (subset thereof) */
 153     } regs[8];
 154 };
 155
 156 struct r300_vertex_stream_state {
 157     /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
 158     uint32_t vap_prog_stream_cntl[8];
 159     /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
 160     uint32_t vap_prog_stream_cntl_ext[8];
 161
 162     unsigned count;
 163 };
 164
 165 struct r300_vap_output_state {
 166     uint32_t vap_vtx_state_cntl;  /* R300_VAP_VTX_STATE_CNTL: 0x2180 */
 167     uint32_t vap_vsm_vtx_assm;    /* R300_VAP_VSM_VTX_ASSM: 0x2184 */
 168     uint32_t vap_out_vtx_fmt[2];  /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */
 169 };
 170
 171 struct r300_viewport_state {
 172     float xscale;         /* R300_VAP_VPORT_XSCALE:  0x2098 */
 173     float xoffset;        /* R300_VAP_VPORT_XOFFSET: 0x209c */
 174     float yscale;         /* R300_VAP_VPORT_YSCALE:  0x20a0 */
 175     float yoffset;        /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
 176     float zscale;         /* R300_VAP_VPORT_ZSCALE:  0x20a8 */
 177     float zoffset;        /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
 178     uint32_t vte_control; /* R300_VAP_VTE_CNTL:      0x20b0 */
 179 };
 180
 181 struct r300_ztop_state {
 182     uint32_t z_buffer_top;      /* R300_ZB_ZTOP: 0x4f14 */
 183 };
 184
 185 #define R300_NEW_FRAGMENT_SHADER 0x00000020
 186 #define R300_NEW_FRAGMENT_SHADER_CONSTANTS    0x00000040
 187 #define R300_NEW_VERTEX_SHADER_CONSTANTS    0x10000000
 188 #define R300_NEW_QUERY           0x40000000
 189 #define R300_NEW_KITCHEN_SINK    0x7fffffff
 190
 191 /* The next several objects are not pure Radeon state; they inherit from
 192  * various Gallium classes. */
 193
 194 struct r300_constant_buffer {
 195     /* Buffer of constants */
 196     float constants[256][4];
 197     /* Total number of constants */
 198     unsigned count;
 199 };
 200
 201 /* Query object.
 202  *
 203  * This is not a subclass of pipe_query because pipe_query is never
 204  * actually fully defined. So, rather than have it as a member, and do
 205  * subclass-style casting, we treat pipe_query as an opaque, and just
 206  * trust that our state tracker does not ever mess up query objects.
 207  */
 208 struct r300_query {
 209     /* The kind of query. Currently only OQ is supported. */
 210     unsigned type;
 211     /* Whether this query is currently active. Only active queries will
 212      * get emitted into the command stream, and only active queries get
 213      * tallied. */
 214     boolean active;
 215     /* The current count of this query. Required to be at least 32 bits. */
 216     unsigned int count;
 217     /* The offset of this query into the query buffer, in bytes. */
 218     unsigned offset;
 219     /* if we've flushed the query */
 220     boolean flushed;
 221     /* if begin has been emitted */
 222     boolean begin_emitted;
 223     /* Linked list members. */
 224     struct r300_query* prev;
 225     struct r300_query* next;
 226 };
 227
 228 enum r300_buffer_tiling {
 229     R300_BUFFER_LINEAR = 0,
 230     R300_BUFFER_TILED,
 231     R300_BUFFER_SQUARETILED
 232 };
 233
 234 struct r300_texture {
 235     /* Parent class */
 236     struct pipe_texture tex;
 237
 238     /* Offsets into the buffer. */
 239     unsigned offset[PIPE_MAX_TEXTURE_LEVELS];
 240
 241     /* A pitch for each mip-level */
 242     unsigned pitch[PIPE_MAX_TEXTURE_LEVELS];
 243
 244     /* Size of one zslice or face based on the texture target */
 245     unsigned layer_size[PIPE_MAX_TEXTURE_LEVELS];
 246
 247     /* Whether the mipmap level is macrotiled. */
 248     enum r300_buffer_tiling mip_macrotile[PIPE_MAX_TEXTURE_LEVELS];
 249
 250     /**
 251      * If non-zero, override the natural texture layout with
 252      * a custom stride (in bytes).
 253      *
 254      * \note Mipmapping fails for textures with a non-natural layout!
 255      *
 256      * \sa r300_texture_get_stride
 257      */
 258     unsigned stride_override;
 259
 260     /* Total size of this texture, in bytes. */
 261     unsigned size;
 262
 263     /* Whether this texture has non-power-of-two dimensions.
 264      * It can be either a regular texture or a rectangle one.
 265      */
 266     boolean is_npot;
 267
 268     /* Pipe buffer backing this texture. */
 269     struct pipe_buffer* buffer;
 270
 271     /* Registers carrying texture format data. */
 272     struct r300_texture_format_state state;
 273     struct r300_texture_fb_state fb_state;
 274
 275     /* Buffer tiling */
 276     enum r300_buffer_tiling microtile, macrotile;
 277 };
 278
 279 extern struct pipe_viewport_state r300_viewport_identity;
 280
 281 struct r300_context {
 282     /* Parent class */
 283     struct pipe_context context;
 284
 285     /* The interface to the windowing system, etc. */
 286     struct radeon_winsys* winsys;
 287     /* Draw module. Used mostly for SW TCL. */
 288     struct draw_context* draw;
 289     /* Accelerated blit support. */
 290     struct blitter_context* blitter;
 291
 292     /* Vertex buffer for rendering. */
 293     struct pipe_buffer* vbo;
 294     /* Offset into the VBO. */
 295     size_t vbo_offset;
 296
 297     /* Occlusion query buffer. */
 298     struct pipe_buffer* oqbo;
 299     /* Query list. */
 300     struct r300_query *query_current;
 301     struct r300_query query_list;
 302
 303     /* Various CSO state objects. */
 304     /* Beginning of atom list. */
 305     struct r300_atom atom_list;
 306     /* Blend state. */
 307     struct r300_atom blend_state;
 308     /* Blend color state. */
 309     struct r300_atom blend_color_state;
 310     /* User clip planes. */
 311     struct r300_atom clip_state;
 312     /* Shader constants. */
 313     struct r300_constant_buffer shader_constants[PIPE_SHADER_TYPES];
 314     /* Depth, stencil, and alpha state. */
 315     struct r300_atom dsa_state;
 316     /* Fragment shader. */
 317     struct r300_fragment_shader* fs;
 318     /* Framebuffer state. */
 319     struct r300_atom fb_state;
 320     /* Rasterizer state. */
 321     struct r300_atom rs_state;
 322     /* RS block state. */
 323     struct r300_atom rs_block_state;
 324     /* Scissor state. */
 325     struct r300_atom scissor_state;
 326     /* Textures state. */
 327     struct r300_atom textures_state;
 328     /* Vertex stream formatting state. */
 329     struct r300_atom vertex_stream_state;
 330     /* VAP (vertex shader) output mapping state. */
 331     struct r300_atom vap_output_state;
 332     /* Vertex shader. */
 333     struct r300_atom vs_state;
 334     /* Viewport state. */
 335     struct r300_atom viewport_state;
 336     /* ZTOP state. */
 337     struct r300_atom ztop_state;
 338     /* PVS flush. */
 339     struct r300_atom pvs_flush;
 340     /* Texture cache invalidate. */
 341     struct r300_atom texture_cache_inval;
 342
 343     /* Invariant state. This must be emitted to get the engine started. */
 344     struct r300_atom invariant_state;
 345
 346     /* Vertex buffers for Gallium. */
 347     struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 348     int vertex_buffer_count;
 349     int vertex_buffer_max_index;
 350     /* Vertex elements for Gallium. */
 351     struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
 352     int vertex_element_count;
 353
 354     /* Vertex info for Draw. */
 355     struct vertex_info vertex_info;
 356
 357     struct pipe_stencil_ref stencil_ref;
 358
 359     struct pipe_clip_state clip;
 360
 361     struct pipe_viewport_state viewport;
 362
 363     /* Bitmask of dirty state objects. */
 364     uint32_t dirty_state;
 365     /* Flag indicating whether or not the HW is dirty. */
 366     uint32_t dirty_hw;
 367     /* Whether polygon offset is enabled. */
 368     boolean polygon_offset_enabled;
 369     /* Z buffer bit depth. */
 370     uint32_t zbuffer_bpp;
 371 };
 372
 373 /* Convenience cast wrapper. */
 374 static INLINE struct r300_context* r300_context(struct pipe_context* context)
 375 {
 376     return (struct r300_context*)context;
 377 }
 378
 379
 380 struct pipe_context* r300_create_context(struct pipe_screen* screen,
 381                                          void *priv);
 382
 383 /* Context initialization. */
 384 struct draw_stage* r300_draw_stage(struct r300_context* r300);
 385 void r300_init_state_functions(struct r300_context* r300);
 386 void r300_init_surface_functions(struct r300_context* r300);
 387
 388 static INLINE boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags)
 389 {
 390     return SCREEN_DBG_ON(r300_screen(ctx->context.screen), flags);
 391 }
 392
 393 static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags,
 394                        const char * fmt, ...)
 395 {
 396     if (CTX_DBG_ON(ctx, flags)) {
 397         va_list va;
 398         va_start(va, fmt);
 399         debug_vprintf(fmt, va);
 400         va_end(va);
 401     }
 402 }
 403
 404 #define DBG_ON  CTX_DBG_ON
 405 #define DBG     CTX_DBG
 406
 407 #endif /* R300_CONTEXT_H */
 408