r300g: raise the number of texture units to 16 for all supported chipsets
[mesa.git] / src / gallium / drivers / r300 / r300_context.h
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #ifndef R300_CONTEXT_H
24 #define R300_CONTEXT_H
25
26 #include "draw/draw_vertex.h"
27
28 #include "util/u_blitter.h"
29
30 #include "pipe/p_context.h"
31 #include "util/u_inlines.h"
32
33 #include "r300_defines.h"
34 #include "r300_screen.h"
35
36 struct u_upload_mgr;
37 struct r300_context;
38
39 struct r300_fragment_shader;
40 struct r300_vertex_shader;
41
42 struct r300_atom {
43 /* List pointers. */
44 struct r300_atom *prev, *next;
45 /* Name, for debugging. */
46 const char* name;
47 /* Opaque state. */
48 void* state;
49 /* Emit the state to the context. */
50 void (*emit)(struct r300_context*, unsigned, void*);
51 /* Upper bound on number of dwords to emit. */
52 unsigned size;
53 /* Whether this atom should be emitted. */
54 boolean dirty;
55 /* Another dirty flag that is never automatically cleared. */
56 boolean always_dirty;
57 };
58
59 struct r300_blend_state {
60 uint32_t blend_control; /* R300_RB3D_CBLEND: 0x4e04 */
61 uint32_t alpha_blend_control; /* R300_RB3D_ABLEND: 0x4e08 */
62 uint32_t color_channel_mask; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
63 uint32_t rop; /* R300_RB3D_ROPCNTL: 0x4e18 */
64 uint32_t dither; /* R300_RB3D_DITHER_CTL: 0x4e50 */
65 };
66
67 struct r300_blend_color_state {
68 /* RV515 and earlier */
69 uint32_t blend_color; /* R300_RB3D_BLEND_COLOR: 0x4e10 */
70 /* R520 and newer */
71 uint32_t blend_color_red_alpha; /* R500_RB3D_CONSTANT_COLOR_AR: 0x4ef8 */
72 uint32_t blend_color_green_blue; /* R500_RB3D_CONSTANT_COLOR_GB: 0x4efc */
73 };
74
75 struct r300_dsa_state {
76 uint32_t alpha_function; /* R300_FG_ALPHA_FUNC: 0x4bd4 */
77 uint32_t alpha_reference; /* R500_FG_ALPHA_VALUE: 0x4be0 */
78 uint32_t z_buffer_control; /* R300_ZB_CNTL: 0x4f00 */
79 uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
80 uint32_t stencil_ref_mask; /* R300_ZB_STENCILREFMASK: 0x4f08 */
81 uint32_t stencil_ref_bf; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
82 };
83
84 struct r300_rs_state {
85 /* Draw-specific rasterizer state */
86 struct pipe_rasterizer_state rs;
87
88 uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */
89 uint32_t antialiasing_config; /* R300_GB_AA_CONFIG: 0x4020 */
90 uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */
91 uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */
92 float depth_scale; /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */
93 /* R300_SU_POLY_OFFSET_BACK_SCALE: 0x42ac */
94 float depth_offset; /* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */
95 /* R300_SU_POLY_OFFSET_BACK_OFFSET: 0x42b0 */
96 uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
97 uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */
98 uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
99 uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
100 uint32_t color_control; /* R300_GA_COLOR_CONTROL: 0x4278 */
101 uint32_t polygon_mode; /* R300_GA_POLY_MODE: 0x4288 */
102 };
103
104 struct r300_rs_block {
105 uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
106 uint32_t count; /* R300_RS_COUNT */
107 uint32_t inst_count; /* R300_RS_INST_COUNT */
108 uint32_t inst[8]; /* R300_RS_INST_[0-7] */
109 };
110
111 struct r300_sampler_state {
112 struct pipe_sampler_state state;
113
114 uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */
115 uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */
116 uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
117
118 /* Min/max LOD must be clamped to [0, last_level], thus
119 * it's dependent on a currently bound texture */
120 unsigned min_lod, max_lod;
121 };
122
123 struct r300_texture_format_state {
124 uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */
125 uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */
126 uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */
127 };
128
129 struct r300_texture_fb_state {
130 /* Colorbuffer. */
131 uint32_t colorpitch[R300_MAX_TEXTURE_LEVELS]; /* R300_RB3D_COLORPITCH[0-3]*/
132 uint32_t us_out_fmt; /* R300_US_OUT_FMT[0-3] */
133
134 /* Zbuffer. */
135 uint32_t depthpitch[R300_MAX_TEXTURE_LEVELS]; /* R300_RB3D_DEPTHPITCH */
136 uint32_t zb_format; /* R300_ZB_FORMAT */
137 };
138
139 struct r300_textures_state {
140 /* Textures. */
141 struct pipe_sampler_view *fragment_sampler_views[16];
142 int texture_count;
143 /* Sampler states. */
144 struct r300_sampler_state *sampler_states[16];
145 int sampler_count;
146
147 /* These is the merge of the texture and sampler states. */
148 unsigned count;
149 uint32_t tx_enable; /* R300_TX_ENABLE: 0x4101 */
150 struct r300_texture_sampler_state {
151 uint32_t format[3]; /* R300_TX_FORMAT[0-2] */
152 uint32_t filter[2]; /* R300_TX_FILTER[0-1] */
153 uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
154 uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */
155 } regs[16];
156 };
157
158 struct r300_vertex_stream_state {
159 /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
160 uint32_t vap_prog_stream_cntl[8];
161 /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
162 uint32_t vap_prog_stream_cntl_ext[8];
163
164 unsigned count;
165 };
166
167 struct r300_vap_output_state {
168 uint32_t vap_vtx_state_cntl; /* R300_VAP_VTX_STATE_CNTL: 0x2180 */
169 uint32_t vap_vsm_vtx_assm; /* R300_VAP_VSM_VTX_ASSM: 0x2184 */
170 uint32_t vap_out_vtx_fmt[2]; /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */
171 };
172
173 struct r300_viewport_state {
174 float xscale; /* R300_VAP_VPORT_XSCALE: 0x2098 */
175 float xoffset; /* R300_VAP_VPORT_XOFFSET: 0x209c */
176 float yscale; /* R300_VAP_VPORT_YSCALE: 0x20a0 */
177 float yoffset; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
178 float zscale; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */
179 float zoffset; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
180 uint32_t vte_control; /* R300_VAP_VTE_CNTL: 0x20b0 */
181 };
182
183 struct r300_ztop_state {
184 uint32_t z_buffer_top; /* R300_ZB_ZTOP: 0x4f14 */
185 };
186
187 /* The next several objects are not pure Radeon state; they inherit from
188 * various Gallium classes. */
189
190 struct r300_constant_buffer {
191 /* Buffer of constants */
192 float constants[256][4];
193 /* Total number of constants */
194 unsigned count;
195 };
196
197 /* Query object.
198 *
199 * This is not a subclass of pipe_query because pipe_query is never
200 * actually fully defined. So, rather than have it as a member, and do
201 * subclass-style casting, we treat pipe_query as an opaque, and just
202 * trust that our state tracker does not ever mess up query objects.
203 */
204 struct r300_query {
205 /* The kind of query. Currently only OQ is supported. */
206 unsigned type;
207 /* Whether this query is currently active. Only active queries will
208 * get emitted into the command stream, and only active queries get
209 * tallied. */
210 boolean active;
211 /* The current count of this query. Required to be at least 32 bits. */
212 unsigned int count;
213 /* The offset of this query into the query buffer, in bytes. */
214 unsigned offset;
215 /* if we've flushed the query */
216 boolean flushed;
217 /* if begin has been emitted */
218 boolean begin_emitted;
219 /* Linked list members. */
220 struct r300_query* prev;
221 struct r300_query* next;
222 };
223
224 struct r300_texture {
225 /* Parent class */
226 struct pipe_texture tex;
227
228 /* Offsets into the buffer. */
229 unsigned offset[R300_MAX_TEXTURE_LEVELS];
230
231 /* A pitch for each mip-level */
232 unsigned pitch[R300_MAX_TEXTURE_LEVELS];
233
234 /* Size of one zslice or face based on the texture target */
235 unsigned layer_size[R300_MAX_TEXTURE_LEVELS];
236
237 /* Whether the mipmap level is macrotiled. */
238 enum r300_buffer_tiling mip_macrotile[R300_MAX_TEXTURE_LEVELS];
239
240 /**
241 * If non-zero, override the natural texture layout with
242 * a custom stride (in bytes).
243 *
244 * \note Mipmapping fails for textures with a non-natural layout!
245 *
246 * \sa r300_texture_get_stride
247 */
248 unsigned stride_override;
249
250 /* Total size of this texture, in bytes. */
251 unsigned size;
252
253 /* Whether this texture has non-power-of-two dimensions
254 * or a user-specified pitch.
255 * It can be either a regular texture or a rectangle one.
256 */
257 boolean uses_pitch;
258
259 /* Pipe buffer backing this texture. */
260 struct r300_winsys_buffer *buffer;
261
262 /* Registers carrying texture format data. */
263 struct r300_texture_format_state state;
264 struct r300_texture_fb_state fb_state;
265
266 /* Buffer tiling */
267 enum r300_buffer_tiling microtile, macrotile;
268 };
269
270 struct r300_vertex_info {
271 /* Parent class */
272 struct vertex_info vinfo;
273
274 /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
275 uint32_t vap_prog_stream_cntl[8];
276 /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
277 uint32_t vap_prog_stream_cntl_ext[8];
278 };
279
280 struct r300_vertex_element_state {
281 unsigned count;
282 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
283
284 struct r300_vertex_stream_state vertex_stream;
285 };
286
287 extern struct pipe_viewport_state r300_viewport_identity;
288
289 struct r300_context {
290 /* Parent class */
291 struct pipe_context context;
292
293 /* The interface to the windowing system, etc. */
294 struct r300_winsys_screen *rws;
295 /* Draw module. Used mostly for SW TCL. */
296 struct draw_context* draw;
297 /* Accelerated blit support. */
298 struct blitter_context* blitter;
299
300 /* Vertex buffer for rendering. */
301 struct pipe_buffer* vbo;
302 /* Offset into the VBO. */
303 size_t vbo_offset;
304
305 /* Occlusion query buffer. */
306 struct pipe_buffer* oqbo;
307 /* Query list. */
308 struct r300_query *query_current;
309 struct r300_query query_list;
310
311 /* Various CSO state objects. */
312 /* Beginning of atom list. */
313 struct r300_atom atom_list;
314 /* Blend state. */
315 struct r300_atom blend_state;
316 /* Blend color state. */
317 struct r300_atom blend_color_state;
318 /* User clip planes. */
319 struct r300_atom clip_state;
320 /* Shader constants. */
321 struct r300_constant_buffer shader_constants[PIPE_SHADER_TYPES];
322 /* Depth, stencil, and alpha state. */
323 struct r300_atom dsa_state;
324 /* Fragment shader. */
325 struct r300_fragment_shader* fs;
326 /* Framebuffer state. */
327 struct r300_atom fb_state;
328 /* Rasterizer state. */
329 struct r300_atom rs_state;
330 /* RS block state. */
331 struct r300_atom rs_block_state;
332 /* Scissor state. */
333 struct r300_atom scissor_state;
334 /* Textures state. */
335 struct r300_atom textures_state;
336 /* Vertex stream formatting state. */
337 struct r300_atom vertex_stream_state;
338 /* VAP (vertex shader) output mapping state. */
339 struct r300_atom vap_output_state;
340 /* Vertex shader. */
341 struct r300_atom vs_state;
342 /* Viewport state. */
343 struct r300_atom viewport_state;
344 /* ZTOP state. */
345 struct r300_atom ztop_state;
346 /* PVS flush. */
347 struct r300_atom pvs_flush;
348 /* Texture cache invalidate. */
349 struct r300_atom texture_cache_inval;
350
351 /* Invariant state. This must be emitted to get the engine started. */
352 struct r300_atom invariant_state;
353
354 /* Vertex buffers for Gallium. */
355 struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
356 int vertex_buffer_count;
357 int vertex_buffer_max_index;
358 /* Vertex elements for Gallium. */
359 struct r300_vertex_element_state *velems;
360 bool any_user_vbs;
361
362 /* Vertex info for Draw. */
363 struct vertex_info vertex_info;
364
365 struct pipe_stencil_ref stencil_ref;
366
367 struct pipe_clip_state clip;
368
369 struct pipe_viewport_state viewport;
370
371 /* Bitmask of dirty state objects. */
372 uint32_t dirty_state;
373 /* Flag indicating whether or not the HW is dirty. */
374 uint32_t dirty_hw;
375 /* Whether polygon offset is enabled. */
376 boolean polygon_offset_enabled;
377 /* Z buffer bit depth. */
378 uint32_t zbuffer_bpp;
379 /* Whether scissor is enabled. */
380 boolean scissor_enabled;
381 /* Whether rendering is conditional and should be skipped. */
382 boolean skip_rendering;
383 /* upload managers */
384 struct u_upload_mgr *upload_vb;
385 struct u_upload_mgr *upload_ib;
386 };
387
388 /* Convenience cast wrapper. */
389 static INLINE struct r300_context* r300_context(struct pipe_context* context)
390 {
391 return (struct r300_context*)context;
392 }
393
394
395 struct pipe_context* r300_create_context(struct pipe_screen* screen,
396 void *priv);
397
398 /* Context initialization. */
399 struct draw_stage* r300_draw_stage(struct r300_context* r300);
400 void r300_init_state_functions(struct r300_context* r300);
401 void r300_init_surface_functions(struct r300_context* r300);
402 void r300_init_tex_functions( struct pipe_context *pipe );
403
404 static INLINE boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags)
405 {
406 return SCREEN_DBG_ON(r300_screen(ctx->context.screen), flags);
407 }
408
409 static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags,
410 const char * fmt, ...)
411 {
412 if (CTX_DBG_ON(ctx, flags)) {
413 va_list va;
414 va_start(va, fmt);
415 vfprintf(stderr, fmt, va);
416 va_end(va);
417 }
418 }
419
420 #define DBG_ON CTX_DBG_ON
421 #define DBG CTX_DBG
422
423 #endif /* R300_CONTEXT_H */