2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #ifndef R300_CONTEXT_H
24 #define R300_CONTEXT_H
26 #include "draw/draw_vertex.h"
28 #include "util/u_blitter.h"
30 #include "pipe/p_context.h"
31 #include "util/u_inlines.h"
32 #include "util/u_transfer.h"
33 #include "util/u_vbuf_mgr.h"
35 #include "r300_defines.h"
36 #include "r300_screen.h"
37 #include "../../winsys/radeon/drm/radeon_winsys.h"
41 struct r300_fragment_shader
;
42 struct r300_vertex_shader
;
43 struct r300_stencilref_context
;
46 /* Name, for debugging. */
50 /* Emit the state to the context. */
51 void (*emit
)(struct r300_context
*, unsigned, void*);
52 /* Upper bound on number of dwords to emit. */
54 /* Whether this atom should be emitted. */
56 /* Whether this atom may be emitted with state == NULL. */
57 boolean allow_null_state
;
60 struct r300_aa_state
{
61 struct r300_surface
*dest
;
64 uint32_t aaresolve_ctl
;
67 struct r300_blend_state
{
68 struct pipe_blend_state state
;
71 uint32_t cb_noclamp
[8];
72 uint32_t cb_no_readwrite
[8];
75 struct r300_blend_color_state
{
76 struct pipe_blend_color state
;
80 struct r300_clip_state
{
81 struct pipe_clip_state clip
;
86 struct r300_dsa_state
{
87 struct pipe_depth_stencil_alpha_state dsa
;
89 /* This is actually a command buffer with named dwords. */
91 uint32_t alpha_function
; /* R300_FG_ALPHA_FUNC: 0x4bd4 */
93 uint32_t z_buffer_control
; /* R300_ZB_CNTL: 0x4f00 */
94 uint32_t z_stencil_control
; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
95 uint32_t stencil_ref_mask
; /* R300_ZB_STENCILREFMASK: 0x4f08 */
97 uint32_t stencil_ref_bf
; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
99 uint32_t alpha_value
; /* R500_FG_ALPHA_VALUE: 0x4be0 */
101 /* The same, but for FP16 alpha test. */
102 uint32_t cb_begin_fp16
;
103 uint32_t alpha_function_fp16
; /* R300_FG_ALPHA_FUNC: 0x4bd4 */
104 uint32_t cb_reg_seq_fp16
;
105 uint32_t z_buffer_control_fp16
; /* R300_ZB_CNTL: 0x4f00 */
106 uint32_t z_stencil_control_fp16
; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
107 uint32_t stencil_ref_mask_fp16
; /* R300_ZB_STENCILREFMASK: 0x4f08 */
108 uint32_t cb_reg_fp16
;
109 uint32_t stencil_ref_bf_fp16
; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
110 uint32_t cb_reg1_fp16
;
111 uint32_t alpha_value_fp16
; /* R500_FG_ALPHA_VALUE: 0x4be0 */
113 /* The second command buffer disables zbuffer reads and writes. */
114 uint32_t cb_zb_no_readwrite
[10];
115 uint32_t cb_fp16_zb_no_readwrite
[10];
117 /* Whether a two-sided stencil is enabled. */
119 /* Whether a fallback should be used for a two-sided stencil ref value. */
120 boolean two_sided_stencil_ref
;
123 struct r300_hyperz_state
{
125 /* This is actually a command buffer with named dwords. */
126 uint32_t cb_flush_begin
;
127 uint32_t zb_zcache_ctlstat
; /* R300_ZB_CACHE_CNTL */
129 uint32_t zb_bw_cntl
; /* R300_ZB_BW_CNTL */
131 uint32_t zb_depthclearvalue
; /* R300_ZB_DEPTHCLEARVALUE */
133 uint32_t sc_hyperz
; /* R300_SC_HYPERZ */
135 uint32_t gb_z_peq_config
; /* R300_GB_Z_PEQ_CONFIG: 0x4028 */
138 struct r300_gpu_flush
{
139 uint32_t cb_flush_clean
[6];
142 #define RS_STATE_MAIN_SIZE 25
144 struct r300_rs_state
{
145 /* Original rasterizer state. */
146 struct pipe_rasterizer_state rs
;
147 /* Draw-specific rasterizer state. */
148 struct pipe_rasterizer_state rs_draw
;
150 /* Command buffers. */
151 uint32_t cb_main
[RS_STATE_MAIN_SIZE
];
152 uint32_t cb_poly_offset_zb16
[5];
153 uint32_t cb_poly_offset_zb24
[5];
155 /* The index to cb_main where the cull_mode register value resides. */
156 unsigned cull_mode_index
;
158 /* Whether polygon offset is enabled. */
159 boolean polygon_offset_enable
;
161 /* This is emitted in the draw function. */
162 uint32_t color_control
; /* R300_GA_COLOR_CONTROL: 0x4278 */
165 struct r300_rs_block
{
166 uint32_t vap_vtx_state_cntl
; /* R300_VAP_VTX_STATE_CNTL: 0x2180 */
167 uint32_t vap_vsm_vtx_assm
; /* R300_VAP_VSM_VTX_ASSM: 0x2184 */
168 uint32_t vap_out_vtx_fmt
[2]; /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */
171 uint32_t ip
[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
172 uint32_t count
; /* R300_RS_COUNT */
173 uint32_t inst_count
; /* R300_RS_INST_COUNT */
174 uint32_t inst
[8]; /* R300_RS_INST_[0-7] */
177 struct r300_sampler_state
{
178 struct pipe_sampler_state state
;
180 uint32_t filter0
; /* R300_TX_FILTER0: 0x4400 */
181 uint32_t filter1
; /* R300_TX_FILTER1: 0x4440 */
183 /* Min/max LOD must be clamped to [0, last_level], thus
184 * it's dependent on a currently bound texture */
185 unsigned min_lod
, max_lod
;
188 struct r300_texture_format_state
{
189 uint32_t format0
; /* R300_TX_FORMAT0: 0x4480 */
190 uint32_t format1
; /* R300_TX_FORMAT1: 0x44c0 */
191 uint32_t format2
; /* R300_TX_FORMAT2: 0x4500 */
192 uint32_t tile_config
; /* R300_TX_OFFSET (subset thereof) */
193 uint32_t us_format0
; /* R500_US_FORMAT0_0: 0x4640 (through 15) */
196 struct r300_sampler_view
{
197 struct pipe_sampler_view base
;
199 /* Swizzles in the UTIL_FORMAT_SWIZZLE_* representation,
200 * derived from base. */
201 unsigned char swizzle
[4];
203 /* Copy of r300_texture::texture_format_state with format-specific bits
205 struct r300_texture_format_state format
;
207 /* The texture cache region for this texture. */
208 uint32_t texcache_region
;
211 struct r300_texture_sampler_state
{
212 struct r300_texture_format_state format
;
213 uint32_t filter0
; /* R300_TX_FILTER0: 0x4400 */
214 uint32_t filter1
; /* R300_TX_FILTER1: 0x4440 */
215 uint32_t border_color
; /* R300_TX_BORDER_COLOR: 0x45c0 */
218 struct r300_textures_state
{
220 struct r300_sampler_view
*sampler_views
[16];
221 int sampler_view_count
;
222 /* Sampler states. */
223 struct r300_sampler_state
*sampler_states
[16];
224 int sampler_state_count
;
226 /* This is the merge of the texture and sampler states. */
228 uint32_t tx_enable
; /* R300_TX_ENABLE: 0x4101 */
229 struct r300_texture_sampler_state regs
[16];
232 struct r300_vertex_stream_state
{
233 /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
234 uint32_t vap_prog_stream_cntl
[8];
235 /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
236 uint32_t vap_prog_stream_cntl_ext
[8];
241 struct r300_invariant_state
{
245 struct r300_vap_invariant_state
{
249 struct r300_viewport_state
{
250 float xscale
; /* R300_VAP_VPORT_XSCALE: 0x2098 */
251 float xoffset
; /* R300_VAP_VPORT_XOFFSET: 0x209c */
252 float yscale
; /* R300_VAP_VPORT_YSCALE: 0x20a0 */
253 float yoffset
; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
254 float zscale
; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */
255 float zoffset
; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
256 uint32_t vte_control
; /* R300_VAP_VTE_CNTL: 0x20b0 */
259 struct r300_ztop_state
{
260 uint32_t z_buffer_top
; /* R300_ZB_ZTOP: 0x4f14 */
263 /* The next several objects are not pure Radeon state; they inherit from
264 * various Gallium classes. */
266 struct r300_constant_buffer
{
267 /* Buffer of constants */
269 /* Remapping table. */
270 unsigned *remap_table
;
271 /* const buffer base */
272 uint32_t buffer_base
;
277 * This is not a subclass of pipe_query because pipe_query is never
278 * actually fully defined. So, rather than have it as a member, and do
279 * subclass-style casting, we treat pipe_query as an opaque, and just
280 * trust that our state tracker does not ever mess up query objects.
283 /* The kind of query. Currently only OQ is supported. */
285 /* The number of pipes where query results are stored. */
287 /* How many results have been written, in dwords. It's incremented
288 * after end_query and flush. */
289 unsigned num_results
;
290 /* if begin has been emitted */
291 boolean begin_emitted
;
293 /* The buffer where query results are stored. */
294 struct pb_buffer
*buf
;
295 struct radeon_winsys_cs_handle
*cs_buf
;
296 /* The size of the buffer. */
297 unsigned buffer_size
;
298 /* The domain of the buffer. */
299 enum radeon_bo_domain domain
;
301 /* Linked list members. */
302 struct r300_query
* prev
;
303 struct r300_query
* next
;
306 struct r300_surface
{
307 struct pipe_surface base
;
309 /* Winsys buffer backing the texture. */
310 struct pb_buffer
*buf
;
311 struct radeon_winsys_cs_handle
*cs_buf
;
313 enum radeon_bo_domain domain
;
315 uint32_t offset
; /* COLOROFFSET or DEPTHOFFSET. */
316 uint32_t pitch
; /* COLORPITCH or DEPTHPITCH. */
317 uint32_t pitch_zmask
; /* ZMASK_PITCH */
318 uint32_t pitch_hiz
; /* HIZ_PITCH */
319 uint32_t format
; /* US_OUT_FMT or ZB_FORMAT. */
321 /* Parameters dedicated to the CBZB clear. */
322 uint32_t cbzb_width
; /* Aligned width. */
323 uint32_t cbzb_height
; /* Half of the height. */
324 uint32_t cbzb_midpoint_offset
; /* DEPTHOFFSET. */
325 uint32_t cbzb_pitch
; /* DEPTHPITCH. */
326 uint32_t cbzb_format
; /* ZB_FORMAT. */
328 /* Whether the CBZB clear is allowed on the surface. */
329 boolean cbzb_allowed
;
332 struct r300_texture_desc
{
333 /* Width, height, and depth.
334 * Most of the time, these are equal to pipe_texture::width0, height0,
335 * and depth0. However, NPOT 3D textures must have dimensions aligned
336 * to POT, and this is the only case when these variables differ from
338 unsigned width0
, height0
, depth0
;
341 * Macrotiling is specified per-level because small mipmaps cannot
343 enum radeon_bo_layout microtile
;
344 enum radeon_bo_layout macrotile
[R300_MAX_TEXTURE_LEVELS
];
346 /* Offsets into the buffer. */
347 unsigned offset_in_bytes
[R300_MAX_TEXTURE_LEVELS
];
349 /* Strides for each mip-level. */
350 unsigned stride_in_pixels
[R300_MAX_TEXTURE_LEVELS
];
351 unsigned stride_in_bytes
[R300_MAX_TEXTURE_LEVELS
];
353 /* Size of one zslice or face or 2D image based on the texture target. */
354 unsigned layer_size_in_bytes
[R300_MAX_TEXTURE_LEVELS
];
356 /* Total size of this texture, in bytes,
357 * derived from the texture properties. */
358 unsigned size_in_bytes
;
360 /* Total size of the buffer backing this texture, in bytes.
361 * It must be >= size. */
362 unsigned buffer_size_in_bytes
;
365 * If non-zero, override the natural texture layout with
366 * a custom stride (in bytes).
368 * \note Mipmapping fails for textures with a non-natural layout!
370 * \sa r300_texture_get_stride
372 unsigned stride_in_bytes_override
;
374 /* Whether this texture has non-power-of-two dimensions.
375 * It can be either a regular texture or a rectangle one. */
378 /* This flag says that hardware must use the stride for addressing
379 * instead of the width. */
380 boolean uses_stride_addressing
;
382 /* Whether CBZB fast color clear is allowed on the miplevel. */
383 boolean cbzb_allowed
[R300_MAX_TEXTURE_LEVELS
];
385 /* Zbuffer compression info for each miplevel. */
386 boolean zcomp8x8
[R300_MAX_TEXTURE_LEVELS
];
387 /* If zero, then disable Z compression/HiZ. */
388 unsigned zmask_dwords
[R300_MAX_TEXTURE_LEVELS
];
389 unsigned hiz_dwords
[R300_MAX_TEXTURE_LEVELS
];
390 /* Zmask/HiZ strides for each miplevel. */
391 unsigned zmask_stride_in_pixels
[R300_MAX_TEXTURE_LEVELS
];
392 unsigned hiz_stride_in_pixels
[R300_MAX_TEXTURE_LEVELS
];
397 struct u_vbuf_resource b
;
399 /* Winsys buffer backing this resource. */
400 struct pb_buffer
*buf
;
401 struct radeon_winsys_cs_handle
*cs_buf
;
402 enum radeon_bo_domain domain
;
405 /* Constant buffers are in user memory. */
406 uint8_t *constant_buffer
;
408 /* Texture description (addressing, layout, special features). */
409 struct r300_texture_desc tex
;
411 /* Registers carrying texture format data. */
412 /* Only format-independent bits should be filled in. */
413 struct r300_texture_format_state tx_format
;
415 /* Where the texture starts in the buffer. */
418 /* This is the level tiling flags were last time set for.
419 * It's used to prevent redundant tiling-flags changes from happening.*/
420 unsigned surface_level
;
423 struct r300_vertex_element_state
{
425 struct pipe_vertex_element velem
[PIPE_MAX_ATTRIBS
];
426 unsigned format_size
[PIPE_MAX_ATTRIBS
];
428 struct u_vbuf_mgr_elements
*vmgr_elements
;
430 /* The size of the vertex, in dwords. */
431 unsigned vertex_size_dwords
;
433 struct r300_vertex_stream_state vertex_stream
;
439 /* The function, when determined, is set in stone
440 * until the next HiZ clear. */
442 /* MAX is written to the HiZ buffer.
443 * Used for LESS, LEQUAL. */
446 /* MIN is written to the HiZ buffer.
447 * Used for GREATER, GEQUAL. */
451 /* For deferred fragment shader state validation. */
452 enum r300_fs_validity_status
{
453 FRAGMENT_SHADER_VALID
, /* No need to change/validate the FS. */
454 FRAGMENT_SHADER_MAYBE_DIRTY
,/* Validate the FS if external state was changed. */
455 FRAGMENT_SHADER_DIRTY
/* Always validate the FS (if the FS was changed) */
458 struct r300_context
{
460 struct pipe_context context
;
462 /* The interface to the windowing system, etc. */
463 struct radeon_winsys
*rws
;
464 /* The command stream. */
465 struct radeon_winsys_cs
*cs
;
467 struct r300_screen
*screen
;
469 /* Draw module. Used mostly for SW TCL. */
470 struct draw_context
* draw
;
471 /* Vertex buffer for SW TCL. */
472 struct pipe_resource
* vbo
;
473 /* Offset and size into the SW TCL VBO. */
474 size_t draw_vbo_offset
;
475 size_t draw_vbo_size
;
476 /* Whether the VBO must not be flushed. */
477 boolean draw_vbo_locked
;
478 boolean draw_first_emitted
;
480 /* Accelerated blit support. */
481 struct blitter_context
* blitter
;
482 /* Stencil two-sided reference value fallback. */
483 struct r300_stencilref_context
*stencilref_fallback
;
485 /* The KIL opcode needs the first texture unit to be enabled
486 * on r3xx-r4xx. In order to calm down the CS checker, we bind this
487 * dummy texture there. */
488 struct r300_sampler_view
*texkill_sampler
;
490 /* When no vertex buffer is set, this one is used instead to prevent
492 struct pipe_resource
*dummy_vb
;
494 /* The currently active query. */
495 struct r300_query
*query_current
;
496 /* The saved query for blitter operations. */
497 struct r300_query
*blitter_saved_query
;
499 struct r300_query query_list
;
501 /* Various CSO state objects. */
503 /* Each atom is emitted in the order it appears here, which can affect
504 * performance and stability if not handled with care. */
506 struct r300_atom gpu_flush
;
507 /* Anti-aliasing (MSAA) state. */
508 struct r300_atom aa_state
;
509 /* Framebuffer state. */
510 struct r300_atom fb_state
;
511 /* HyperZ state (various SC/ZB bits). */
512 struct r300_atom hyperz_state
;
514 struct r300_atom ztop_state
;
515 /* Depth, stencil, and alpha state. */
516 struct r300_atom dsa_state
;
518 struct r300_atom blend_state
;
519 /* Blend color state. */
520 struct r300_atom blend_color_state
;
522 struct r300_atom scissor_state
;
523 /* Invariant state. This must be emitted to get the engine started. */
524 struct r300_atom invariant_state
;
525 /* Viewport state. */
526 struct r300_atom viewport_state
;
528 struct r300_atom pvs_flush
;
529 /* VAP invariant state. */
530 struct r300_atom vap_invariant_state
;
531 /* Vertex stream formatting state. */
532 struct r300_atom vertex_stream_state
;
534 struct r300_atom vs_state
;
535 /* User clip planes. */
536 struct r300_atom clip_state
;
537 /* RS block state + VAP (vertex shader) output mapping state. */
538 struct r300_atom rs_block_state
;
539 /* Rasterizer state. */
540 struct r300_atom rs_state
;
541 /* Framebuffer state (pipelined regs). */
542 struct r300_atom fb_state_pipelined
;
543 /* Fragment shader. */
545 /* Fragment shader RC_CONSTANT_STATE variables. */
546 struct r300_atom fs_rc_constant_state
;
547 /* Fragment shader constant buffer. */
548 struct r300_atom fs_constants
;
549 /* Vertex shader constant buffer. */
550 struct r300_atom vs_constants
;
551 /* Texture cache invalidate. */
552 struct r300_atom texture_cache_inval
;
553 /* Textures state. */
554 struct r300_atom textures_state
;
556 struct r300_atom hiz_clear
;
558 struct r300_atom zmask_clear
;
559 /* Occlusion query. */
560 struct r300_atom query_start
;
562 /* The pointers to the first and the last atom. */
563 struct r300_atom
*first_dirty
, *last_dirty
;
565 /* Vertex elements for Gallium. */
566 struct r300_vertex_element_state
*velems
;
568 struct pipe_index_buffer index_buffer
;
570 /* Vertex info for Draw. */
571 struct vertex_info vertex_info
;
573 struct pipe_stencil_ref stencil_ref
;
574 struct pipe_viewport_state viewport
;
576 /* Stream locations for SWTCL. */
577 int stream_loc_notcl
[16];
579 /* Flag indicating whether or not the HW is dirty. */
581 /* Whether polygon offset is enabled. */
582 boolean polygon_offset_enabled
;
583 /* Z buffer bit depth. */
584 uint32_t zbuffer_bpp
;
585 /* Whether rendering is conditional and should be skipped. */
586 boolean skip_rendering
;
587 /* Point sprites texcoord index, 1 bit per texcoord */
588 int sprite_coord_enable
;
589 /* Whether two-sided color selection is enabled (AKA light_twoside). */
590 boolean two_sided_color
;
591 /* Whether fragment color clamping is enabled. */
593 /* Whether fast color clear is enabled. */
595 /* Whether ZMASK is enabled. */
596 boolean zmask_in_use
;
597 /* Whether ZMASK is being decompressed. */
598 boolean zmask_decompress
;
599 /* Whether ZMASK/HIZ is locked, i.e. should be disabled and cannot be taken over. */
600 boolean hyperz_locked
;
601 /* The zbuffer the ZMASK of which is locked. */
602 struct pipe_surface
*locked_zbuffer
;
603 /* Whether HIZ is enabled. */
605 /* HiZ function. Can be either MIN or MAX. */
606 enum r300_hiz_func hiz_func
;
607 /* HiZ clear value. */
608 uint32_t hiz_clear_value
;
609 /* Whether fragment shader needs to be validated. */
610 enum r300_fs_validity_status fs_status
;
611 /* Framebuffer multi-write. */
612 boolean fb_multiwrite
;
614 void *dsa_decompress_zmask
;
616 struct u_vbuf_mgr
*vbuf_mgr
;
618 struct util_slab_mempool pool_transfers
;
621 uint64_t flush_counter
;
623 /* const tracking for VS */
626 /* Vertex array state info */
627 boolean vertex_arrays_dirty
;
628 boolean vertex_arrays_indexed
;
629 int vertex_arrays_offset
;
630 int vertex_arrays_instance_id
;
631 boolean instancing_enabled
;
634 #define foreach_atom(r300, atom) \
635 for (atom = &r300->gpu_flush; atom != (&r300->query_start)+1; atom++)
637 #define foreach_dirty_atom(r300, atom) \
638 for (atom = r300->first_dirty; atom != r300->last_dirty; atom++)
640 /* Convenience cast wrappers. */
641 static INLINE
struct r300_query
* r300_query(struct pipe_query
* q
)
643 return (struct r300_query
*)q
;
646 static INLINE
struct r300_surface
* r300_surface(struct pipe_surface
* surf
)
648 return (struct r300_surface
*)surf
;
651 static INLINE
struct r300_resource
* r300_resource(struct pipe_resource
* tex
)
653 return (struct r300_resource
*)tex
;
656 static INLINE
struct r300_context
* r300_context(struct pipe_context
* context
)
658 return (struct r300_context
*)context
;
661 static INLINE
struct r300_fragment_shader
*r300_fs(struct r300_context
*r300
)
663 return (struct r300_fragment_shader
*)r300
->fs
.state
;
666 static INLINE
void r300_mark_atom_dirty(struct r300_context
*r300
,
667 struct r300_atom
*atom
)
671 if (!r300
->first_dirty
) {
672 r300
->first_dirty
= atom
;
673 r300
->last_dirty
= atom
+1;
675 if (atom
< r300
->first_dirty
)
676 r300
->first_dirty
= atom
;
677 else if (atom
+1 > r300
->last_dirty
)
678 r300
->last_dirty
= atom
+1;
682 struct pipe_context
* r300_create_context(struct pipe_screen
* screen
,
685 /* Context initialization. */
686 struct draw_stage
* r300_draw_stage(struct r300_context
* r300
);
687 void r300_init_blit_functions(struct r300_context
*r300
);
688 void r300_init_flush_functions(struct r300_context
* r300
);
689 void r300_init_query_functions(struct r300_context
* r300
);
690 void r300_init_render_functions(struct r300_context
*r300
);
691 void r300_init_state_functions(struct r300_context
* r300
);
692 void r300_init_resource_functions(struct r300_context
* r300
);
695 void r300_decompress_zmask(struct r300_context
*r300
);
696 void r300_decompress_zmask_locked_unsafe(struct r300_context
*r300
);
697 void r300_decompress_zmask_locked(struct r300_context
*r300
);
700 void r300_flush(struct pipe_context
*pipe
,
702 struct pipe_fence_handle
**fence
);
705 void r300_update_hyperz_state(struct r300_context
* r300
);
708 void r300_resume_query(struct r300_context
*r300
,
709 struct r300_query
*query
);
710 void r300_stop_query(struct r300_context
*r300
);
712 /* r300_render_translate.c */
713 void r300_translate_index_buffer(struct r300_context
*r300
,
714 struct pipe_resource
**index_buffer
,
715 unsigned *index_size
, unsigned index_offset
,
716 unsigned *start
, unsigned count
);
718 /* r300_render_stencilref.c */
719 void r300_plug_in_stencil_ref_fallback(struct r300_context
*r300
);
722 void r300_draw_flush_vbuf(struct r300_context
*r300
);
723 void r500_emit_index_bias(struct r300_context
*r300
, int index_bias
);
726 enum r300_fb_state_change
{
727 R300_CHANGED_FB_STATE
= 0,
728 R300_CHANGED_HYPERZ_FLAG
,
729 R300_CHANGED_MULTIWRITE
732 void r300_mark_fb_state_dirty(struct r300_context
*r300
,
733 enum r300_fb_state_change change
);
734 void r300_mark_fs_code_dirty(struct r300_context
*r300
);
736 /* r300_state_derived.c */
737 void r300_update_derived_state(struct r300_context
* r300
);
740 void r500_dump_rs_block(struct r300_rs_block
*rs
);
743 static INLINE boolean
CTX_DBG_ON(struct r300_context
* ctx
, unsigned flags
)
745 return SCREEN_DBG_ON(ctx
->screen
, flags
);
748 static INLINE
void CTX_DBG(struct r300_context
* ctx
, unsigned flags
,
749 const char * fmt
, ...)
751 if (CTX_DBG_ON(ctx
, flags
)) {
754 vfprintf(stderr
, fmt
, va
);
759 #define DBG_ON CTX_DBG_ON
762 #endif /* R300_CONTEXT_H */