src/gallium/drivers/r300/r300_context.h

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #ifndef R300_CONTEXT_H
  24 #define R300_CONTEXT_H
  25
  26 #include "draw/draw_vertex.h"
  27
  28 #include "util/u_blitter.h"
  29
  30 #include "pipe/p_context.h"
  31 #include "util/u_inlines.h"
  32 #include "util/u_transfer.h"
  33
  34 #include "r300_defines.h"
  35 #include "r300_screen.h"
  36 #include "../../winsys/radeon/drm/radeon_winsys.h"
  37
  38 struct u_upload_mgr;
  39 struct r300_context;
  40 struct r300_fragment_shader;
  41 struct r300_vertex_shader;
  42 struct r300_stencilref_context;
  43
  44 struct r300_atom {
  45     /* Name, for debugging. */
  46     const char* name;
  47     /* Opaque state. */
  48     void* state;
  49     /* Emit the state to the context. */
  50     void (*emit)(struct r300_context*, unsigned, void*);
  51     /* Upper bound on number of dwords to emit. */
  52     unsigned size;
  53     /* Whether this atom should be emitted. */
  54     boolean dirty;
  55     /* Whether this atom may be emitted with state == NULL. */
  56     boolean allow_null_state;
  57 };
  58
  59 struct r300_aa_state {
  60     struct r300_surface *dest;
  61
  62     uint32_t aa_config;
  63     uint32_t aaresolve_ctl;
  64 };
  65
  66 struct r300_blend_state {
  67     struct pipe_blend_state state;
  68
  69     uint32_t cb_clamp[8];
  70     uint32_t cb_noclamp[8];
  71     uint32_t cb_no_readwrite[8];
  72 };
  73
  74 struct r300_blend_color_state {
  75     struct pipe_blend_color state;
  76     uint32_t cb[3];
  77 };
  78
  79 struct r300_clip_state {
  80     uint32_t cb[29];
  81 };
  82
  83 struct r300_dsa_state {
  84     struct pipe_depth_stencil_alpha_state dsa;
  85
  86     /* This is actually a command buffer with named dwords. */
  87     uint32_t cb_begin;
  88     uint32_t alpha_function;    /* R300_FG_ALPHA_FUNC: 0x4bd4 */
  89     uint32_t cb_reg_seq;
  90     uint32_t z_buffer_control;  /* R300_ZB_CNTL: 0x4f00 */
  91     uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
  92     uint32_t stencil_ref_mask;  /* R300_ZB_STENCILREFMASK: 0x4f08 */
  93     uint32_t cb_reg;
  94     uint32_t stencil_ref_bf;    /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
  95     uint32_t cb_reg1;
  96     uint32_t alpha_value;       /* R500_FG_ALPHA_VALUE: 0x4be0 */
  97
  98     /* The same, but for FP16 alpha test. */
  99     uint32_t cb_begin_fp16;
 100     uint32_t alpha_function_fp16;    /* R300_FG_ALPHA_FUNC: 0x4bd4 */
 101     uint32_t cb_reg_seq_fp16;
 102     uint32_t z_buffer_control_fp16;  /* R300_ZB_CNTL: 0x4f00 */
 103     uint32_t z_stencil_control_fp16; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
 104     uint32_t stencil_ref_mask_fp16;  /* R300_ZB_STENCILREFMASK: 0x4f08 */
 105     uint32_t cb_reg_fp16;
 106     uint32_t stencil_ref_bf_fp16;    /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
 107     uint32_t cb_reg1_fp16;
 108     uint32_t alpha_value_fp16;       /* R500_FG_ALPHA_VALUE: 0x4be0 */
 109
 110     /* The second command buffer disables zbuffer reads and writes. */
 111     uint32_t cb_zb_no_readwrite[10];
 112     uint32_t cb_fp16_zb_no_readwrite[10];
 113
 114     /* Whether a two-sided stencil is enabled. */
 115     boolean two_sided;
 116     /* Whether a fallback should be used for a two-sided stencil ref value. */
 117     boolean two_sided_stencil_ref;
 118 };
 119
 120 struct r300_hyperz_state {
 121     int flush;
 122     /* This is actually a command buffer with named dwords. */
 123     uint32_t cb_flush_begin;
 124     uint32_t zb_zcache_ctlstat;     /* R300_ZB_CACHE_CNTL */
 125     uint32_t cb_begin;
 126     uint32_t zb_bw_cntl;            /* R300_ZB_BW_CNTL */
 127     uint32_t cb_reg1;
 128     uint32_t zb_depthclearvalue;    /* R300_ZB_DEPTHCLEARVALUE */
 129     uint32_t cb_reg2;
 130     uint32_t sc_hyperz;             /* R300_SC_HYPERZ */
 131     uint32_t cb_reg3;
 132     uint32_t gb_z_peq_config;       /* R300_GB_Z_PEQ_CONFIG: 0x4028 */
 133 };
 134
 135 struct r300_gpu_flush {
 136     uint32_t cb_flush_clean[6];
 137 };
 138
 139 #define RS_STATE_MAIN_SIZE 27
 140
 141 struct r300_rs_state {
 142     /* Original rasterizer state. */
 143     struct pipe_rasterizer_state rs;
 144     /* Draw-specific rasterizer state. */
 145     struct pipe_rasterizer_state rs_draw;
 146
 147     /* Command buffers. */
 148     uint32_t cb_main[RS_STATE_MAIN_SIZE];
 149     uint32_t cb_poly_offset_zb16[5];
 150     uint32_t cb_poly_offset_zb24[5];
 151
 152     /* The index to cb_main where the cull_mode register value resides. */
 153     unsigned cull_mode_index;
 154
 155     /* Whether polygon offset is enabled. */
 156     boolean polygon_offset_enable;
 157
 158     /* This is emitted in the draw function. */
 159     uint32_t color_control;         /* R300_GA_COLOR_CONTROL: 0x4278 */
 160 };
 161
 162 struct r300_rs_block {
 163     uint32_t vap_vtx_state_cntl;  /* R300_VAP_VTX_STATE_CNTL: 0x2180 */
 164     uint32_t vap_vsm_vtx_assm;    /* R300_VAP_VSM_VTX_ASSM: 0x2184 */
 165     uint32_t vap_out_vtx_fmt[2];  /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */
 166     uint32_t gb_enable;
 167
 168     uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
 169     uint32_t count; /* R300_RS_COUNT */
 170     uint32_t inst_count; /* R300_RS_INST_COUNT */
 171     uint32_t inst[8]; /* R300_RS_INST_[0-7] */
 172 };
 173
 174 struct r300_sampler_state {
 175     struct pipe_sampler_state state;
 176
 177     uint32_t filter0;      /* R300_TX_FILTER0: 0x4400 */
 178     uint32_t filter1;      /* R300_TX_FILTER1: 0x4440 */
 179
 180     /* Min/max LOD must be clamped to [0, last_level], thus
 181      * it's dependent on a currently bound texture */
 182     unsigned min_lod, max_lod;
 183 };
 184
 185 struct r300_texture_format_state {
 186     uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */
 187     uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */
 188     uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */
 189     uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */
 190     uint32_t us_format0;   /* R500_US_FORMAT0_0: 0x4640 (through 15) */
 191 };
 192
 193 struct r300_sampler_view {
 194     struct pipe_sampler_view base;
 195
 196     /* For resource_copy_region. */
 197     unsigned width0_override;
 198     unsigned height0_override;
 199
 200     /* Swizzles in the UTIL_FORMAT_SWIZZLE_* representation,
 201      * derived from base. */
 202     unsigned char swizzle[4];
 203
 204     /* Copy of r300_texture::texture_format_state with format-specific bits
 205      * added. */
 206     struct r300_texture_format_state format;
 207
 208     /* The texture cache region for this texture. */
 209     uint32_t texcache_region;
 210 };
 211
 212 struct r300_texture_sampler_state {
 213     struct r300_texture_format_state format;
 214     uint32_t filter0;      /* R300_TX_FILTER0: 0x4400 */
 215     uint32_t filter1;      /* R300_TX_FILTER1: 0x4440 */
 216     uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
 217 };
 218
 219 struct r300_textures_state {
 220     /* Textures. */
 221     struct r300_sampler_view *sampler_views[16];
 222     int sampler_view_count;
 223     /* Sampler states. */
 224     struct r300_sampler_state *sampler_states[16];
 225     int sampler_state_count;
 226
 227     /* This is the merge of the texture and sampler states. */
 228     unsigned count;
 229     uint32_t tx_enable;         /* R300_TX_ENABLE: 0x4101 */
 230     struct r300_texture_sampler_state regs[16];
 231 };
 232
 233 struct r300_vertex_stream_state {
 234     /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
 235     uint32_t vap_prog_stream_cntl[8];
 236     /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
 237     uint32_t vap_prog_stream_cntl_ext[8];
 238
 239     unsigned count;
 240 };
 241
 242 struct r300_invariant_state {
 243     uint32_t cb[24];
 244 };
 245
 246 struct r300_vap_invariant_state {
 247     uint32_t cb[11];
 248 };
 249
 250 struct r300_viewport_state {
 251     float xscale;         /* R300_VAP_VPORT_XSCALE:  0x2098 */
 252     float xoffset;        /* R300_VAP_VPORT_XOFFSET: 0x209c */
 253     float yscale;         /* R300_VAP_VPORT_YSCALE:  0x20a0 */
 254     float yoffset;        /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
 255     float zscale;         /* R300_VAP_VPORT_ZSCALE:  0x20a8 */
 256     float zoffset;        /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
 257     uint32_t vte_control; /* R300_VAP_VTE_CNTL:      0x20b0 */
 258 };
 259
 260 struct r300_ztop_state {
 261     uint32_t z_buffer_top;      /* R300_ZB_ZTOP: 0x4f14 */
 262 };
 263
 264 /* The next several objects are not pure Radeon state; they inherit from
 265  * various Gallium classes. */
 266
 267 struct r300_constant_buffer {
 268     /* Buffer of constants */
 269     uint32_t *ptr;
 270     /* Remapping table. */
 271     unsigned *remap_table;
 272     /* const buffer base */
 273     uint32_t buffer_base;
 274 };
 275
 276 /* Query object.
 277  *
 278  * This is not a subclass of pipe_query because pipe_query is never
 279  * actually fully defined. So, rather than have it as a member, and do
 280  * subclass-style casting, we treat pipe_query as an opaque, and just
 281  * trust that our state tracker does not ever mess up query objects.
 282  */
 283 struct r300_query {
 284     /* The kind of query. Currently only OQ is supported. */
 285     unsigned type;
 286     /* The number of pipes where query results are stored. */
 287     unsigned num_pipes;
 288     /* How many results have been written, in dwords. It's incremented
 289      * after end_query and flush. */
 290     unsigned num_results;
 291     /* if begin has been emitted */
 292     boolean begin_emitted;
 293
 294     /* The buffer where query results are stored. */
 295     struct pb_buffer *buf;
 296     struct radeon_winsys_cs_handle *cs_buf;
 297 };
 298
 299 struct r300_surface {
 300     struct pipe_surface base;
 301
 302     /* Winsys buffer backing the texture. */
 303     struct pb_buffer *buf;
 304     struct radeon_winsys_cs_handle *cs_buf;
 305
 306     enum radeon_bo_domain domain;
 307
 308     uint32_t offset;    /* COLOROFFSET or DEPTHOFFSET. */
 309     uint32_t pitch;     /* COLORPITCH or DEPTHPITCH. */
 310     uint32_t pitch_zmask; /* ZMASK_PITCH */
 311     uint32_t pitch_hiz;   /* HIZ_PITCH */
 312     uint32_t format;    /* US_OUT_FMT or ZB_FORMAT. */
 313
 314     /* Parameters dedicated to the CBZB clear. */
 315     uint32_t cbzb_width;            /* Aligned width. */
 316     uint32_t cbzb_height;           /* Half of the height. */
 317     uint32_t cbzb_midpoint_offset;  /* DEPTHOFFSET. */
 318     uint32_t cbzb_pitch;            /* DEPTHPITCH. */
 319     uint32_t cbzb_format;           /* ZB_FORMAT. */
 320
 321     /* Whether the CBZB clear is allowed on the surface. */
 322     boolean cbzb_allowed;
 323 };
 324
 325 struct r300_texture_desc {
 326     /* Width, height, and depth.
 327      * Most of the time, these are equal to pipe_texture::width0, height0,
 328      * and depth0. However, NPOT 3D textures must have dimensions aligned
 329      * to POT, and this is the only case when these variables differ from
 330      * pipe_texture. */
 331     unsigned width0, height0, depth0;
 332
 333     /* Buffer tiling.
 334      * Macrotiling is specified per-level because small mipmaps cannot
 335      * be macrotiled. */
 336     enum radeon_bo_layout microtile;
 337     enum radeon_bo_layout macrotile[R300_MAX_TEXTURE_LEVELS];
 338
 339     /* Offsets into the buffer. */
 340     unsigned offset_in_bytes[R300_MAX_TEXTURE_LEVELS];
 341
 342     /* Strides for each mip-level. */
 343     unsigned stride_in_bytes[R300_MAX_TEXTURE_LEVELS];
 344
 345     /* Size of one zslice or face or 2D image based on the texture target. */
 346     unsigned layer_size_in_bytes[R300_MAX_TEXTURE_LEVELS];
 347
 348     /* Total size of this texture, in bytes,
 349      * derived from the texture properties. */
 350     unsigned size_in_bytes;
 351
 352     /**
 353      * If non-zero, override the natural texture layout with
 354      * a custom stride (in bytes).
 355      *
 356      * \note Mipmapping fails for textures with a non-natural layout!
 357      *
 358      * \sa r300_texture_get_stride
 359      */
 360     unsigned stride_in_bytes_override;
 361
 362     /* Whether this texture has non-power-of-two dimensions.
 363      * It can be either a regular texture or a rectangle one. */
 364     boolean is_npot;
 365
 366     /* This flag says that hardware must use the stride for addressing
 367      * instead of the width. */
 368     boolean uses_stride_addressing;
 369
 370     /* Whether CBZB fast color clear is allowed on the miplevel. */
 371     boolean cbzb_allowed[R300_MAX_TEXTURE_LEVELS];
 372
 373     /* Zbuffer compression info for each miplevel. */
 374     boolean zcomp8x8[R300_MAX_TEXTURE_LEVELS];
 375     /* If zero, then disable Z compression/HiZ. */
 376     unsigned zmask_dwords[R300_MAX_TEXTURE_LEVELS];
 377     unsigned hiz_dwords[R300_MAX_TEXTURE_LEVELS];
 378     /* Zmask/HiZ strides for each miplevel. */
 379     unsigned zmask_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
 380     unsigned hiz_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
 381 };
 382
 383 struct r300_resource
 384 {
 385     struct u_resource b;
 386
 387     /* Winsys buffer backing this resource. */
 388     struct pb_buffer *buf;
 389     struct radeon_winsys_cs_handle *cs_buf;
 390     enum radeon_bo_domain domain;
 391
 392     /* Constant buffers are in user memory. */
 393     uint8_t *constant_buffer;
 394
 395     /* Texture description (addressing, layout, special features). */
 396     struct r300_texture_desc tex;
 397
 398     /* This is the level tiling flags were last time set for.
 399      * It's used to prevent redundant tiling-flags changes from happening.*/
 400     unsigned surface_level;
 401 };
 402
 403 struct r300_vertex_element_state {
 404     unsigned count;
 405     struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
 406     unsigned format_size[PIPE_MAX_ATTRIBS];
 407
 408     /* The size of the vertex, in dwords. */
 409     unsigned vertex_size_dwords;
 410
 411     struct r300_vertex_stream_state vertex_stream;
 412 };
 413
 414 enum r300_hiz_func {
 415     HIZ_FUNC_NONE,
 416
 417     /* The function, when determined, is set in stone
 418      * until the next HiZ clear. */
 419
 420     /* MAX is written to the HiZ buffer.
 421      * Used for LESS, LEQUAL. */
 422     HIZ_FUNC_MAX,
 423
 424     /* MIN is written to the HiZ buffer.
 425      * Used for GREATER, GEQUAL. */
 426     HIZ_FUNC_MIN,
 427 };
 428
 429 /* For deferred fragment shader state validation. */
 430 enum r300_fs_validity_status {
 431     FRAGMENT_SHADER_VALID,      /* No need to change/validate the FS. */
 432     FRAGMENT_SHADER_MAYBE_DIRTY,/* Validate the FS if external state was changed. */
 433     FRAGMENT_SHADER_DIRTY       /* Always validate the FS (if the FS was changed) */
 434 };
 435
 436 struct r300_context {
 437     /* Parent class */
 438     struct pipe_context context;
 439
 440     /* The interface to the windowing system, etc. */
 441     struct radeon_winsys *rws;
 442     /* The command stream. */
 443     struct radeon_winsys_cs *cs;
 444     /* Screen. */
 445     struct r300_screen *screen;
 446
 447     /* Draw module. Used mostly for SW TCL. */
 448     struct draw_context* draw;
 449     /* Vertex buffer for SW TCL. */
 450     struct pipe_resource* vbo;
 451     /* Offset and size into the SW TCL VBO. */
 452     size_t draw_vbo_offset;
 453     size_t draw_vbo_size;
 454     /* Whether the VBO must not be flushed. */
 455     boolean draw_vbo_locked;
 456     boolean draw_first_emitted;
 457
 458     /* Accelerated blit support. */
 459     struct blitter_context* blitter;
 460     /* Stencil two-sided reference value fallback. */
 461     struct r300_stencilref_context *stencilref_fallback;
 462
 463     /* The KIL opcode needs the first texture unit to be enabled
 464      * on r3xx-r4xx. In order to calm down the CS checker, we bind this
 465      * dummy texture there. */
 466     struct r300_sampler_view *texkill_sampler;
 467
 468     /* When no vertex buffer is set, this one is used instead to prevent
 469      * hardlocks. */
 470     struct pipe_vertex_buffer dummy_vb;
 471
 472     /* The currently active query. */
 473     struct r300_query *query_current;
 474     /* The saved query for blitter operations. */
 475     struct r300_query *blitter_saved_query;
 476     /* Query list. */
 477     struct r300_query query_list;
 478
 479     /* Various CSO state objects. */
 480
 481     /* Each atom is emitted in the order it appears here, which can affect
 482      * performance and stability if not handled with care. */
 483     /* GPU flush. */
 484     struct r300_atom gpu_flush;
 485     /* Anti-aliasing (MSAA) state. */
 486     struct r300_atom aa_state;
 487     /* Framebuffer state. */
 488     struct r300_atom fb_state;
 489     /* HyperZ state (various SC/ZB bits). */
 490     struct r300_atom hyperz_state;
 491     /* ZTOP state. */
 492     struct r300_atom ztop_state;
 493     /* Depth, stencil, and alpha state. */
 494     struct r300_atom dsa_state;
 495     /* Blend state. */
 496     struct r300_atom blend_state;
 497     /* Blend color state. */
 498     struct r300_atom blend_color_state;
 499     /* Scissor state. */
 500     struct r300_atom scissor_state;
 501     /* Invariant state. This must be emitted to get the engine started. */
 502     struct r300_atom invariant_state;
 503     /* Viewport state. */
 504     struct r300_atom viewport_state;
 505     /* PVS flush. */
 506     struct r300_atom pvs_flush;
 507     /* VAP invariant state. */
 508     struct r300_atom vap_invariant_state;
 509     /* Vertex stream formatting state. */
 510     struct r300_atom vertex_stream_state;
 511     /* Vertex shader. */
 512     struct r300_atom vs_state;
 513     /* User clip planes. */
 514     struct r300_atom clip_state;
 515     /* RS block state + VAP (vertex shader) output mapping state. */
 516     struct r300_atom rs_block_state;
 517     /* Rasterizer state. */
 518     struct r300_atom rs_state;
 519     /* Framebuffer state (pipelined regs). */
 520     struct r300_atom fb_state_pipelined;
 521     /* Fragment shader. */
 522     struct r300_atom fs;
 523     /* Fragment shader RC_CONSTANT_STATE variables. */
 524     struct r300_atom fs_rc_constant_state;
 525     /* Fragment shader constant buffer. */
 526     struct r300_atom fs_constants;
 527     /* Vertex shader constant buffer. */
 528     struct r300_atom vs_constants;
 529     /* Texture cache invalidate. */
 530     struct r300_atom texture_cache_inval;
 531     /* Textures state. */
 532     struct r300_atom textures_state;
 533     /* HiZ clear */
 534     struct r300_atom hiz_clear;
 535     /* zmask clear */
 536     struct r300_atom zmask_clear;
 537     /* Occlusion query. */
 538     struct r300_atom query_start;
 539
 540     /* The pointers to the first and the last atom. */
 541     struct r300_atom *first_dirty, *last_dirty;
 542
 543     /* Vertex elements for Gallium. */
 544     struct r300_vertex_element_state *velems;
 545
 546     /* Vertex info for Draw. */
 547     struct vertex_info vertex_info;
 548
 549     struct pipe_stencil_ref stencil_ref;
 550     struct pipe_viewport_state viewport;
 551
 552     /* Stream locations for SWTCL. */
 553     int stream_loc_notcl[16];
 554
 555     /* Flag indicating whether or not the HW is dirty. */
 556     uint32_t dirty_hw;
 557     /* Whether polygon offset is enabled. */
 558     boolean polygon_offset_enabled;
 559     /* Z buffer bit depth. */
 560     uint32_t zbuffer_bpp;
 561     /* Whether rendering is conditional and should be skipped. */
 562     boolean skip_rendering;
 563     /* The flag above saved by blitter. */
 564     unsigned char blitter_saved_skip_rendering;
 565     /* Point sprites texcoord index,  1 bit per texcoord */
 566     int sprite_coord_enable;
 567     /* Whether two-sided color selection is enabled (AKA light_twoside). */
 568     boolean two_sided_color;
 569     /* Whether fast color clear is enabled. */
 570     boolean cbzb_clear;
 571     /* Whether fragment shader needs to be validated. */
 572     enum r300_fs_validity_status fs_status;
 573     /* Framebuffer multi-write. */
 574     boolean fb_multiwrite;
 575
 576     void *dsa_decompress_zmask;
 577
 578     struct pipe_index_buffer index_buffer;
 579     struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 580     unsigned nr_vertex_buffers;
 581     struct u_upload_mgr *uploader;
 582
 583     struct util_slab_mempool pool_transfers;
 584
 585     /* Stat counter. */
 586     uint64_t flush_counter;
 587
 588     /* const tracking for VS */
 589     int vs_const_base;
 590
 591     /* Vertex array state info */
 592     boolean vertex_arrays_dirty;
 593     boolean vertex_arrays_indexed;
 594     int vertex_arrays_offset;
 595     int vertex_arrays_instance_id;
 596     boolean instancing_enabled;
 597
 598     /* Hyper-Z stats. */
 599     boolean hyperz_enabled;     /* Whether it owns Hyper-Z access. */
 600     int64_t hyperz_time_of_last_flush; /* Time of the last flush with Z clear. */
 601     unsigned num_z_clears;      /* Since the last flush. */
 602
 603     /* ZMask state. */
 604     boolean zmask_in_use;       /* Whether ZMASK is enabled. */
 605     boolean zmask_decompress;   /* Whether ZMASK is being decompressed. */
 606     struct pipe_surface *locked_zbuffer; /* Unbound zbuffer which still has data in ZMASK. */
 607
 608     /* HiZ state. */
 609     boolean hiz_in_use;         /* Whether HIZ is enabled. */
 610     enum r300_hiz_func hiz_func; /* HiZ function. Can be either MIN or MAX. */
 611     uint32_t hiz_clear_value;   /* HiZ clear value. */
 612 };
 613
 614 #define foreach_atom(r300, atom) \
 615     for (atom = &r300->gpu_flush; atom != (&r300->query_start)+1; atom++)
 616
 617 #define foreach_dirty_atom(r300, atom) \
 618     for (atom = r300->first_dirty; atom != r300->last_dirty; atom++)
 619
 620 /* Convenience cast wrappers. */
 621 static INLINE struct r300_query* r300_query(struct pipe_query* q)
 622 {
 623     return (struct r300_query*)q;
 624 }
 625
 626 static INLINE struct r300_surface* r300_surface(struct pipe_surface* surf)
 627 {
 628     return (struct r300_surface*)surf;
 629 }
 630
 631 static INLINE struct r300_resource* r300_resource(struct pipe_resource* tex)
 632 {
 633     return (struct r300_resource*)tex;
 634 }
 635
 636 static INLINE struct r300_context* r300_context(struct pipe_context* context)
 637 {
 638     return (struct r300_context*)context;
 639 }
 640
 641 static INLINE struct r300_fragment_shader *r300_fs(struct r300_context *r300)
 642 {
 643     return (struct r300_fragment_shader*)r300->fs.state;
 644 }
 645
 646 static INLINE void r300_mark_atom_dirty(struct r300_context *r300,
 647                                         struct r300_atom *atom)
 648 {
 649     atom->dirty = TRUE;
 650
 651     if (!r300->first_dirty) {
 652         r300->first_dirty = atom;
 653         r300->last_dirty = atom+1;
 654     } else {
 655         if (atom < r300->first_dirty)
 656             r300->first_dirty = atom;
 657         else if (atom+1 > r300->last_dirty)
 658             r300->last_dirty = atom+1;
 659     }
 660 }
 661
 662 struct pipe_context* r300_create_context(struct pipe_screen* screen,
 663                                          void *priv);
 664
 665 /* Context initialization. */
 666 struct draw_stage* r300_draw_stage(struct r300_context* r300);
 667 void r300_init_blit_functions(struct r300_context *r300);
 668 void r300_init_flush_functions(struct r300_context* r300);
 669 void r300_init_query_functions(struct r300_context* r300);
 670 void r300_init_render_functions(struct r300_context *r300);
 671 void r300_init_state_functions(struct r300_context* r300);
 672 void r300_init_resource_functions(struct r300_context* r300);
 673
 674 /* r300_blit.c */
 675 void r300_decompress_zmask(struct r300_context *r300);
 676 void r300_decompress_zmask_locked_unsafe(struct r300_context *r300);
 677 void r300_decompress_zmask_locked(struct r300_context *r300);
 678 bool r300_is_blit_supported(enum pipe_format format);
 679
 680 /* r300_flush.c */
 681 void r300_flush(struct pipe_context *pipe,
 682                 unsigned flags,
 683                 struct pipe_fence_handle **fence);
 684
 685 /* r300_hyperz.c */
 686 void r300_update_hyperz_state(struct r300_context* r300);
 687
 688 /* r300_query.c */
 689 void r300_resume_query(struct r300_context *r300,
 690                        struct r300_query *query);
 691 void r300_stop_query(struct r300_context *r300);
 692
 693 /* r300_render_translate.c */
 694 void r300_translate_index_buffer(struct r300_context *r300,
 695                                  struct pipe_resource **index_buffer,
 696                                  unsigned *index_size, unsigned index_offset,
 697                                  unsigned *start, unsigned count);
 698
 699 /* r300_render_stencilref.c */
 700 void r300_plug_in_stencil_ref_fallback(struct r300_context *r300);
 701
 702 /* r300_render.c */
 703 void r300_draw_flush_vbuf(struct r300_context *r300);
 704 void r500_emit_index_bias(struct r300_context *r300, int index_bias);
 705 void r300_blitter_draw_rectangle(struct blitter_context *blitter,
 706                                  unsigned x1, unsigned y1,
 707                                  unsigned x2, unsigned y2,
 708                                  float depth,
 709                                  enum blitter_attrib_type type,
 710                                  const union pipe_color_union *attrib);
 711
 712 /* r300_state.c */
 713 enum r300_fb_state_change {
 714     R300_CHANGED_FB_STATE = 0,
 715     R300_CHANGED_HYPERZ_FLAG,
 716     R300_CHANGED_MULTIWRITE
 717 };
 718
 719 void r300_mark_fb_state_dirty(struct r300_context *r300,
 720                               enum r300_fb_state_change change);
 721 void r300_mark_fs_code_dirty(struct r300_context *r300);
 722
 723 struct pipe_sampler_view *
 724 r300_create_sampler_view_custom(struct pipe_context *pipe,
 725                          struct pipe_resource *texture,
 726                          const struct pipe_sampler_view *templ,
 727                          unsigned width0_override,
 728                          unsigned height0_override);
 729
 730 /* r300_state_derived.c */
 731 void r300_update_derived_state(struct r300_context* r300);
 732
 733 /* r300_debug.c */
 734 void r500_dump_rs_block(struct r300_rs_block *rs);
 735
 736
 737 static INLINE boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags)
 738 {
 739     return SCREEN_DBG_ON(ctx->screen, flags);
 740 }
 741
 742 static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags,
 743                        const char * fmt, ...)
 744 {
 745     if (CTX_DBG_ON(ctx, flags)) {
 746         va_list va;
 747         va_start(va, fmt);
 748         vfprintf(stderr, fmt, va);
 749         va_end(va);
 750     }
 751 }
 752
 753 #define DBG_ON  CTX_DBG_ON
 754 #define DBG     CTX_DBG
 755
 756 #endif /* R300_CONTEXT_H */