src/gallium/drivers/r300/r300_cs.h

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #ifndef R300_CS_H
  24 #define R300_CS_H
  25
  26 #include "util/u_math.h"
  27
  28 #include "r300_reg.h"
  29 #include "r300_winsys.h"
  30
  31 /* Yes, I know macros are ugly. However, they are much prettier than the code
  32  * that they neatly hide away, and don't have the cost of function setup,so
  33  * we're going to use them. */
  34
  35 #define MAX_CS_SIZE 64 * 1024 / 4
  36
  37 #define VERY_VERBOSE_CS 0
  38 #define VERY_VERBOSE_REGISTERS 0
  39
  40 /* XXX stolen from radeon_drm.h */
  41 #define RADEON_GEM_DOMAIN_CPU  0x1
  42 #define RADEON_GEM_DOMAIN_GTT  0x2
  43 #define RADEON_GEM_DOMAIN_VRAM 0x4
  44
  45 /* XXX stolen from radeon_reg.h */
  46 #define RADEON_CP_PACKET0 0x0
  47
  48 #define CP_PACKET0(register, count) \
  49     (RADEON_CP_PACKET0 | ((count) << 16) | ((register) >> 2))
  50
  51 #define CS_LOCALS(context) \
  52     struct r300_context* const cs_context_copy = (context); \
  53     struct r300_winsys* cs_winsys = cs_context_copy->winsys; \
  54     int cs_count = 0;
  55
  56 #define CHECK_CS(size) \
  57     cs_winsys->check_cs(cs_winsys, (size))
  58
  59 #define BEGIN_CS(size) do { \
  60     CHECK_CS(size); \
  61     if (VERY_VERBOSE_CS) { \
  62         DBG(cs_context_copy, DBG_CS, "r300: BEGIN_CS, count %d, in %s (%s:%d)\n", \
  63                 size, __FUNCTION__, __FILE__, __LINE__); \
  64     } \
  65     cs_winsys->begin_cs(cs_winsys, (size), \
  66             __FILE__, __FUNCTION__, __LINE__); \
  67     cs_count = size; \
  68 } while (0)
  69
  70 #define OUT_CS(value) do { \
  71     cs_winsys->write_cs_dword(cs_winsys, (value)); \
  72     cs_count--; \
  73 } while (0)
  74
  75 #define OUT_CS_32F(value) do { \
  76     cs_winsys->write_cs_dword(cs_winsys, fui(value)); \
  77     cs_count--; \
  78 } while (0)
  79
  80 #define OUT_CS_REG(register, value) do { \
  81     if (VERY_VERBOSE_REGISTERS) \
  82         DBG(cs_context_copy, DBG_CS, "r300: writing 0x%08X to register 0x%04X\n", \
  83             value, register); \
  84     assert(register); \
  85     OUT_CS(CP_PACKET0(register, 0)); \
  86     OUT_CS(value); \
  87 } while (0)
  88
  89 /* Note: This expects count to be the number of registers,
  90  * not the actual packet0 count! */
  91 #define OUT_CS_REG_SEQ(register, count) do { \
  92     if (VERY_VERBOSE_REGISTERS) \
  93         DBG(cs_context_copy, DBG_CS, "r300: writing register sequence of %d to 0x%04X\n", \
  94             count, register); \
  95     assert(register); \
  96     OUT_CS(CP_PACKET0(register, ((count) - 1))); \
  97 } while (0)
  98
  99 #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \
 100     DBG(cs_context_copy, DBG_CS, "r300: writing relocation for buffer %p, offset %d, " \
 101             "domains (%d, %d, %d)\n", \
 102         bo, offset, rd, wd, flags); \
 103     assert(bo); \
 104     OUT_CS(offset); \
 105     cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \
 106     cs_count -= 2; \
 107 } while (0)
 108
 109 #define END_CS do { \
 110     if (VERY_VERBOSE_CS) { \
 111         DBG(cs_context_copy, DBG_CS, "r300: END_CS in %s (%s:%d)\n", __FUNCTION__, \
 112                 __FILE__, __LINE__); \
 113     } \
 114     if (cs_count != 0) \
 115         debug_printf("r300: Warning: cs_count off by %d\n", cs_count); \
 116     cs_winsys->end_cs(cs_winsys, __FILE__, __FUNCTION__, __LINE__); \
 117 } while (0)
 118
 119 #define FLUSH_CS do { \
 120     if (VERY_VERBOSE_CS) { \
 121         DBG(cs_context_copy, DBG_CS, "r300: FLUSH_CS in %s (%s:%d)\n\n", __FUNCTION__, \
 122                 __FILE__, __LINE__); \
 123     } \
 124     cs_winsys->flush_cs(cs_winsys); \
 125 } while (0)
 126
 127 #define RADEON_ONE_REG_WR        (1 << 15)
 128
 129 #define OUT_CS_ONE_REG(register, count) do { \
 130     if (VERY_VERBOSE_REGISTERS) \
 131         DBG(cs_context_copy, DBG_CS, "r300: writing data sequence of %d to 0x%04X\n", \
 132             count, register); \
 133     assert(register); \
 134     OUT_CS(CP_PACKET0(register, ((count) - 1)) | RADEON_ONE_REG_WR); \
 135 } while (0)
 136
 137 #define CP_PACKET3(op, count) \
 138     (RADEON_CP_PACKET3 | (op) | ((count) << 16))
 139
 140 #define OUT_CS_PKT3(op, count) do { \
 141     OUT_CS(CP_PACKET3(op, count)); \
 142 } while (0)
 143
 144 #define OUT_CS_INDEX_RELOC(bo, offset, count, rd, wd, flags) do { \
 145     DBG(cs_context_copy, DBG_CS, "r300: writing relocation for index buffer %p," \
 146             "offset %d\n", bo, offset); \
 147     assert(bo); \
 148     OUT_CS(offset); \
 149     OUT_CS(count); \
 150     cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \
 151     cs_count -= 2; \
 152 } while (0)
 153
 154 #endif /* R300_CS_H */