src/gallium/drivers/r300/r300_debug.c

   1 /*
   2  * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "r300_debug.h"
  24
  25 void r3xx_dump_fs(struct r3xx_fragment_shader* fs)
  26 {
  27     int i;
  28
  29     for (i = 0; i < fs->alu_instruction_count; i++) {
  30     }
  31 }
  32
  33 void r5xx_fs_dump(struct r5xx_fragment_shader* fs)
  34 {
  35     int i;
  36     uint32_t inst;
  37
  38     for (i = 0; i < fs->instruction_count; i++) {
  39         inst = fs->instructions[i].inst0;
  40         debug_printf("%d:  0: CMN_INST   0x%08x:", i, inst);
  41         switch (inst & 0x3) {
  42             case R500_INST_TYPE_ALU:
  43                 debug_printf("ALU ");
  44                 break;
  45             case R500_INST_TYPE_OUT:
  46                 debug_printf("OUT ");
  47                 break;
  48             case R500_INST_TYPE_FC:
  49                 debug_printf("FC  ");
  50                 break;
  51             case R500_INST_TYPE_TEX:
  52                 debug_printf("TEX ");
  53                 break;
  54         }
  55         debug_printf("%s %s %s %s ",
  56                 inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
  57                 inst & R500_INST_LAST ? "LAST" : "",
  58                 inst & R500_INST_NOP ? "NOP" : "",
  59                 inst & R500_INST_ALU_WAIT ? "ALU_WAIT" : "");
  60         debug_printf("wmask: %s omask: %s\n",
  61                 r5xx_fs_mask[(inst >> 11) & 0xf],
  62                 r5xx_fs_mask[(inst >> 15) & 0xf]);
  63         switch (inst & 0x3) {
  64             case R500_INST_TYPE_ALU:
  65             case R500_INST_TYPE_OUT:
  66                 inst = fs->instructions[i].inst1;
  67                 debug_printf("    1: RGB_ADDR   0x%08x:", inst);
  68                 debug_printf("Addr0: %d%c, Addr1: %d%c, "
  69                         "Addr2: %d%c, srcp:%d\n",
  70                         inst & 0xff, (inst & (1 << 8)) ? 'c' : 't',
  71                         (inst >> 10) & 0xff, (inst & (1 << 18)) ? 'c' : 't',
  72                         (inst >> 20) & 0xff, (inst & (1 << 28)) ? 'c' : 't',
  73                         (inst >> 30));
  74
  75                 inst = fs->instructions[i].inst2;
  76                 debug_printf("    2: ALPHA_ADDR 0x%08x:", inst);
  77                 debug_printf("Addr0: %d%c, Addr1: %d%c, "
  78                         "Addr2: %d%c, srcp:%d\n",
  79                         inst & 0xff, (inst & (1 << 8)) ? 'c' : 't',
  80                         (inst >> 10) & 0xff, (inst & (1 << 18)) ? 'c' : 't',
  81                         (inst >> 20) & 0xff, (inst & (1 << 28)) ? 'c' : 't',
  82                         (inst >> 30));
  83
  84                 inst = fs->instructions[i].inst3;
  85                 debug_printf("    3: RGB_INST   0x%08x:", inst);
  86                 debug_printf("rgb_A_src:%d %s/%s/%s %d "
  87                         "rgb_B_src:%d %s/%s/%s %d\n",
  88                         inst & 0x3, r5xx_fs_swiz[(inst >> 2) & 0x7],
  89                         r5xx_fs_swiz[(inst >> 5) & 0x7],
  90                         r5xx_fs_swiz[(inst >> 8) & 0x7],
  91                         (inst >> 11) & 0x3, (inst >> 13) & 0x3,
  92                         r5xx_fs_swiz[(inst >> 15) & 0x7],
  93                         r5xx_fs_swiz[(inst >> 18) & 0x7],
  94                         r5xx_fs_swiz[(inst >> 21) & 0x7],
  95                         (inst >> 24) & 0x3);
  96
  97                 inst = fs->instructions[i].inst4;
  98                 debug_printf("    4: ALPHA_INST 0x%08x:", inst);
  99                 debug_printf("%s dest:%d%s alp_A_src:%d %s %d "
 100                         "alp_B_src:%d %s %d w:%d\n",
 101                         r5xx_fs_op_alpha[inst & 0xf], (inst >> 4) & 0x7f,
 102                         inst & (1<<11) ? "(rel)":"", (inst >> 12) & 0x3,
 103                         r5xx_fs_swiz[(inst >> 14) & 0x7], (inst >> 17) & 0x3,
 104                         (inst >> 19) & 0x3, r5xx_fs_swiz[(inst >> 21) & 0x7],
 105                         (inst >> 24) & 0x3, (inst >> 31) & 0x1);
 106
 107                 inst = fs->instructions[i].inst5;
 108                 debug_printf("    5: RGBA_INST  0x%08x:", inst);
 109                 debug_printf("%s dest:%d%s rgb_C_src:%d %s/%s/%s %d "
 110                         "alp_C_src:%d %s %d\n",
 111                         r5xx_fs_op_rgb[inst & 0xf], (inst >> 4) & 0x7f,
 112                         inst & (1 << 11) ? "(rel)":"", (inst >> 12) & 0x3,
 113                         r5xx_fs_swiz[(inst >> 14) & 0x7],
 114                         r5xx_fs_swiz[(inst >> 17) & 0x7],
 115                         r5xx_fs_swiz[(inst >> 20) & 0x7],
 116                         (inst >> 23) & 0x3, (inst >> 25) & 0x3,
 117                         r5xx_fs_swiz[(inst >> 27) & 0x7], (inst >> 30) & 0x3);
 118                 break;
 119             case R500_INST_TYPE_FC:
 120                 /* XXX don't even bother yet */
 121                 break;
 122             case R500_INST_TYPE_TEX:
 123                 inst = fs->instructions[i].inst1;
 124                 debug_printf("    1: TEX_INST   0x%08x: id: %d "
 125                         "op:%s, %s, %s %s\n",
 126                         inst, (inst >> 16) & 0xf,
 127                         r5xx_fs_tex[(inst >> 22) & 0x7],
 128                         (inst & (1 << 25)) ? "ACQ" : "",
 129                         (inst & (1 << 26)) ? "IGNUNC" : "",
 130                         (inst & (1 << 27)) ? "UNSCALED" : "SCALED");
 131
 132                 inst = fs->instructions[i].inst2;
 133                 debug_printf("    2: TEX_ADDR   0x%08x: "
 134                         "src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n",
 135                         inst, inst & 0x7f, inst & (1 << 7) ? "(rel)" : "",
 136                         r5xx_fs_swiz[(inst >> 8) & 0x3],
 137                         r5xx_fs_swiz[(inst >> 10) & 0x3],
 138                         r5xx_fs_swiz[(inst >> 12) & 0x3],
 139                         r5xx_fs_swiz[(inst >> 14) & 0x3],
 140                         (inst >> 16) & 0x7f, inst & (1 << 23) ? "(rel)" : "",
 141                         r5xx_fs_swiz[(inst >> 24) & 0x3],
 142                         r5xx_fs_swiz[(inst >> 26) & 0x3],
 143                         r5xx_fs_swiz[(inst >> 28) & 0x3],
 144                         r5xx_fs_swiz[(inst >> 30) & 0x3]);
 145
 146                 inst = fs->instructions[i].inst3;
 147                 debug_printf("    3: TEX_DXDY   0x%08x\n", inst);
 148                 break;
 149         }
 150     }
 151 }
 152
 153 static void r300_vs_op_dump(uint32_t op)
 154 {
 155     debug_printf(" dst: %d%s op: ",
 156             (op >> 13) & 0x7f, r300_vs_dst_debug[(op >> 8) & 0x7]);
 157     if (op & 0x80) {
 158         if (op & 0x1) {
 159             debug_printf("PVS_MACRO_OP_2CLK_M2X_ADD\n");
 160         } else {
 161             debug_printf("   PVS_MACRO_OP_2CLK_MADD\n");
 162         }
 163     } else if (op & 0x40) {
 164         debug_printf("%s\n", r300_vs_me_ops[op & 0x1f]);
 165     } else {
 166         debug_printf("%s\n", r300_vs_ve_ops[op & 0x1f]);
 167     }
 168 }
 169
 170 void r300_vs_src_dump(uint32_t src)
 171 {
 172     debug_printf(" reg: %d%s swiz: %s%s/%s%s/%s%s/%s%s\n",
 173             (src >> 5) & 0x7f, r300_vs_src_debug[src & 0x3],
 174             src & (1 << 25) ? "-" : " ",
 175             r300_vs_swiz_debug[(src >> 13) & 0x7],
 176             src & (1 << 26) ? "-" : " ",
 177             r300_vs_swiz_debug[(src >> 16) & 0x7],
 178             src & (1 << 27) ? "-" : " ",
 179             r300_vs_swiz_debug[(src >> 19) & 0x7],
 180             src & (1 << 28) ? "-" : " ",
 181             r300_vs_swiz_debug[(src >> 22) & 0x7]);
 182 }
 183
 184 void r300_vs_dump(struct r300_vertex_shader* vs)
 185 {
 186     int i;
 187
 188     for (i = 0; i < vs->instruction_count; i++) {
 189         debug_printf("%d: op: 0x%08x", i, vs->instructions[i].inst0);
 190         r300_vs_op_dump(vs->instructions[i].inst0);
 191         debug_printf(" src0: 0x%08x", vs->instructions[i].inst1);
 192         r300_vs_src_dump(vs->instructions[i].inst1);
 193         debug_printf(" src1: 0x%08x", vs->instructions[i].inst2);
 194         r300_vs_src_dump(vs->instructions[i].inst2);
 195         debug_printf(" src2: 0x%08x", vs->instructions[i].inst3);
 196         r300_vs_src_dump(vs->instructions[i].inst3);
 197     }
 198 }