4ffd92c9dc3cb14c9f8ea84106ee7ed4ad2f7e6e
[mesa.git] / src / gallium / drivers / r300 / r300_emit.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_emit: Functions for emitting state. */
24
25 #include "r300_emit.h"
26
27 void r300_emit_blend_state(struct r300_context* r300,
28 struct r300_blend_state* blend)
29 {
30 CS_LOCALS(r300);
31 BEGIN_CS(7);
32 OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2);
33 OUT_CS(blend->blend_control);
34 OUT_CS(blend->alpha_blend_control);
35 OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop);
36 OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither);
37 END_CS;
38 }
39
40 void r300_emit_blend_color_state(struct r300_context* r300,
41 struct r300_blend_color_state* bc)
42 {
43 struct r300_screen* r300screen = r300_screen(r300->context.screen);
44 CS_LOCALS(r300);
45
46 if (r300screen->caps->is_r500) {
47 BEGIN_CS(3);
48 OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
49 OUT_CS(bc->blend_color_red_alpha);
50 OUT_CS(bc->blend_color_green_blue);
51 END_CS;
52 } else {
53 BEGIN_CS(2);
54 OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color);
55 END_CS;
56 }
57 }
58
59 void r300_emit_dsa_state(struct r300_context* r300,
60 struct r300_dsa_state* dsa)
61 {
62 struct r300_screen* r300screen = r300_screen(r300->context.screen);
63 CS_LOCALS(r300);
64
65 BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8);
66 OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
67 /* XXX figure out the r300 counterpart for this */
68 if (r300screen->caps->is_r500) {
69 /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */
70 }
71 OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
72 OUT_CS(dsa->z_buffer_control);
73 OUT_CS(dsa->z_stencil_control);
74 OUT_CS(dsa->stencil_ref_mask);
75 OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top);
76 if (r300screen->caps->is_r500) {
77 /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */
78 }
79 END_CS;
80 }
81
82 void r300_emit_fragment_shader(struct r300_context* r300,
83 struct r300_fragment_shader* fs)
84 {
85 CS_LOCALS(r300);
86 int i;
87
88 BEGIN_CS(22);
89
90 OUT_CS_REG(R300_US_CONFIG, MAX2(fs->indirections - 1, 0));
91 OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size);
92 /* XXX figure out exactly how big the sizes are on this reg */
93 OUT_CS_REG(R300_US_CODE_OFFSET, 0x0);
94 /* XXX figure these ones out a bit better kthnx */
95 OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0);
96 OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
97 OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
98 OUT_CS_REG(R300_US_CODE_ADDR_3, R300_RGBA_OUT);
99
100 for (i = 0; i < fs->alu_instruction_count; i++) {
101 OUT_CS_REG(R300_US_ALU_RGB_INST_0 + (4 * i),
102 fs->instructions[i].alu_rgb_inst);
103 OUT_CS_REG(R300_US_ALU_RGB_ADDR_0 + (4 * i),
104 fs->instructions[i].alu_rgb_addr);
105 OUT_CS_REG(R300_US_ALU_ALPHA_INST_0 + (4 * i),
106 fs->instructions[i].alu_alpha_inst);
107 OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0 + (4 * i),
108 fs->instructions[i].alu_alpha_addr);
109 }
110
111 END_CS;
112 }
113
114 void r500_emit_fragment_shader(struct r300_context* r300,
115 struct r500_fragment_shader* fs)
116 {
117 CS_LOCALS(r300);
118 int i;
119
120 BEGIN_CS(9 + (fs->instruction_count * 6));
121 OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
122 OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size);
123 OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
124 R500_US_CODE_END_ADDR(fs->instruction_count));
125
126 OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
127 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA,
128 fs->instruction_count * 6);
129 for (i = 0; i < fs->instruction_count; i++) {
130 OUT_CS(fs->instructions[i].inst0);
131 OUT_CS(fs->instructions[i].inst1);
132 OUT_CS(fs->instructions[i].inst2);
133 OUT_CS(fs->instructions[i].inst3);
134 OUT_CS(fs->instructions[i].inst4);
135 OUT_CS(fs->instructions[i].inst5);
136 }
137 END_CS;
138 }
139
140 /* Translate pipe_format into US_OUT_FMT. Note that formats are stored from
141 * C3 to C0. */
142 uint32_t translate_out_fmt(enum pipe_format format)
143 {
144 switch (format) {
145 case PIPE_FORMAT_A8R8G8B8_UNORM:
146 return R300_US_OUT_FMT_C4_8 |
147 R300_C0_SEL_B | R300_C1_SEL_G |
148 R300_C2_SEL_R | R300_C3_SEL_A;
149 default:
150 return R300_US_OUT_FMT_UNUSED;
151 }
152 return 0;
153 }
154
155 /* XXX add pitch, stride, clean up */
156 void r300_emit_fb_state(struct r300_context* r300,
157 struct pipe_framebuffer_state* fb)
158 {
159 CS_LOCALS(r300);
160 struct r300_texture* tex;
161 int i;
162
163 BEGIN_CS((6 * fb->nr_cbufs) + (fb->zsbuf ? 6 : 0) + 4);
164 for (i = 0; i < fb->nr_cbufs; i++) {
165 tex = (struct r300_texture*)fb->cbufs[i]->texture;
166 OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
167 OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
168
169 OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i),
170 translate_out_fmt(fb->cbufs[i]->format));
171 }
172
173 if (fb->zsbuf) {
174 tex = (struct r300_texture*)fb->zsbuf->texture;
175 OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
176 OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
177 if (fb->zsbuf->format == PIPE_FORMAT_Z24S8_UNORM) {
178 OUT_CS_REG(R300_ZB_FORMAT,
179 R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL);
180 } else {
181 OUT_CS_REG(R300_ZB_FORMAT, 0x0);
182 }
183 }
184
185 OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
186 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
187 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
188 OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
189 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
190 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
191 END_CS;
192 }
193
194 void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs)
195 {
196 CS_LOCALS(r300);
197
198 BEGIN_CS(20);
199 OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
200 OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
201 OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
202 OUT_CS(rs->point_minmax);
203 OUT_CS(rs->line_control);
204 OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6);
205 OUT_CS(rs->depth_scale_front);
206 OUT_CS(rs->depth_offset_front);
207 OUT_CS(rs->depth_scale_back);
208 OUT_CS(rs->depth_offset_back);
209 OUT_CS(rs->polygon_offset_enable);
210 OUT_CS(rs->cull_mode);
211 OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
212 OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
213 OUT_CS_REG(R300_GA_COLOR_CONTROL, rs->color_control);
214 END_CS;
215 }
216
217 void r300_emit_rs_block_state(struct r300_context* r300,
218 struct r300_rs_block* rs)
219 {
220 struct r300_screen* r300screen = r300_screen(r300->context.screen);
221 CS_LOCALS(r300);
222 int i;
223
224 BEGIN_CS(21);
225 if (r300screen->caps->is_r500) {
226 OUT_CS_REG_SEQ(R500_RS_IP_0, 8);
227 } else {
228 OUT_CS_REG_SEQ(R300_RS_IP_0, 8);
229 }
230 for (i = 0; i < 8; i++) {
231 OUT_CS(rs->ip[i]);
232 }
233
234 OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
235 OUT_CS(rs->count);
236 OUT_CS(rs->inst_count);
237
238 if (r300screen->caps->is_r500) {
239 OUT_CS_REG_SEQ(R500_RS_INST_0, 8);
240 } else {
241 OUT_CS_REG_SEQ(R300_RS_INST_0, 8);
242 }
243 for (i = 0; i < 8; i++) {
244 OUT_CS(rs->inst[i]);
245 }
246
247 END_CS;
248 }
249
250 void r300_emit_sampler(struct r300_context* r300,
251 struct r300_sampler_state* sampler, unsigned offset)
252 {
253 CS_LOCALS(r300);
254
255 BEGIN_CS(6);
256 OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), sampler->filter0);
257 OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1);
258 OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color);
259 END_CS;
260 }
261
262 void r300_emit_scissor_state(struct r300_context* r300,
263 struct r300_scissor_state* scissor)
264 {
265 CS_LOCALS(r300);
266
267 BEGIN_CS(3);
268 OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
269 OUT_CS(scissor->scissor_top_left);
270 OUT_CS(scissor->scissor_bottom_right);
271 END_CS;
272 }
273
274 void r300_emit_texture(struct r300_context* r300,
275 struct r300_texture* tex, unsigned offset)
276 {
277 CS_LOCALS(r300);
278
279 BEGIN_CS(8);
280 OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0);
281 OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1);
282 OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2);
283 OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (offset * 4), 1);
284 OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_GTT |
285 RADEON_GEM_DOMAIN_VRAM, 0);
286 END_CS;
287 }
288
289 void r300_emit_vertex_format_state(struct r300_context* r300)
290 {
291 CS_LOCALS(r300);
292 int i;
293
294 BEGIN_CS(26);
295 OUT_CS_REG(R300_VAP_VTX_SIZE, r300->vertex_info.vinfo.size);
296
297 OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
298 OUT_CS(r300->vertex_info.vinfo.hwfmt[0]);
299 OUT_CS(r300->vertex_info.vinfo.hwfmt[1]);
300 OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
301 OUT_CS(r300->vertex_info.vinfo.hwfmt[2]);
302 OUT_CS(r300->vertex_info.vinfo.hwfmt[3]);
303
304 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8);
305 for (i = 0; i < 8; i++) {
306 OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]);
307 }
308 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8);
309 for (i = 0; i < 8; i++) {
310 OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]);
311 }
312 END_CS;
313 }
314
315 static void r300_flush_textures(struct r300_context* r300)
316 {
317 CS_LOCALS(r300);
318
319 BEGIN_CS(4);
320 OUT_CS_REG(R300_TX_INVALTAGS, 0);
321 OUT_CS_REG(R300_TX_ENABLE, (1 << r300->texture_count) - 1);
322 END_CS;
323 }
324
325 /* Emit all dirty state. */
326 void r300_emit_dirty_state(struct r300_context* r300)
327 {
328 struct r300_screen* r300screen = r300_screen(r300->context.screen);
329 int i;
330
331 if (!(r300->dirty_state) && !(r300->dirty_hw)) {
332 return;
333 }
334
335 r300_update_derived_state(r300);
336
337 /* XXX check size */
338
339 if (r300->dirty_state & R300_NEW_BLEND) {
340 r300_emit_blend_state(r300, r300->blend_state);
341 r300->dirty_state &= ~R300_NEW_BLEND;
342 }
343
344 if (r300->dirty_state & R300_NEW_BLEND_COLOR) {
345 r300_emit_blend_color_state(r300, r300->blend_color_state);
346 r300->dirty_state &= ~R300_NEW_BLEND_COLOR;
347 }
348
349 if (r300->dirty_state & R300_NEW_DSA) {
350 r300_emit_dsa_state(r300, r300->dsa_state);
351 r300->dirty_state &= ~R300_NEW_DSA;
352 }
353
354 if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) {
355 if (r300screen->caps->is_r500) {
356 r500_emit_fragment_shader(r300,
357 (struct r500_fragment_shader*)r300->fs);
358 } else {
359 r300_emit_fragment_shader(r300,
360 (struct r300_fragment_shader*)r300->fs);
361 }
362 r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER;
363 }
364
365 if (r300->dirty_state & R300_NEW_FRAMEBUFFERS) {
366 r300_emit_fb_state(r300, &r300->framebuffer_state);
367 r300->dirty_state &= ~R300_NEW_FRAMEBUFFERS;
368 }
369
370 if (r300->dirty_state & R300_NEW_RASTERIZER) {
371 r300_emit_rs_state(r300, r300->rs_state);
372 r300->dirty_state &= ~R300_NEW_RASTERIZER;
373 }
374
375 if (r300->dirty_state & R300_NEW_RS_BLOCK) {
376 r300_emit_rs_block_state(r300, r300->rs_block);
377 r300->dirty_state &= ~R300_NEW_RS_BLOCK;
378 }
379
380 if (r300->dirty_state & R300_ANY_NEW_SAMPLERS) {
381 for (i = 0; i < r300->sampler_count; i++) {
382 if (r300->dirty_state & (R300_NEW_SAMPLER << i)) {
383 r300_emit_sampler(r300, r300->sampler_states[i], i);
384 r300->dirty_state &= ~(R300_NEW_SAMPLER << i);
385 }
386 r300_flush_textures(r300);
387 }
388 }
389
390 if (r300->dirty_state & R300_NEW_SCISSOR) {
391 r300_emit_scissor_state(r300, r300->scissor_state);
392 r300->dirty_state &= ~R300_NEW_SCISSOR;
393 }
394
395 if (r300->dirty_state & R300_ANY_NEW_TEXTURES) {
396 for (i = 0; i < r300->texture_count; i++) {
397 if (r300->dirty_state & (R300_NEW_TEXTURE << i)) {
398 r300_emit_texture(r300, r300->textures[i], i);
399 r300->dirty_state &= ~(R300_NEW_TEXTURE << i);
400 }
401 r300_flush_textures(r300);
402 }
403 }
404
405 if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) {
406 r300_emit_vertex_format_state(r300);
407 r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT;
408 }
409 }