src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 /* r300_emit: Functions for emitting state. */
  24
  25 #include "r300_emit.h"
  26
  27 void r300_emit_blend_state(struct r300_context* r300,
  28                            struct r300_blend_state* blend)
  29 {
  30     CS_LOCALS(r300);
  31     BEGIN_CS(7);
  32     OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2);
  33     OUT_CS(blend->blend_control);
  34     OUT_CS(blend->alpha_blend_control);
  35     OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop);
  36     OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither);
  37     END_CS;
  38 }
  39
  40 void r300_emit_blend_color_state(struct r300_context* r300,
  41                                  struct r300_blend_color_state* bc)
  42 {
  43     struct r300_screen* r300screen =
  44         (struct r300_screen*)r300->context.screen;
  45     CS_LOCALS(r300);
  46     if (r300screen->caps->is_r500) {
  47         BEGIN_CS(3);
  48         OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
  49         OUT_CS(bc->blend_color_red_alpha);
  50         OUT_CS(bc->blend_color_green_blue);
  51         END_CS;
  52     } else {
  53         BEGIN_CS(2);
  54         OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color);
  55         END_CS;
  56     }
  57 }
  58
  59 void r300_emit_dsa_state(struct r300_context* r300,
  60                            struct r300_dsa_state* dsa)
  61 {
  62     struct r300_screen* r300screen =
  63         (struct r300_screen*)r300->context.screen;
  64     CS_LOCALS(r300);
  65     BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8);
  66     OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
  67     /* XXX figure out the r300 counterpart for this */
  68     if (r300screen->caps->is_r500) {
  69         /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */
  70     }
  71     OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
  72     OUT_CS(dsa->z_buffer_control);
  73     OUT_CS(dsa->z_stencil_control);
  74     OUT_CS(dsa->stencil_ref_mask);
  75     OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top);
  76     if (r300screen->caps->is_r500) {
  77         /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */
  78     }
  79     END_CS;
  80 }
  81
  82 void r300_emit_fragment_shader(struct r300_context* r300,
  83                                struct r300_fragment_shader* fs)
  84 {
  85     CS_LOCALS(r300);
  86     int i;
  87     BEGIN_CS(0);
  88
  89     OUT_CS_REG(R300_US_CONFIG, MAX2(fs->indirections - 1, 0));
  90     OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size);
  91     /* XXX figure out exactly how big the sizes are on this reg */
  92     OUT_CS_REG(R300_US_CODE_OFFSET, 0x0);
  93     /* XXX figure these ones out a bit better kthnx */
  94     OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0);
  95     OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
  96     OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
  97     OUT_CS_REG(R300_US_CODE_ADDR_3, R300_RGBA_OUT);
  98
  99     for (i = 0; i < fs->alu_instruction_count; i++) {
 100         OUT_CS_REG(R300_US_ALU_RGB_INST_0 + (4 * i),
 101             fs->instructions[i].alu_rgb_inst);
 102         OUT_CS_REG(R300_US_ALU_RGB_ADDR_0 + (4 * i),
 103             fs->instructions[i].alu_rgb_addr);
 104         OUT_CS_REG(R300_US_ALU_ALPHA_INST_0 + (4 * i),
 105             fs->instructions[i].alu_alpha_inst);
 106         OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0 + (4 * i),
 107             fs->instructions[i].alu_alpha_addr);
 108     }
 109
 110     END_CS;
 111 }
 112
 113 void r500_emit_fragment_shader(struct r300_context* r300,
 114                                struct r500_fragment_shader* fs)
 115 {
 116     CS_LOCALS(r300);
 117     int i = 0;
 118     BEGIN_CS(9 + (fs->instruction_count * 6));
 119     OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
 120     OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size);
 121     OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
 122         R500_US_CODE_END_ADDR(fs->instruction_count));
 123
 124     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
 125     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA,
 126         fs->instruction_count * 6);
 127     for (i = 0; i < fs->instruction_count; i++) {
 128         OUT_CS(fs->instructions[i].inst0);
 129         OUT_CS(fs->instructions[i].inst1);
 130         OUT_CS(fs->instructions[i].inst2);
 131         OUT_CS(fs->instructions[i].inst3);
 132         OUT_CS(fs->instructions[i].inst4);
 133         OUT_CS(fs->instructions[i].inst5);
 134     }
 135     END_CS;
 136 }
 137
 138 /* Translate pipe_format into US_OUT_FMT. Note that formats are stored from
 139  * C3 to C0. */
 140 uint32_t translate_out_fmt(enum pipe_format format)
 141 {
 142     switch (format) {
 143         case PIPE_FORMAT_A8R8G8B8_UNORM:
 144             return R300_US_OUT_FMT_C4_8 |
 145                 R300_C0_SEL_B | R300_C1_SEL_G |
 146                 R300_C2_SEL_R | R300_C3_SEL_A;
 147         default:
 148             return R300_US_OUT_FMT_UNUSED;
 149     }
 150     return 0;
 151 }
 152
 153 /* XXX add pitch, stride */
 154 void r300_emit_fb_state(struct r300_context* r300,
 155                         struct pipe_framebuffer_state* fb)
 156 {
 157     CS_LOCALS(r300);
 158     struct r300_texture* tex;
 159     int i;
 160
 161     BEGIN_CS((5 * fb->nr_cbufs) + (fb->zsbuf ? 5 : 0) + 4);
 162     for (i = 0; i < fb->nr_cbufs; i++) {
 163         tex = (struct r300_texture*)fb->cbufs[i]->texture;
 164         OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
 165         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 166
 167         OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i),
 168             translate_out_fmt(fb->cbufs[i]->format));
 169     }
 170
 171     if (fb->zsbuf) {
 172         tex = (struct r300_texture*)fb->zsbuf->texture;
 173         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 174         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 175         if (fb->zsbuf->format == PIPE_FORMAT_Z24S8_UNORM) {
 176             OUT_CS_REG(R300_ZB_FORMAT,
 177                 R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL);
 178         } else {
 179             OUT_CS_REG(R300_ZB_FORMAT, 0x0);
 180         }
 181     }
 182
 183     OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 184         R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 185         R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 186     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
 187         R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 188         R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 189     END_CS;
 190 }
 191
 192 void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs)
 193 {
 194     struct r300_screen* r300screen =
 195         (struct r300_screen*)r300->context.screen;
 196     CS_LOCALS(r300);
 197     BEGIN_CS(13);
 198     OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
 199     OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6);
 200     OUT_CS(rs->depth_scale_front);
 201     OUT_CS(rs->depth_offset_front);
 202     OUT_CS(rs->depth_scale_back);
 203     OUT_CS(rs->depth_offset_back);
 204     OUT_CS(rs->polygon_offset_enable);
 205     OUT_CS(rs->cull_mode);
 206     OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
 207     OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
 208     END_CS;
 209 }
 210
 211 void r300_emit_scissor_state(struct r300_context* r300,
 212                              struct r300_scissor_state* scissor)
 213 {
 214     CS_LOCALS(r300);
 215     BEGIN_CS(3);
 216     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 217     OUT_CS(scissor->scissor_top_left);
 218     OUT_CS(scissor->scissor_bottom_right);
 219     END_CS;
 220 }
 221
 222 /* Emit all dirty state. */
 223 void r300_emit_dirty_state(struct r300_context* r300)
 224 {
 225     struct r300_screen* r300screen =
 226         (struct r300_screen*)r300->context.screen;
 227     CS_LOCALS(r300);
 228
 229     if (!(r300->dirty_state) && !(r300->dirty_hw)) {
 230         return;
 231     }
 232
 233     /* XXX check size */
 234
 235     if (r300->dirty_state & R300_NEW_BLEND) {
 236         r300_emit_blend_state(r300, r300->blend_state);
 237     }
 238
 239     if (r300->dirty_state & R300_NEW_BLEND_COLOR) {
 240         r300_emit_blend_color_state(r300, r300->blend_color_state);
 241     }
 242
 243     if (r300->dirty_state & R300_NEW_DSA) {
 244         r300_emit_dsa_state(r300, r300->dsa_state);
 245     }
 246
 247     if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) {
 248         if (r300screen->caps->is_r500) {
 249             r500_emit_fragment_shader(r300,
 250                 (struct r500_fragment_shader*)r300->fs);
 251         } else {
 252             r300_emit_fragment_shader(r300,
 253                 (struct r300_fragment_shader*)r300->fs);
 254         }
 255     }
 256
 257     if (r300->dirty_state & R300_NEW_RASTERIZER) {
 258         r300_emit_rs_state(r300, r300->rs_state);
 259     }
 260
 261     if (r300->dirty_state & R300_NEW_SCISSOR) {
 262         r300_emit_scissor_state(r300, r300->scissor_state);
 263     }
 264
 265     r300->dirty_state = 0;
 266 }