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[mesa.git] / src / gallium / drivers / r300 / r300_emit.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_emit: Functions for emitting state. */
25
26 #include "util/u_format.h"
27 #include "util/u_math.h"
28 #include "util/u_simple_list.h"
29
30 #include "r300_context.h"
31 #include "r300_cs.h"
32 #include "r300_emit.h"
33 #include "r300_fs.h"
34 #include "r300_screen.h"
35 #include "r300_screen_buffer.h"
36 #include "r300_vs.h"
37
38 void r300_emit_blend_state(struct r300_context* r300,
39 unsigned size, void* state)
40 {
41 struct r300_blend_state* blend = (struct r300_blend_state*)state;
42 struct pipe_framebuffer_state* fb =
43 (struct pipe_framebuffer_state*)r300->fb_state.state;
44 CS_LOCALS(r300);
45
46 if (fb->nr_cbufs) {
47 WRITE_CS_TABLE(blend->cb, size);
48 } else {
49 WRITE_CS_TABLE(blend->cb_no_readwrite, size);
50 }
51 }
52
53 void r300_emit_blend_color_state(struct r300_context* r300,
54 unsigned size, void* state)
55 {
56 struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
57 CS_LOCALS(r300);
58
59 WRITE_CS_TABLE(bc->cb, size);
60 }
61
62 void r300_emit_clip_state(struct r300_context* r300,
63 unsigned size, void* state)
64 {
65 struct r300_clip_state* clip = (struct r300_clip_state*)state;
66 CS_LOCALS(r300);
67
68 WRITE_CS_TABLE(clip->cb, size);
69 }
70
71 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
72 {
73 struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
74 struct pipe_framebuffer_state* fb =
75 (struct pipe_framebuffer_state*)r300->fb_state.state;
76 struct pipe_stencil_ref stencil_ref = r300->stencil_ref;
77 CS_LOCALS(r300);
78
79 BEGIN_CS(size);
80 OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
81 OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
82
83 if (fb->zsbuf) {
84 OUT_CS(dsa->z_buffer_control);
85 OUT_CS(dsa->z_stencil_control);
86 } else {
87 OUT_CS(0);
88 OUT_CS(0);
89 }
90
91 OUT_CS(dsa->stencil_ref_mask | stencil_ref.ref_value[0]);
92
93 if (r300->screen->caps.is_r500) {
94 OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf | stencil_ref.ref_value[1]);
95 }
96 END_CS;
97 }
98
99 static const float * get_rc_constant_state(
100 struct r300_context * r300,
101 struct rc_constant * constant)
102 {
103 struct r300_textures_state* texstate = r300->textures_state.state;
104 static float vec[4] = { 0.0, 0.0, 0.0, 1.0 };
105 struct pipe_resource *tex;
106
107 assert(constant->Type == RC_CONSTANT_STATE);
108
109 switch (constant->u.State[0]) {
110 /* Factor for converting rectangle coords to
111 * normalized coords. Should only show up on non-r500. */
112 case RC_STATE_R300_TEXRECT_FACTOR:
113 tex = texstate->sampler_views[constant->u.State[1]]->base.texture;
114 vec[0] = 1.0 / tex->width0;
115 vec[1] = 1.0 / tex->height0;
116 break;
117
118 case RC_STATE_R300_VIEWPORT_SCALE:
119 vec[0] = r300->viewport.scale[0];
120 vec[1] = r300->viewport.scale[1];
121 vec[2] = r300->viewport.scale[2];
122 break;
123
124 case RC_STATE_R300_VIEWPORT_OFFSET:
125 vec[0] = r300->viewport.translate[0];
126 vec[1] = r300->viewport.translate[1];
127 vec[2] = r300->viewport.translate[2];
128 break;
129
130 default:
131 fprintf(stderr, "r300: Implementation error: "
132 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
133 }
134
135 /* This should either be (0, 0, 0, 1), which should be a relatively safe
136 * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
137 * state factors. */
138 return vec;
139 }
140
141 /* Convert a normal single-precision float into the 7.16 format
142 * used by the R300 fragment shader.
143 */
144 static uint32_t pack_float24(float f)
145 {
146 union {
147 float fl;
148 uint32_t u;
149 } u;
150 float mantissa;
151 int exponent;
152 uint32_t float24 = 0;
153
154 if (f == 0.0)
155 return 0;
156
157 u.fl = f;
158
159 mantissa = frexpf(f, &exponent);
160
161 /* Handle -ve */
162 if (mantissa < 0) {
163 float24 |= (1 << 23);
164 mantissa = mantissa * -1.0;
165 }
166 /* Handle exponent, bias of 63 */
167 exponent += 62;
168 float24 |= (exponent << 16);
169 /* Kill 7 LSB of mantissa */
170 float24 |= (u.u & 0x7FFFFF) >> 7;
171
172 return float24;
173 }
174
175 unsigned r300_get_fs_atom_size(struct r300_context *r300)
176 {
177 struct r300_fragment_shader *fs = r300_fs(r300);
178 unsigned imm_count = fs->shader->immediates_count;
179 struct r300_fragment_program_code *code = &fs->shader->code.code.r300;
180
181 return 19 +
182 code->alu.length * 4 +
183 (code->tex.length ? (1 + code->tex.length) : 0) +
184 (imm_count ? imm_count * 5 : 0);
185 }
186
187 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
188 {
189 struct r300_fragment_shader *fs = r300_fs(r300);
190 struct rX00_fragment_program_code* generic_code = &fs->shader->code;
191 struct r300_fragment_program_code * code = &generic_code->code.r300;
192 unsigned i;
193 unsigned imm_count = fs->shader->immediates_count;
194 unsigned imm_first = fs->shader->externals_count;
195 unsigned imm_end = generic_code->constants.Count;
196 struct rc_constant *constants = generic_code->constants.Constants;
197 CS_LOCALS(r300);
198
199 BEGIN_CS(size);
200 OUT_CS_REG(R300_US_CONFIG, code->config);
201 OUT_CS_REG(R300_US_PIXSIZE, code->pixsize);
202 OUT_CS_REG(R300_US_CODE_OFFSET, code->code_offset);
203
204 OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4);
205 OUT_CS_TABLE(code->code_addr, 4);
206
207 OUT_CS_REG_SEQ(R300_US_ALU_RGB_INST_0, code->alu.length);
208 for (i = 0; i < code->alu.length; i++)
209 OUT_CS(code->alu.inst[i].rgb_inst);
210
211 OUT_CS_REG_SEQ(R300_US_ALU_RGB_ADDR_0, code->alu.length);
212 for (i = 0; i < code->alu.length; i++)
213 OUT_CS(code->alu.inst[i].rgb_addr);
214
215 OUT_CS_REG_SEQ(R300_US_ALU_ALPHA_INST_0, code->alu.length);
216 for (i = 0; i < code->alu.length; i++)
217 OUT_CS(code->alu.inst[i].alpha_inst);
218
219 OUT_CS_REG_SEQ(R300_US_ALU_ALPHA_ADDR_0, code->alu.length);
220 for (i = 0; i < code->alu.length; i++)
221 OUT_CS(code->alu.inst[i].alpha_addr);
222
223 if (code->tex.length) {
224 OUT_CS_REG_SEQ(R300_US_TEX_INST_0, code->tex.length);
225 OUT_CS_TABLE(code->tex.inst, code->tex.length);
226 }
227
228 /* Emit immediates. */
229 if (imm_count) {
230 for(i = imm_first; i < imm_end; ++i) {
231 if (constants[i].Type == RC_CONSTANT_IMMEDIATE) {
232 const float *data = constants[i].u.Immediate;
233
234 OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
235 OUT_CS(pack_float24(data[0]));
236 OUT_CS(pack_float24(data[1]));
237 OUT_CS(pack_float24(data[2]));
238 OUT_CS(pack_float24(data[3]));
239 }
240 }
241 }
242
243 OUT_CS_REG(R300_FG_DEPTH_SRC, fs->shader->fg_depth_src);
244 OUT_CS_REG(R300_US_W_FMT, fs->shader->us_out_w);
245 END_CS;
246 }
247
248 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
249 {
250 struct r300_fragment_shader *fs = r300_fs(r300);
251 struct rc_constant_list *constants = &fs->shader->code.constants;
252 struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
253 unsigned i, count = fs->shader->externals_count;
254 CS_LOCALS(r300);
255
256 if (count == 0)
257 return;
258
259 BEGIN_CS(size);
260 OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count * 4);
261 for(i = 0; i < count; ++i) {
262 const float *data;
263 assert(constants->Constants[i].Type == RC_CONSTANT_EXTERNAL);
264 data = buf->constants[i];
265 OUT_CS(pack_float24(data[0]));
266 OUT_CS(pack_float24(data[1]));
267 OUT_CS(pack_float24(data[2]));
268 OUT_CS(pack_float24(data[3]));
269 }
270 END_CS;
271 }
272
273 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
274 {
275 struct r300_fragment_shader *fs = r300_fs(r300);
276 struct rc_constant_list *constants = &fs->shader->code.constants;
277 unsigned i;
278 unsigned count = fs->shader->rc_state_count;
279 unsigned first = fs->shader->externals_count;
280 unsigned end = constants->Count;
281 CS_LOCALS(r300);
282
283 if (count == 0)
284 return;
285
286 BEGIN_CS(size);
287 for(i = first; i < end; ++i) {
288 if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
289 const float *data =
290 get_rc_constant_state(r300, &constants->Constants[i]);
291
292 OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
293 OUT_CS(pack_float24(data[0]));
294 OUT_CS(pack_float24(data[1]));
295 OUT_CS(pack_float24(data[2]));
296 OUT_CS(pack_float24(data[3]));
297 }
298 }
299 END_CS;
300 }
301
302 unsigned r500_get_fs_atom_size(struct r300_context *r300)
303 {
304 struct r300_fragment_shader *fs = r300_fs(r300);
305 unsigned imm_count = fs->shader->immediates_count;
306 struct r500_fragment_program_code *code = &fs->shader->code.code.r500;
307
308 return 17 +
309 ((code->inst_end + 1) * 6) +
310 (imm_count ? imm_count * 7 : 0);
311 }
312
313 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
314 {
315 struct r300_fragment_shader *fs = r300_fs(r300);
316 struct rX00_fragment_program_code* generic_code = &fs->shader->code;
317 struct r500_fragment_program_code * code = &generic_code->code.r500;
318 unsigned i;
319 unsigned imm_count = fs->shader->immediates_count;
320 unsigned imm_first = fs->shader->externals_count;
321 unsigned imm_end = generic_code->constants.Count;
322 struct rc_constant *constants = generic_code->constants.Constants;
323 CS_LOCALS(r300);
324
325 BEGIN_CS(size);
326 OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
327 OUT_CS_REG(R500_US_PIXSIZE, code->max_temp_idx);
328 OUT_CS_REG(R500_US_CODE_RANGE,
329 R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(code->inst_end));
330 OUT_CS_REG(R500_US_CODE_OFFSET, 0);
331 OUT_CS_REG(R500_US_CODE_ADDR,
332 R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(code->inst_end));
333
334 OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
335 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, (code->inst_end + 1) * 6);
336 for (i = 0; i <= code->inst_end; i++) {
337 OUT_CS(code->inst[i].inst0);
338 OUT_CS(code->inst[i].inst1);
339 OUT_CS(code->inst[i].inst2);
340 OUT_CS(code->inst[i].inst3);
341 OUT_CS(code->inst[i].inst4);
342 OUT_CS(code->inst[i].inst5);
343 }
344
345 /* Emit immediates. */
346 if (imm_count) {
347 for(i = imm_first; i < imm_end; ++i) {
348 if (constants[i].Type == RC_CONSTANT_IMMEDIATE) {
349 const float *data = constants[i].u.Immediate;
350
351 OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
352 R500_GA_US_VECTOR_INDEX_TYPE_CONST |
353 (i & R500_GA_US_VECTOR_INDEX_MASK));
354 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
355 OUT_CS_TABLE(data, 4);
356 }
357 }
358 }
359
360 OUT_CS_REG(R300_FG_DEPTH_SRC, fs->shader->fg_depth_src);
361 OUT_CS_REG(R300_US_W_FMT, fs->shader->us_out_w);
362 END_CS;
363 }
364
365 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
366 {
367 struct r300_fragment_shader *fs = r300_fs(r300);
368 struct rc_constant_list *constants = &fs->shader->code.constants;
369 struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
370 unsigned i, count = fs->shader->externals_count;
371 CS_LOCALS(r300);
372
373 if (count == 0)
374 return;
375
376 BEGIN_CS(size);
377 OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
378 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count * 4);
379 for(i = 0; i < count; ++i) {
380 assert(constants->Constants[i].Type == RC_CONSTANT_EXTERNAL);
381 }
382 OUT_CS_TABLE(buf->constants, count * 4);
383 END_CS;
384 }
385
386 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
387 {
388 struct r300_fragment_shader *fs = r300_fs(r300);
389 struct rc_constant_list *constants = &fs->shader->code.constants;
390 unsigned i;
391 unsigned count = fs->shader->rc_state_count;
392 unsigned first = fs->shader->externals_count;
393 unsigned end = constants->Count;
394 CS_LOCALS(r300);
395
396 if (count == 0)
397 return;
398
399 BEGIN_CS(size);
400 for(i = first; i < end; ++i) {
401 if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
402 const float *data =
403 get_rc_constant_state(r300, &constants->Constants[i]);
404
405 OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
406 R500_GA_US_VECTOR_INDEX_TYPE_CONST |
407 (i & R500_GA_US_VECTOR_INDEX_MASK));
408 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
409 OUT_CS_TABLE(data, 4);
410 }
411 }
412 END_CS;
413 }
414
415 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
416 {
417 struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
418 struct r300_texture* tex;
419 struct pipe_surface* surf;
420 int i;
421 CS_LOCALS(r300);
422
423 BEGIN_CS(size);
424
425 /* Flush and free renderbuffer caches. */
426 OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
427 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
428 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
429 OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
430 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
431 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
432
433 /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
434 * what we usually want. */
435 if (r300->screen->caps.is_r500) {
436 OUT_CS_REG(R300_RB3D_CCTL,
437 R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE);
438 } else {
439 OUT_CS_REG(R300_RB3D_CCTL, 0);
440 }
441
442 /* Set up colorbuffers. */
443 for (i = 0; i < fb->nr_cbufs; i++) {
444 surf = fb->cbufs[i];
445 tex = r300_texture(surf->texture);
446 assert(tex && tex->buffer && "cbuf is marked, but NULL!");
447
448 OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
449 OUT_CS_TEX_RELOC(tex, surf->offset, 0, tex->domain, 0);
450
451 OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1);
452 OUT_CS_TEX_RELOC(tex, tex->fb_state.colorpitch[surf->level],
453 0, tex->domain, 0);
454
455 OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), tex->fb_state.us_out_fmt);
456 }
457 for (; i < 4; i++) {
458 OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), R300_US_OUT_FMT_UNUSED);
459 }
460
461 /* Set up a zbuffer. */
462 if (fb->zsbuf) {
463 surf = fb->zsbuf;
464 tex = r300_texture(surf->texture);
465 assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
466
467 OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
468 OUT_CS_TEX_RELOC(tex, surf->offset, 0, tex->domain, 0);
469
470 OUT_CS_REG(R300_ZB_FORMAT, tex->fb_state.zb_format);
471
472 OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
473 OUT_CS_TEX_RELOC(tex, tex->fb_state.depthpitch[surf->level],
474 0, tex->domain, 0);
475 }
476
477 OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
478 if (r300->screen->caps.is_r500) {
479 OUT_CS(0);
480 OUT_CS(((fb->width - 1) << R300_SCISSORS_X_SHIFT) |
481 ((fb->height - 1) << R300_SCISSORS_Y_SHIFT));
482 } else {
483 OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
484 (1440 << R300_SCISSORS_Y_SHIFT));
485 OUT_CS(((fb->width + 1440-1) << R300_SCISSORS_X_SHIFT) |
486 ((fb->height + 1440-1) << R300_SCISSORS_Y_SHIFT));
487 }
488 END_CS;
489 }
490
491 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
492 {
493 struct r300_query *query = r300->query_current;
494 CS_LOCALS(r300);
495
496 if (!query)
497 return;
498
499 BEGIN_CS(size);
500 if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
501 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
502 } else {
503 OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
504 }
505 OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
506 END_CS;
507 query->begin_emitted = TRUE;
508 }
509
510
511 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
512 struct r300_query *query)
513 {
514 struct r300_capabilities* caps = &r300->screen->caps;
515 CS_LOCALS(r300);
516
517 assert(caps->num_frag_pipes);
518
519 BEGIN_CS(6 * caps->num_frag_pipes + 2);
520 /* I'm not so sure I like this switch, but it's hard to be elegant
521 * when there's so many special cases...
522 *
523 * So here's the basic idea. For each pipe, enable writes to it only,
524 * then put out the relocation for ZPASS_ADDR, taking into account a
525 * 4-byte offset for each pipe. RV380 and older are special; they have
526 * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
527 * so there's a chipset cap for that. */
528 switch (caps->num_frag_pipes) {
529 case 4:
530 /* pipe 3 only */
531 OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
532 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
533 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 3),
534 0, r300_buffer(r300->oqbo)->domain, 0);
535 case 3:
536 /* pipe 2 only */
537 OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
538 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
539 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 2),
540 0, r300_buffer(r300->oqbo)->domain, 0);
541 case 2:
542 /* pipe 1 only */
543 /* As mentioned above, accomodate RV380 and older. */
544 OUT_CS_REG(R300_SU_REG_DEST,
545 1 << (caps->high_second_pipe ? 3 : 1));
546 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
547 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 1),
548 0, r300_buffer(r300->oqbo)->domain, 0);
549 case 1:
550 /* pipe 0 only */
551 OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
552 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
553 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 0),
554 0, r300_buffer(r300->oqbo)->domain, 0);
555 break;
556 default:
557 fprintf(stderr, "r300: Implementation error: Chipset reports %d"
558 " pixel pipes!\n", caps->num_frag_pipes);
559 abort();
560 }
561
562 /* And, finally, reset it to normal... */
563 OUT_CS_REG(R300_SU_REG_DEST, 0xF);
564 END_CS;
565 }
566
567 static void rv530_emit_query_end_single_z(struct r300_context *r300,
568 struct r300_query *query)
569 {
570 CS_LOCALS(r300);
571
572 BEGIN_CS(8);
573 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
574 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
575 OUT_CS_BUF_RELOC(r300->oqbo, query->offset, 0, r300_buffer(r300->oqbo)->domain, 0);
576 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
577 END_CS;
578 }
579
580 static void rv530_emit_query_end_double_z(struct r300_context *r300,
581 struct r300_query *query)
582 {
583 CS_LOCALS(r300);
584
585 BEGIN_CS(14);
586 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
587 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
588 OUT_CS_BUF_RELOC(r300->oqbo, query->offset, 0, r300_buffer(r300->oqbo)->domain, 0);
589 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
590 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
591 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + sizeof(uint32_t), 0, r300_buffer(r300->oqbo)->domain, 0);
592 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
593 END_CS;
594 }
595
596 void r300_emit_query_end(struct r300_context* r300)
597 {
598 struct r300_capabilities *caps = &r300->screen->caps;
599 struct r300_query *query = r300->query_current;
600
601 if (!query)
602 return;
603
604 if (query->begin_emitted == FALSE)
605 return;
606
607 if (caps->family == CHIP_FAMILY_RV530) {
608 if (caps->num_z_pipes == 2)
609 rv530_emit_query_end_double_z(r300, query);
610 else
611 rv530_emit_query_end_single_z(r300, query);
612 } else
613 r300_emit_query_end_frag_pipes(r300, query);
614
615 query->begin_emitted = FALSE;
616 }
617
618 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
619 {
620 struct r300_rs_state* rs = (struct r300_rs_state*)state;
621 float scale, offset;
622 CS_LOCALS(r300);
623
624 BEGIN_CS(size);
625 OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
626
627 OUT_CS_REG(R300_GB_AA_CONFIG, rs->antialiasing_config);
628
629 OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
630 OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
631 OUT_CS(rs->point_minmax);
632 OUT_CS(rs->line_control);
633
634 if (rs->polygon_offset_enable) {
635 scale = rs->depth_scale * 12;
636 offset = rs->depth_offset;
637
638 switch (r300->zbuffer_bpp) {
639 case 16:
640 offset *= 4;
641 break;
642 case 24:
643 offset *= 2;
644 break;
645 }
646
647 OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
648 OUT_CS_32F(scale);
649 OUT_CS_32F(offset);
650 OUT_CS_32F(scale);
651 OUT_CS_32F(offset);
652 }
653
654 OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2);
655 OUT_CS(rs->polygon_offset_enable);
656 OUT_CS(rs->cull_mode);
657 OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
658 OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
659 OUT_CS_REG(R300_GA_POLY_MODE, rs->polygon_mode);
660 OUT_CS_REG(R300_SC_CLIP_RULE, rs->clip_rule);
661 OUT_CS_REG(R300_GB_ENABLE, rs->stuffing_enable);
662 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
663 OUT_CS_32F(rs->point_texcoord_left);
664 OUT_CS_32F(rs->point_texcoord_bottom);
665 OUT_CS_32F(rs->point_texcoord_right);
666 OUT_CS_32F(rs->point_texcoord_top);
667 END_CS;
668 }
669
670 void r300_emit_rs_block_state(struct r300_context* r300,
671 unsigned size, void* state)
672 {
673 struct r300_rs_block* rs = (struct r300_rs_block*)state;
674 unsigned i;
675 /* It's the same for both INST and IP tables */
676 unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
677 CS_LOCALS(r300);
678
679 if (SCREEN_DBG_ON(r300->screen, DBG_DRAW)) {
680 r500_dump_rs_block(rs);
681 }
682
683 DBG(r300, DBG_DRAW, "r300: RS emit:\n");
684
685 BEGIN_CS(size);
686 OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
687 OUT_CS(rs->vap_vtx_state_cntl);
688 OUT_CS(rs->vap_vsm_vtx_assm);
689 OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
690 OUT_CS(rs->vap_out_vtx_fmt[0]);
691 OUT_CS(rs->vap_out_vtx_fmt[1]);
692
693 if (r300->screen->caps.is_r500) {
694 OUT_CS_REG_SEQ(R500_RS_IP_0, count);
695 } else {
696 OUT_CS_REG_SEQ(R300_RS_IP_0, count);
697 }
698 OUT_CS_TABLE(rs->ip, count);
699 for (i = 0; i < count; i++) {
700 DBG(r300, DBG_DRAW, " : ip %d: 0x%08x\n", i, rs->ip[i]);
701 }
702
703 OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
704 OUT_CS(rs->count);
705 OUT_CS(rs->inst_count);
706
707 if (r300->screen->caps.is_r500) {
708 OUT_CS_REG_SEQ(R500_RS_INST_0, count);
709 } else {
710 OUT_CS_REG_SEQ(R300_RS_INST_0, count);
711 }
712 OUT_CS_TABLE(rs->inst, count);
713 for (i = 0; i < count; i++) {
714 DBG(r300, DBG_DRAW, " : inst %d: 0x%08x\n", i, rs->inst[i]);
715 }
716
717 DBG(r300, DBG_DRAW, " : count: 0x%08x inst_count: 0x%08x\n",
718 rs->count, rs->inst_count);
719
720 END_CS;
721 }
722
723 void r300_emit_scissor_state(struct r300_context* r300,
724 unsigned size, void* state)
725 {
726 struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
727 CS_LOCALS(r300);
728
729 BEGIN_CS(size);
730 OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
731 if (r300->screen->caps.is_r500) {
732 OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
733 (scissor->miny << R300_CLIPRECT_Y_SHIFT));
734 OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
735 ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
736 } else {
737 OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
738 ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
739 OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
740 ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
741 }
742 END_CS;
743 }
744
745 void r300_emit_textures_state(struct r300_context *r300,
746 unsigned size, void *state)
747 {
748 struct r300_textures_state *allstate = (struct r300_textures_state*)state;
749 struct r300_texture_sampler_state *texstate;
750 struct r300_texture *tex;
751 unsigned i;
752 CS_LOCALS(r300);
753
754 BEGIN_CS(size);
755 OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
756
757 for (i = 0; i < allstate->count; i++) {
758 if ((1 << i) & allstate->tx_enable) {
759 texstate = &allstate->regs[i];
760 tex = r300_texture(allstate->sampler_views[i]->base.texture);
761
762 OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
763 OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
764 OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
765 texstate->border_color);
766
767 OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
768 OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
769 OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
770
771 OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (i * 4), 1);
772 OUT_CS_TEX_RELOC(tex, texstate->format.tile_config, tex->domain,
773 0, 0);
774 }
775 }
776 END_CS;
777 }
778
779 void r300_emit_aos(struct r300_context* r300, int offset, boolean indexed)
780 {
781 struct pipe_vertex_buffer *vb1, *vb2, *vbuf = r300->vertex_buffer;
782 struct pipe_vertex_element *velem = r300->velems->velem;
783 struct r300_buffer *buf;
784 int i;
785 unsigned *hw_format_size = r300->velems->hw_format_size;
786 unsigned size1, size2, aos_count = r300->velems->count;
787 unsigned packet_size = (aos_count * 3 + 1) / 2;
788 CS_LOCALS(r300);
789
790 BEGIN_CS(2 + packet_size + aos_count * 2);
791 OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
792 OUT_CS(aos_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
793
794 for (i = 0; i < aos_count - 1; i += 2) {
795 vb1 = &vbuf[velem[i].vertex_buffer_index];
796 vb2 = &vbuf[velem[i+1].vertex_buffer_index];
797 size1 = hw_format_size[i];
798 size2 = hw_format_size[i+1];
799
800 OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
801 R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
802 OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
803 OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
804 }
805
806 if (aos_count & 1) {
807 vb1 = &vbuf[velem[i].vertex_buffer_index];
808 size1 = hw_format_size[i];
809
810 OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
811 OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
812 }
813
814 for (i = 0; i < aos_count; i++) {
815 buf = r300_buffer(vbuf[velem[i].vertex_buffer_index].buffer);
816 OUT_CS_BUF_RELOC_NO_OFFSET(&buf->b.b, buf->domain, 0, 0);
817 }
818 END_CS;
819 }
820
821 void r300_emit_aos_swtcl(struct r300_context *r300, boolean indexed)
822 {
823 CS_LOCALS(r300);
824
825 DBG(r300, DBG_DRAW, "r300: Preparing vertex buffer %p for render, "
826 "vertex size %d\n", r300->vbo,
827 r300->vertex_info.size);
828 /* Set the pointer to our vertex buffer. The emitted values are this:
829 * PACKET3 [3D_LOAD_VBPNTR]
830 * COUNT [1]
831 * FORMAT [size | stride << 8]
832 * OFFSET [offset into BO]
833 * VBPNTR [relocated BO]
834 */
835 BEGIN_CS(7);
836 OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
837 OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
838 OUT_CS(r300->vertex_info.size |
839 (r300->vertex_info.size << 8));
840 OUT_CS(r300->vbo_offset);
841 OUT_CS_BUF_RELOC(r300->vbo, 0, r300_buffer(r300->vbo)->domain, 0, 0);
842 END_CS;
843 }
844
845 void r300_emit_vertex_stream_state(struct r300_context* r300,
846 unsigned size, void* state)
847 {
848 struct r300_vertex_stream_state *streams =
849 (struct r300_vertex_stream_state*)state;
850 unsigned i;
851 CS_LOCALS(r300);
852
853 DBG(r300, DBG_DRAW, "r300: PSC emit:\n");
854
855 BEGIN_CS(size);
856 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
857 OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
858 for (i = 0; i < streams->count; i++) {
859 DBG(r300, DBG_DRAW, " : prog_stream_cntl%d: 0x%08x\n", i,
860 streams->vap_prog_stream_cntl[i]);
861 }
862 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
863 OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
864 for (i = 0; i < streams->count; i++) {
865 DBG(r300, DBG_DRAW, " : prog_stream_cntl_ext%d: 0x%08x\n", i,
866 streams->vap_prog_stream_cntl_ext[i]);
867 }
868 END_CS;
869 }
870
871 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
872 {
873 CS_LOCALS(r300);
874
875 BEGIN_CS(size);
876 OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
877 END_CS;
878 }
879
880 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
881 {
882 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
883 struct r300_vertex_program_code* code = &vs->code;
884 struct r300_screen* r300screen = r300->screen;
885 unsigned instruction_count = code->length / 4;
886 unsigned i;
887
888 unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
889 unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
890 unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
891 unsigned temp_count = MAX2(code->num_temporaries, 1);
892
893 unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
894 vtx_mem_size / output_count, 10);
895 unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 6);
896
897 unsigned imm_first = vs->externals_count;
898 unsigned imm_end = vs->code.constants.Count;
899 unsigned imm_count = vs->immediates_count;
900
901 CS_LOCALS(r300);
902
903 BEGIN_CS(size);
904 /* R300_VAP_PVS_CODE_CNTL_0
905 * R300_VAP_PVS_CONST_CNTL
906 * R300_VAP_PVS_CODE_CNTL_1
907 * See the r5xx docs for instructions on how to use these. */
908 OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
909 OUT_CS(R300_PVS_FIRST_INST(0) |
910 R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
911 R300_PVS_LAST_INST(instruction_count - 1));
912 OUT_CS(R300_PVS_MAX_CONST_ADDR(code->constants.Count - 1));
913 OUT_CS(instruction_count - 1);
914
915 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
916 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
917 OUT_CS_TABLE(code->body.d, code->length);
918
919 OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
920 R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
921 R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
922 R300_PVS_VF_MAX_VTX_NUM(12) |
923 (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
924
925 /* Emit immediates. */
926 if (imm_count) {
927 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
928 (r300->screen->caps.is_r500 ?
929 R500_PVS_CONST_START : R300_PVS_CONST_START) +
930 imm_first);
931 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
932 for (i = imm_first; i < imm_end; i++) {
933 const float *data = vs->code.constants.Constants[i].u.Immediate;
934 OUT_CS_TABLE(data, 4);
935 }
936 }
937 END_CS;
938 }
939
940 void r300_emit_vs_constants(struct r300_context* r300,
941 unsigned size, void *state)
942 {
943 unsigned count =
944 ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
945 struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
946 CS_LOCALS(r300);
947
948 if (!count)
949 return;
950
951 BEGIN_CS(size);
952 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
953 (r300->screen->caps.is_r500 ?
954 R500_PVS_CONST_START : R300_PVS_CONST_START));
955 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
956 OUT_CS_TABLE(buf->constants, count * 4);
957 END_CS;
958 }
959
960 void r300_emit_viewport_state(struct r300_context* r300,
961 unsigned size, void* state)
962 {
963 struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
964 CS_LOCALS(r300);
965
966 BEGIN_CS(size);
967 OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
968 OUT_CS_32F(viewport->xscale);
969 OUT_CS_32F(viewport->xoffset);
970 OUT_CS_32F(viewport->yscale);
971 OUT_CS_32F(viewport->yoffset);
972 OUT_CS_32F(viewport->zscale);
973 OUT_CS_32F(viewport->zoffset);
974 OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
975 END_CS;
976 }
977
978 void r300_emit_ztop_state(struct r300_context* r300,
979 unsigned size, void* state)
980 {
981 struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
982 CS_LOCALS(r300);
983
984 BEGIN_CS(size);
985 OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
986 END_CS;
987 }
988
989 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
990 {
991 CS_LOCALS(r300);
992
993 BEGIN_CS(size);
994 OUT_CS_REG(R300_TX_INVALTAGS, 0);
995 END_CS;
996 }
997
998 void r300_emit_buffer_validate(struct r300_context *r300,
999 boolean do_validate_vertex_buffers,
1000 struct pipe_resource *index_buffer)
1001 {
1002 struct pipe_framebuffer_state* fb =
1003 (struct pipe_framebuffer_state*)r300->fb_state.state;
1004 struct r300_textures_state *texstate =
1005 (struct r300_textures_state*)r300->textures_state.state;
1006 struct r300_texture* tex;
1007 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
1008 struct pipe_vertex_element *velem = r300->velems->velem;
1009 struct pipe_resource *pbuf;
1010 unsigned i;
1011 boolean invalid = FALSE;
1012
1013 /* upload buffers first */
1014 if (r300->screen->caps.has_tcl && r300->any_user_vbs) {
1015 r300_upload_user_buffers(r300);
1016 r300->any_user_vbs = false;
1017 }
1018
1019 /* Clean out BOs. */
1020 r300->rws->reset_bos(r300->rws);
1021
1022 validate:
1023 /* Color buffers... */
1024 for (i = 0; i < fb->nr_cbufs; i++) {
1025 tex = r300_texture(fb->cbufs[i]->texture);
1026 assert(tex && tex->buffer && "cbuf is marked, but NULL!");
1027 if (!r300_add_texture(r300->rws, tex, 0, tex->domain)) {
1028 r300->context.flush(&r300->context, 0, NULL);
1029 goto validate;
1030 }
1031 }
1032 /* ...depth buffer... */
1033 if (fb->zsbuf) {
1034 tex = r300_texture(fb->zsbuf->texture);
1035 assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
1036 if (!r300_add_texture(r300->rws, tex,
1037 0, tex->domain)) {
1038 r300->context.flush(&r300->context, 0, NULL);
1039 goto validate;
1040 }
1041 }
1042 /* ...textures... */
1043 for (i = 0; i < texstate->count; i++) {
1044 if (!(texstate->tx_enable & (1 << i))) {
1045 continue;
1046 }
1047
1048 tex = r300_texture(texstate->sampler_views[i]->base.texture);
1049 if (!r300_add_texture(r300->rws, tex, tex->domain, 0)) {
1050 r300->context.flush(&r300->context, 0, NULL);
1051 goto validate;
1052 }
1053 }
1054 /* ...occlusion query buffer... */
1055 if (r300->query_start.dirty ||
1056 (r300->query_current && r300->query_current->begin_emitted)) {
1057 if (!r300_add_buffer(r300->rws, r300->oqbo,
1058 0, r300_buffer(r300->oqbo)->domain)) {
1059 r300->context.flush(&r300->context, 0, NULL);
1060 goto validate;
1061 }
1062 }
1063 /* ...vertex buffer for SWTCL path... */
1064 if (r300->vbo) {
1065 if (!r300_add_buffer(r300->rws, r300->vbo,
1066 r300_buffer(r300->vbo)->domain, 0)) {
1067 r300->context.flush(&r300->context, 0, NULL);
1068 goto validate;
1069 }
1070 }
1071 /* ...vertex buffers for HWTCL path... */
1072 if (do_validate_vertex_buffers) {
1073 for (i = 0; i < r300->velems->count; i++) {
1074 pbuf = vbuf[velem[i].vertex_buffer_index].buffer;
1075
1076 if (!r300_add_buffer(r300->rws, pbuf,
1077 r300_buffer(pbuf)->domain, 0)) {
1078 r300->context.flush(&r300->context, 0, NULL);
1079 goto validate;
1080 }
1081 }
1082 }
1083 /* ...and index buffer for HWTCL path. */
1084 if (index_buffer) {
1085 if (!r300_add_buffer(r300->rws, index_buffer,
1086 r300_buffer(index_buffer)->domain, 0)) {
1087 r300->context.flush(&r300->context, 0, NULL);
1088 goto validate;
1089 }
1090 }
1091 if (!r300->rws->validate(r300->rws)) {
1092 r300->context.flush(&r300->context, 0, NULL);
1093 if (invalid) {
1094 /* Well, hell. */
1095 fprintf(stderr, "r300: Stuck in validation loop, gonna quit now.\n");
1096 abort();
1097 }
1098 invalid = TRUE;
1099 goto validate;
1100 }
1101 }
1102
1103 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
1104 {
1105 struct r300_atom* atom;
1106 unsigned dwords = 0;
1107
1108 foreach(atom, &r300->atom_list) {
1109 if (atom->dirty) {
1110 dwords += atom->size;
1111 }
1112 }
1113
1114 /* let's reserve some more, just in case */
1115 dwords += 32;
1116
1117 return dwords;
1118 }
1119
1120 /* Emit all dirty state. */
1121 void r300_emit_dirty_state(struct r300_context* r300)
1122 {
1123 struct r300_atom* atom;
1124
1125 foreach(atom, &r300->atom_list) {
1126 if (atom->dirty) {
1127 atom->emit(r300, atom->size, atom->state);
1128 if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) {
1129 atom->counter++;
1130 }
1131 atom->dirty = FALSE;
1132 }
1133 }
1134
1135 r300->dirty_hw++;
1136 }