src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 /* r300_emit: Functions for emitting state. */
  25
  26 #include "util/u_format.h"
  27 #include "util/u_math.h"
  28 #include "util/u_mm.h"
  29
  30 #include "r300_context.h"
  31 #include "r300_cb.h"
  32 #include "r300_cs.h"
  33 #include "r300_emit.h"
  34 #include "r300_fs.h"
  35 #include "r300_screen.h"
  36 #include "r300_screen_buffer.h"
  37 #include "r300_vs.h"
  38
  39 void r300_emit_blend_state(struct r300_context* r300,
  40                            unsigned size, void* state)
  41 {
  42     struct r300_blend_state* blend = (struct r300_blend_state*)state;
  43     struct pipe_framebuffer_state* fb =
  44         (struct pipe_framebuffer_state*)r300->fb_state.state;
  45     CS_LOCALS(r300);
  46
  47     if (fb->nr_cbufs) {
  48         if (fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT) {
  49             WRITE_CS_TABLE(blend->cb_noclamp, size);
  50         } else {
  51             unsigned swz = r300_surface(fb->cbufs[0])->colormask_swizzle;
  52             WRITE_CS_TABLE(blend->cb_clamp[swz], size);
  53         }
  54     } else {
  55         WRITE_CS_TABLE(blend->cb_no_readwrite, size);
  56     }
  57 }
  58
  59 void r300_emit_blend_color_state(struct r300_context* r300,
  60                                  unsigned size, void* state)
  61 {
  62     struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
  63     CS_LOCALS(r300);
  64
  65     WRITE_CS_TABLE(bc->cb, size);
  66 }
  67
  68 void r300_emit_clip_state(struct r300_context* r300,
  69                           unsigned size, void* state)
  70 {
  71     struct r300_clip_state* clip = (struct r300_clip_state*)state;
  72     CS_LOCALS(r300);
  73
  74     WRITE_CS_TABLE(clip->cb, size);
  75 }
  76
  77 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
  78 {
  79     struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
  80     struct pipe_framebuffer_state* fb =
  81         (struct pipe_framebuffer_state*)r300->fb_state.state;
  82     CS_LOCALS(r300);
  83
  84     if (fb->zsbuf) {
  85         if (fb->nr_cbufs && fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT)
  86             WRITE_CS_TABLE(&dsa->cb_begin_fp16, size);
  87         else
  88             WRITE_CS_TABLE(&dsa->cb_begin, size);
  89     } else {
  90         if (fb->nr_cbufs && fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT)
  91             WRITE_CS_TABLE(dsa->cb_fp16_zb_no_readwrite, size);
  92         else
  93             WRITE_CS_TABLE(dsa->cb_zb_no_readwrite, size);
  94     }
  95 }
  96
  97 static void get_rc_constant_state(
  98     float vec[4],
  99     struct r300_context * r300,
 100     struct rc_constant * constant)
 101 {
 102     struct r300_textures_state* texstate = r300->textures_state.state;
 103     struct r300_resource *tex;
 104
 105     assert(constant->Type == RC_CONSTANT_STATE);
 106
 107     /* vec should either be (0, 0, 0, 1), which should be a relatively safe
 108      * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
 109      * state factors. */
 110
 111     switch (constant->u.State[0]) {
 112         /* Factor for converting rectangle coords to
 113          * normalized coords. Should only show up on non-r500. */
 114         case RC_STATE_R300_TEXRECT_FACTOR:
 115             tex = r300_resource(texstate->sampler_views[constant->u.State[1]]->base.texture);
 116             vec[0] = 1.0 / tex->tex.width0;
 117             vec[1] = 1.0 / tex->tex.height0;
 118             vec[2] = 0;
 119             vec[3] = 1;
 120             break;
 121
 122         case RC_STATE_R300_TEXSCALE_FACTOR:
 123             tex = r300_resource(texstate->sampler_views[constant->u.State[1]]->base.texture);
 124             /* Add a small number to the texture size to work around rounding errors in hw. */
 125             vec[0] = tex->b.b.width0  / (tex->tex.width0  + 0.001f);
 126             vec[1] = tex->b.b.height0 / (tex->tex.height0 + 0.001f);
 127             vec[2] = tex->b.b.depth0  / (tex->tex.depth0  + 0.001f);
 128             vec[3] = 1;
 129             break;
 130
 131         case RC_STATE_R300_VIEWPORT_SCALE:
 132             vec[0] = r300->viewport.scale[0];
 133             vec[1] = r300->viewport.scale[1];
 134             vec[2] = r300->viewport.scale[2];
 135             vec[3] = 1;
 136             break;
 137
 138         case RC_STATE_R300_VIEWPORT_OFFSET:
 139             vec[0] = r300->viewport.translate[0];
 140             vec[1] = r300->viewport.translate[1];
 141             vec[2] = r300->viewport.translate[2];
 142             vec[3] = 1;
 143             break;
 144
 145         default:
 146             fprintf(stderr, "r300: Implementation error: "
 147                 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
 148             vec[0] = 0;
 149             vec[1] = 0;
 150             vec[2] = 0;
 151             vec[3] = 1;
 152     }
 153 }
 154
 155 /* Convert a normal single-precision float into the 7.16 format
 156  * used by the R300 fragment shader.
 157  */
 158 uint32_t pack_float24(float f)
 159 {
 160     union {
 161         float fl;
 162         uint32_t u;
 163     } u;
 164     float mantissa;
 165     int exponent;
 166     uint32_t float24 = 0;
 167
 168     if (f == 0.0)
 169         return 0;
 170
 171     u.fl = f;
 172
 173     mantissa = frexpf(f, &exponent);
 174
 175     /* Handle -ve */
 176     if (mantissa < 0) {
 177         float24 |= (1 << 23);
 178         mantissa = mantissa * -1.0;
 179     }
 180     /* Handle exponent, bias of 63 */
 181     exponent += 62;
 182     float24 |= (exponent << 16);
 183     /* Kill 7 LSB of mantissa */
 184     float24 |= (u.u & 0x7FFFFF) >> 7;
 185
 186     return float24;
 187 }
 188
 189 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
 190 {
 191     struct r300_fragment_shader *fs = r300_fs(r300);
 192     CS_LOCALS(r300);
 193
 194     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 195 }
 196
 197 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 198 {
 199     struct r300_fragment_shader *fs = r300_fs(r300);
 200     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 201     unsigned count = fs->shader->externals_count;
 202     unsigned i, j;
 203     CS_LOCALS(r300);
 204
 205     if (count == 0)
 206         return;
 207
 208     BEGIN_CS(size);
 209     OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count * 4);
 210     if (buf->remap_table){
 211         for (i = 0; i < count; i++) {
 212             float *data = (float*)&buf->ptr[buf->remap_table[i]*4];
 213             for (j = 0; j < 4; j++)
 214                 OUT_CS(pack_float24(data[j]));
 215         }
 216     } else {
 217         for (i = 0; i < count; i++)
 218             for (j = 0; j < 4; j++)
 219                 OUT_CS(pack_float24(*(float*)&buf->ptr[i*4+j]));
 220     }
 221
 222     END_CS;
 223 }
 224
 225 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 226 {
 227     struct r300_fragment_shader *fs = r300_fs(r300);
 228     struct rc_constant_list *constants = &fs->shader->code.constants;
 229     unsigned i;
 230     unsigned count = fs->shader->rc_state_count;
 231     unsigned first = fs->shader->externals_count;
 232     unsigned end = constants->Count;
 233     unsigned j;
 234     CS_LOCALS(r300);
 235
 236     if (count == 0)
 237         return;
 238
 239     BEGIN_CS(size);
 240     for(i = first; i < end; ++i) {
 241         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 242             float data[4];
 243
 244             get_rc_constant_state(data, r300, &constants->Constants[i]);
 245
 246             OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
 247             for (j = 0; j < 4; j++)
 248                 OUT_CS(pack_float24(data[j]));
 249         }
 250     }
 251     END_CS;
 252 }
 253
 254 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
 255 {
 256     struct r300_fragment_shader *fs = r300_fs(r300);
 257     CS_LOCALS(r300);
 258
 259     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 260 }
 261
 262 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 263 {
 264     struct r300_fragment_shader *fs = r300_fs(r300);
 265     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 266     unsigned count = fs->shader->externals_count;
 267     CS_LOCALS(r300);
 268
 269     if (count == 0)
 270         return;
 271
 272     BEGIN_CS(size);
 273     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 274     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count * 4);
 275     if (buf->remap_table){
 276         for (unsigned i = 0; i < count; i++) {
 277             uint32_t *data = &buf->ptr[buf->remap_table[i]*4];
 278             OUT_CS_TABLE(data, 4);
 279         }
 280     } else {
 281         OUT_CS_TABLE(buf->ptr, count * 4);
 282     }
 283     END_CS;
 284 }
 285
 286 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 287 {
 288     struct r300_fragment_shader *fs = r300_fs(r300);
 289     struct rc_constant_list *constants = &fs->shader->code.constants;
 290     unsigned i;
 291     unsigned count = fs->shader->rc_state_count;
 292     unsigned first = fs->shader->externals_count;
 293     unsigned end = constants->Count;
 294     CS_LOCALS(r300);
 295
 296     if (count == 0)
 297         return;
 298
 299     BEGIN_CS(size);
 300     for(i = first; i < end; ++i) {
 301         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 302             float data[4];
 303
 304             get_rc_constant_state(data, r300, &constants->Constants[i]);
 305
 306             OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 307                        R500_GA_US_VECTOR_INDEX_TYPE_CONST |
 308                        (i & R500_GA_US_VECTOR_INDEX_MASK));
 309             OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
 310             OUT_CS_TABLE(data, 4);
 311         }
 312     }
 313     END_CS;
 314 }
 315
 316 void r300_emit_gpu_flush(struct r300_context *r300, unsigned size, void *state)
 317 {
 318     struct r300_gpu_flush *gpuflush = (struct r300_gpu_flush*)state;
 319     struct pipe_framebuffer_state* fb =
 320             (struct pipe_framebuffer_state*)r300->fb_state.state;
 321     uint32_t height = fb->height;
 322     uint32_t width = fb->width;
 323     CS_LOCALS(r300);
 324
 325     if (r300->cbzb_clear) {
 326         struct r300_surface *surf = r300_surface(fb->cbufs[0]);
 327
 328         height = surf->cbzb_height;
 329         width = surf->cbzb_width;
 330     }
 331
 332     DBG(r300, DBG_SCISSOR,
 333         "r300: Scissor width: %i, height: %i, CBZB clear: %s\n",
 334         width, height, r300->cbzb_clear ? "YES" : "NO");
 335
 336     BEGIN_CS(size);
 337
 338     /* Set up scissors.
 339      * By writing to the SC registers, SC & US assert idle. */
 340     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 341     if (r300->screen->caps.is_r500) {
 342         OUT_CS(0);
 343         OUT_CS(((width  - 1) << R300_SCISSORS_X_SHIFT) |
 344                ((height - 1) << R300_SCISSORS_Y_SHIFT));
 345     } else {
 346         OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
 347                (1440 << R300_SCISSORS_Y_SHIFT));
 348         OUT_CS(((width  + 1440-1) << R300_SCISSORS_X_SHIFT) |
 349                ((height + 1440-1) << R300_SCISSORS_Y_SHIFT));
 350     }
 351
 352     /* Flush CB & ZB caches and wait until the 3D engine is idle and clean. */
 353     OUT_CS_TABLE(gpuflush->cb_flush_clean, 6);
 354     END_CS;
 355 }
 356
 357 void r300_emit_aa_state(struct r300_context *r300, unsigned size, void *state)
 358 {
 359     struct r300_aa_state *aa = (struct r300_aa_state*)state;
 360     CS_LOCALS(r300);
 361
 362     BEGIN_CS(size);
 363     OUT_CS_REG(R300_GB_AA_CONFIG, aa->aa_config);
 364
 365     if (aa->dest) {
 366         OUT_CS_REG(R300_RB3D_AARESOLVE_OFFSET, aa->dest->offset);
 367         OUT_CS_RELOC(aa->dest);
 368         OUT_CS_REG(R300_RB3D_AARESOLVE_PITCH, aa->dest->pitch);
 369     }
 370
 371     OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, aa->aaresolve_ctl);
 372     END_CS;
 373 }
 374
 375 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
 376 {
 377     struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
 378     struct r300_surface* surf;
 379     unsigned i;
 380     uint32_t rb3d_cctl = 0;
 381
 382     CS_LOCALS(r300);
 383
 384     BEGIN_CS(size);
 385
 386     /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
 387      * what we usually want. */
 388     if (r300->screen->caps.is_r500) {
 389         rb3d_cctl = R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE;
 390     }
 391     if (fb->nr_cbufs && r300->fb_multiwrite) {
 392         rb3d_cctl |= R300_RB3D_CCTL_NUM_MULTIWRITES(fb->nr_cbufs);
 393     }
 394
 395     OUT_CS_REG(R300_RB3D_CCTL, rb3d_cctl);
 396
 397     /* Set up colorbuffers. */
 398     for (i = 0; i < fb->nr_cbufs; i++) {
 399         surf = r300_surface(fb->cbufs[i]);
 400
 401         OUT_CS_REG(R300_RB3D_COLOROFFSET0 + (4 * i), surf->offset);
 402         OUT_CS_RELOC(surf);
 403
 404         OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), surf->pitch);
 405         OUT_CS_RELOC(surf);
 406     }
 407
 408     /* Set up the ZB part of the CBZB clear. */
 409     if (r300->cbzb_clear) {
 410         surf = r300_surface(fb->cbufs[0]);
 411
 412         OUT_CS_REG(R300_ZB_FORMAT, surf->cbzb_format);
 413
 414         OUT_CS_REG(R300_ZB_DEPTHOFFSET, surf->cbzb_midpoint_offset);
 415         OUT_CS_RELOC(surf);
 416
 417         OUT_CS_REG(R300_ZB_DEPTHPITCH, surf->cbzb_pitch);
 418         OUT_CS_RELOC(surf);
 419
 420         DBG(r300, DBG_CBZB,
 421             "CBZB clearing cbuf %08x %08x\n", surf->cbzb_format,
 422             surf->cbzb_pitch);
 423     }
 424     /* Set up a zbuffer. */
 425     else if (fb->zsbuf) {
 426         surf = r300_surface(fb->zsbuf);
 427
 428         OUT_CS_REG(R300_ZB_FORMAT, surf->format);
 429
 430         OUT_CS_REG(R300_ZB_DEPTHOFFSET, surf->offset);
 431         OUT_CS_RELOC(surf);
 432
 433         OUT_CS_REG(R300_ZB_DEPTHPITCH, surf->pitch);
 434         OUT_CS_RELOC(surf);
 435
 436         if (r300->hyperz_enabled) {
 437             /* HiZ RAM. */
 438             OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0);
 439             OUT_CS_REG(R300_ZB_HIZ_PITCH, surf->pitch_hiz);
 440             /* Z Mask RAM. (compressed zbuffer) */
 441             OUT_CS_REG(R300_ZB_ZMASK_OFFSET, 0);
 442             OUT_CS_REG(R300_ZB_ZMASK_PITCH, surf->pitch_zmask);
 443         }
 444     }
 445
 446     END_CS;
 447 }
 448
 449 void r300_emit_hyperz_state(struct r300_context *r300,
 450                             unsigned size, void *state)
 451 {
 452     struct r300_hyperz_state *z = state;
 453     CS_LOCALS(r300);
 454
 455     if (z->flush)
 456         WRITE_CS_TABLE(&z->cb_flush_begin, size);
 457     else
 458         WRITE_CS_TABLE(&z->cb_begin, size - 2);
 459 }
 460
 461 void r300_emit_hyperz_end(struct r300_context *r300)
 462 {
 463     struct r300_hyperz_state z =
 464             *(struct r300_hyperz_state*)r300->hyperz_state.state;
 465
 466     z.flush = 1;
 467     z.zb_bw_cntl = 0;
 468     z.zb_depthclearvalue = 0;
 469     z.sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 470     z.gb_z_peq_config = 0;
 471
 472     r300_emit_hyperz_state(r300, r300->hyperz_state.size, &z);
 473 }
 474
 475 void r300_emit_fb_state_pipelined(struct r300_context *r300,
 476                                   unsigned size, void *state)
 477 {
 478     struct pipe_framebuffer_state* fb =
 479             (struct pipe_framebuffer_state*)r300->fb_state.state;
 480     unsigned i, num_cbufs = fb->nr_cbufs;
 481     unsigned mspos0, mspos1;
 482     CS_LOCALS(r300);
 483
 484     /* If we use the multiwrite feature, the colorbuffers 2,3,4 must be
 485      * marked as UNUSED in the US block. */
 486     if (r300->fb_multiwrite) {
 487         num_cbufs = MIN2(num_cbufs, 1);
 488     }
 489
 490     BEGIN_CS(size);
 491
 492     /* Colorbuffer format in the US block.
 493      * (must be written after unpipelined regs) */
 494     OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
 495     for (i = 0; i < num_cbufs; i++) {
 496         OUT_CS(r300_surface(fb->cbufs[i])->format);
 497     }
 498     for (; i < 1; i++) {
 499         OUT_CS(R300_US_OUT_FMT_C4_8 |
 500                R300_C0_SEL_B | R300_C1_SEL_G |
 501                R300_C2_SEL_R | R300_C3_SEL_A);
 502     }
 503     for (; i < 4; i++) {
 504         OUT_CS(R300_US_OUT_FMT_UNUSED);
 505     }
 506
 507     /* Multisampling. Depends on framebuffer sample count.
 508      * These are pipelined regs and as such cannot be moved
 509      * to the AA state. */
 510     mspos0 = 0x66666666;
 511     mspos1 = 0x6666666;
 512
 513     if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
 514         /* Subsample placement. These may not be optimal. */
 515         switch (fb->cbufs[0]->texture->nr_samples) {
 516         case 2:
 517             mspos0 = 0x33996633;
 518             mspos1 = 0x6666663;
 519             break;
 520         case 3:
 521             mspos0 = 0x33936933;
 522             mspos1 = 0x6666663;
 523             break;
 524         case 4:
 525             mspos0 = 0x33939933;
 526             mspos1 = 0x3966663;
 527             break;
 528         case 6:
 529             mspos0 = 0x22a2aa22;
 530             mspos1 = 0x2a65672;
 531             break;
 532         default:
 533             debug_printf("r300: Bad number of multisamples!\n");
 534         }
 535     }
 536
 537     OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
 538     OUT_CS(mspos0);
 539     OUT_CS(mspos1);
 540     END_CS;
 541 }
 542
 543 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
 544 {
 545     struct r300_query *query = r300->query_current;
 546     CS_LOCALS(r300);
 547
 548     if (!query)
 549         return;
 550
 551     BEGIN_CS(size);
 552     if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
 553         OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 554     } else {
 555         OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
 556     }
 557     OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
 558     END_CS;
 559     query->begin_emitted = TRUE;
 560 }
 561
 562 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
 563                                            struct r300_query *query)
 564 {
 565     struct r300_capabilities* caps = &r300->screen->caps;
 566     uint32_t gb_pipes = r300->screen->info.r300_num_gb_pipes;
 567     CS_LOCALS(r300);
 568
 569     assert(gb_pipes);
 570
 571     BEGIN_CS(6 * gb_pipes + 2);
 572     /* I'm not so sure I like this switch, but it's hard to be elegant
 573      * when there's so many special cases...
 574      *
 575      * So here's the basic idea. For each pipe, enable writes to it only,
 576      * then put out the relocation for ZPASS_ADDR, taking into account a
 577      * 4-byte offset for each pipe. RV380 and older are special; they have
 578      * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
 579      * so there's a chipset cap for that. */
 580     switch (gb_pipes) {
 581         case 4:
 582             /* pipe 3 only */
 583             OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
 584             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 3) * 4);
 585             OUT_CS_RELOC(r300->query_current);
 586         case 3:
 587             /* pipe 2 only */
 588             OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
 589             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 2) * 4);
 590             OUT_CS_RELOC(r300->query_current);
 591         case 2:
 592             /* pipe 1 only */
 593             /* As mentioned above, accomodate RV380 and older. */
 594             OUT_CS_REG(R300_SU_REG_DEST,
 595                     1 << (caps->high_second_pipe ? 3 : 1));
 596             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);
 597             OUT_CS_RELOC(r300->query_current);
 598         case 1:
 599             /* pipe 0 only */
 600             OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
 601             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 0) * 4);
 602             OUT_CS_RELOC(r300->query_current);
 603             break;
 604         default:
 605             fprintf(stderr, "r300: Implementation error: Chipset reports %d"
 606                     " pixel pipes!\n", gb_pipes);
 607             abort();
 608     }
 609
 610     /* And, finally, reset it to normal... */
 611     OUT_CS_REG(R300_SU_REG_DEST, 0xF);
 612     END_CS;
 613 }
 614
 615 static void rv530_emit_query_end_single_z(struct r300_context *r300,
 616                                           struct r300_query *query)
 617 {
 618     CS_LOCALS(r300);
 619
 620     BEGIN_CS(8);
 621     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 622     OUT_CS_REG(R300_ZB_ZPASS_ADDR, query->num_results * 4);
 623     OUT_CS_RELOC(r300->query_current);
 624     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 625     END_CS;
 626 }
 627
 628 static void rv530_emit_query_end_double_z(struct r300_context *r300,
 629                                           struct r300_query *query)
 630 {
 631     CS_LOCALS(r300);
 632
 633     BEGIN_CS(14);
 634     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 635     OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 0) * 4);
 636     OUT_CS_RELOC(r300->query_current);
 637     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
 638     OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);
 639     OUT_CS_RELOC(r300->query_current);
 640     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 641     END_CS;
 642 }
 643
 644 void r300_emit_query_end(struct r300_context* r300)
 645 {
 646     struct r300_capabilities *caps = &r300->screen->caps;
 647     struct r300_query *query = r300->query_current;
 648
 649     if (!query)
 650         return;
 651
 652     if (query->begin_emitted == FALSE)
 653         return;
 654
 655     if (caps->family == CHIP_FAMILY_RV530) {
 656         if (r300->screen->info.r300_num_z_pipes == 2)
 657             rv530_emit_query_end_double_z(r300, query);
 658         else
 659             rv530_emit_query_end_single_z(r300, query);
 660     } else
 661         r300_emit_query_end_frag_pipes(r300, query);
 662
 663     query->begin_emitted = FALSE;
 664     query->num_results += query->num_pipes;
 665
 666     /* XXX grab all the results and reset the counter. */
 667     if (query->num_results >= query->buf->size / 4 - 4) {
 668         query->num_results = (query->buf->size / 4) / 2;
 669         fprintf(stderr, "r300: Rewinding OQBO...\n");
 670     }
 671 }
 672
 673 void r300_emit_invariant_state(struct r300_context *r300,
 674                                unsigned size, void *state)
 675 {
 676     CS_LOCALS(r300);
 677     WRITE_CS_TABLE(state, size);
 678 }
 679
 680 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
 681 {
 682     struct r300_rs_state* rs = state;
 683     CS_LOCALS(r300);
 684
 685     BEGIN_CS(size);
 686     OUT_CS_TABLE(rs->cb_main, RS_STATE_MAIN_SIZE);
 687     if (rs->polygon_offset_enable) {
 688         if (r300->zbuffer_bpp == 16) {
 689             OUT_CS_TABLE(rs->cb_poly_offset_zb16, 5);
 690         } else {
 691             OUT_CS_TABLE(rs->cb_poly_offset_zb24, 5);
 692         }
 693     }
 694     END_CS;
 695 }
 696
 697 void r300_emit_rs_block_state(struct r300_context* r300,
 698                               unsigned size, void* state)
 699 {
 700     struct r300_rs_block* rs = (struct r300_rs_block*)state;
 701     unsigned i;
 702     /* It's the same for both INST and IP tables */
 703     unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
 704     CS_LOCALS(r300);
 705
 706     if (DBG_ON(r300, DBG_RS_BLOCK)) {
 707         r500_dump_rs_block(rs);
 708
 709         fprintf(stderr, "r300: RS emit:\n");
 710
 711         for (i = 0; i < count; i++)
 712             fprintf(stderr, "    : ip %d: 0x%08x\n", i, rs->ip[i]);
 713
 714         for (i = 0; i < count; i++)
 715             fprintf(stderr, "    : inst %d: 0x%08x\n", i, rs->inst[i]);
 716
 717         fprintf(stderr, "    : count: 0x%08x inst_count: 0x%08x\n",
 718             rs->count, rs->inst_count);
 719     }
 720
 721     BEGIN_CS(size);
 722     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 723     OUT_CS(rs->vap_vtx_state_cntl);
 724     OUT_CS(rs->vap_vsm_vtx_assm);
 725     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 726     OUT_CS(rs->vap_out_vtx_fmt[0]);
 727     OUT_CS(rs->vap_out_vtx_fmt[1]);
 728     OUT_CS_REG_SEQ(R300_GB_ENABLE, 1);
 729     OUT_CS(rs->gb_enable);
 730
 731     if (r300->screen->caps.is_r500) {
 732         OUT_CS_REG_SEQ(R500_RS_IP_0, count);
 733     } else {
 734         OUT_CS_REG_SEQ(R300_RS_IP_0, count);
 735     }
 736     OUT_CS_TABLE(rs->ip, count);
 737
 738     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 739     OUT_CS(rs->count);
 740     OUT_CS(rs->inst_count);
 741
 742     if (r300->screen->caps.is_r500) {
 743         OUT_CS_REG_SEQ(R500_RS_INST_0, count);
 744     } else {
 745         OUT_CS_REG_SEQ(R300_RS_INST_0, count);
 746     }
 747     OUT_CS_TABLE(rs->inst, count);
 748     END_CS;
 749 }
 750
 751 void r300_emit_scissor_state(struct r300_context* r300,
 752                              unsigned size, void* state)
 753 {
 754     struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
 755     CS_LOCALS(r300);
 756
 757     BEGIN_CS(size);
 758     OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
 759     if (r300->screen->caps.is_r500) {
 760         OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
 761                (scissor->miny << R300_CLIPRECT_Y_SHIFT));
 762         OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
 763                ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
 764     } else {
 765         OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
 766                ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
 767         OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
 768                ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
 769     }
 770     END_CS;
 771 }
 772
 773 void r300_emit_textures_state(struct r300_context *r300,
 774                               unsigned size, void *state)
 775 {
 776     struct r300_textures_state *allstate = (struct r300_textures_state*)state;
 777     struct r300_texture_sampler_state *texstate;
 778     struct r300_resource *tex;
 779     unsigned i;
 780     boolean has_us_format = r300->screen->caps.has_us_format;
 781     CS_LOCALS(r300);
 782
 783     BEGIN_CS(size);
 784     OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
 785
 786     for (i = 0; i < allstate->count; i++) {
 787         if ((1 << i) & allstate->tx_enable) {
 788             texstate = &allstate->regs[i];
 789             tex = r300_resource(allstate->sampler_views[i]->base.texture);
 790
 791             OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
 792             OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
 793             OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
 794                        texstate->border_color);
 795
 796             OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
 797             OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
 798             OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
 799
 800             OUT_CS_REG(R300_TX_OFFSET_0 + (i * 4), texstate->format.tile_config);
 801             OUT_CS_RELOC(tex);
 802
 803             if (has_us_format) {
 804                 OUT_CS_REG(R500_US_FORMAT0_0 + (i * 4),
 805                            texstate->format.us_format0);
 806             }
 807         }
 808     }
 809     END_CS;
 810 }
 811
 812 void r300_emit_vertex_arrays(struct r300_context* r300, int offset,
 813                              boolean indexed, int instance_id)
 814 {
 815     struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
 816     struct pipe_vertex_element *velem = r300->velems->velem;
 817     struct r300_resource *buf;
 818     int i;
 819     unsigned vertex_array_count = r300->velems->count;
 820     unsigned packet_size = (vertex_array_count * 3 + 1) / 2;
 821     struct pipe_vertex_buffer *vb1, *vb2;
 822     unsigned *hw_format_size = r300->velems->format_size;
 823     unsigned size1, size2, offset1, offset2, stride1, stride2;
 824     CS_LOCALS(r300);
 825
 826     BEGIN_CS(2 + packet_size + vertex_array_count * 2);
 827     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
 828     OUT_CS(vertex_array_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 829
 830     if (instance_id == -1) {
 831         /* Non-instanced arrays. This ignores instance_divisor and instance_id. */
 832         for (i = 0; i < vertex_array_count - 1; i += 2) {
 833             vb1 = &vbuf[velem[i].vertex_buffer_index];
 834             vb2 = &vbuf[velem[i+1].vertex_buffer_index];
 835             size1 = hw_format_size[i];
 836             size2 = hw_format_size[i+1];
 837
 838             OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
 839                    R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
 840             OUT_CS(vb1->buffer_offset + velem[i].src_offset   + offset * vb1->stride);
 841             OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
 842         }
 843
 844         if (vertex_array_count & 1) {
 845             vb1 = &vbuf[velem[i].vertex_buffer_index];
 846             size1 = hw_format_size[i];
 847
 848             OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
 849             OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
 850         }
 851
 852         for (i = 0; i < vertex_array_count; i++) {
 853             buf = r300_resource(vbuf[velem[i].vertex_buffer_index].buffer);
 854             OUT_CS_RELOC(buf);
 855         }
 856     } else {
 857         /* Instanced arrays. */
 858         for (i = 0; i < vertex_array_count - 1; i += 2) {
 859             vb1 = &vbuf[velem[i].vertex_buffer_index];
 860             vb2 = &vbuf[velem[i+1].vertex_buffer_index];
 861             size1 = hw_format_size[i];
 862             size2 = hw_format_size[i+1];
 863
 864             if (velem[i].instance_divisor) {
 865                 stride1 = 0;
 866                 offset1 = vb1->buffer_offset + velem[i].src_offset +
 867                           (instance_id / velem[i].instance_divisor) * vb1->stride;
 868             } else {
 869                 stride1 = vb1->stride;
 870                 offset1 = vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride;
 871             }
 872             if (velem[i+1].instance_divisor) {
 873                 stride2 = 0;
 874                 offset2 = vb2->buffer_offset + velem[i+1].src_offset +
 875                           (instance_id / velem[i+1].instance_divisor) * vb2->stride;
 876             } else {
 877                 stride2 = vb2->stride;
 878                 offset2 = vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride;
 879             }
 880
 881             OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(stride1) |
 882                    R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(stride2));
 883             OUT_CS(offset1);
 884             OUT_CS(offset2);
 885         }
 886
 887         if (vertex_array_count & 1) {
 888             vb1 = &vbuf[velem[i].vertex_buffer_index];
 889             size1 = hw_format_size[i];
 890
 891             if (velem[i].instance_divisor) {
 892                 stride1 = 0;
 893                 offset1 = vb1->buffer_offset + velem[i].src_offset +
 894                           (instance_id / velem[i].instance_divisor) * vb1->stride;
 895             } else {
 896                 stride1 = vb1->stride;
 897                 offset1 = vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride;
 898             }
 899
 900             OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(stride1));
 901             OUT_CS(offset1);
 902         }
 903
 904         for (i = 0; i < vertex_array_count; i++) {
 905             buf = r300_resource(vbuf[velem[i].vertex_buffer_index].buffer);
 906             OUT_CS_RELOC(buf);
 907         }
 908     }
 909     END_CS;
 910 }
 911
 912 void r300_emit_vertex_arrays_swtcl(struct r300_context *r300, boolean indexed)
 913 {
 914     CS_LOCALS(r300);
 915
 916     DBG(r300, DBG_SWTCL, "r300: Preparing vertex buffer %p for render, "
 917             "vertex size %d\n", r300->vbo,
 918             r300->vertex_info.size);
 919     /* Set the pointer to our vertex buffer. The emitted values are this:
 920      * PACKET3 [3D_LOAD_VBPNTR]
 921      * COUNT   [1]
 922      * FORMAT  [size | stride << 8]
 923      * OFFSET  [offset into BO]
 924      * VBPNTR  [relocated BO]
 925      */
 926     BEGIN_CS(7);
 927     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 928     OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 929     OUT_CS(r300->vertex_info.size |
 930             (r300->vertex_info.size << 8));
 931     OUT_CS(r300->draw_vbo_offset);
 932     OUT_CS(0);
 933     OUT_CS_RELOC(r300_resource(r300->vbo));
 934     END_CS;
 935 }
 936
 937 void r300_emit_vertex_stream_state(struct r300_context* r300,
 938                                    unsigned size, void* state)
 939 {
 940     struct r300_vertex_stream_state *streams =
 941         (struct r300_vertex_stream_state*)state;
 942     unsigned i;
 943     CS_LOCALS(r300);
 944
 945     if (DBG_ON(r300, DBG_PSC)) {
 946         fprintf(stderr, "r300: PSC emit:\n");
 947
 948         for (i = 0; i < streams->count; i++) {
 949             fprintf(stderr, "    : prog_stream_cntl%d: 0x%08x\n", i,
 950                    streams->vap_prog_stream_cntl[i]);
 951         }
 952
 953         for (i = 0; i < streams->count; i++) {
 954             fprintf(stderr, "    : prog_stream_cntl_ext%d: 0x%08x\n", i,
 955                    streams->vap_prog_stream_cntl_ext[i]);
 956         }
 957     }
 958
 959     BEGIN_CS(size);
 960     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
 961     OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
 962     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
 963     OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
 964     END_CS;
 965 }
 966
 967 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
 968 {
 969     CS_LOCALS(r300);
 970
 971     BEGIN_CS(size);
 972     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 973     END_CS;
 974 }
 975
 976 void r300_emit_vap_invariant_state(struct r300_context *r300,
 977                                    unsigned size, void *state)
 978 {
 979     CS_LOCALS(r300);
 980     WRITE_CS_TABLE(state, size);
 981 }
 982
 983 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
 984 {
 985     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
 986     struct r300_vertex_program_code* code = &vs->code;
 987     struct r300_screen* r300screen = r300->screen;
 988     unsigned instruction_count = code->length / 4;
 989
 990     unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
 991     unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
 992     unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
 993     unsigned temp_count = MAX2(code->num_temporaries, 1);
 994
 995     unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
 996                                   vtx_mem_size / output_count, 10);
 997     unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 5);
 998
 999     CS_LOCALS(r300);
1000
1001     BEGIN_CS(size);
1002
1003     /* R300_VAP_PVS_CODE_CNTL_0
1004      * R300_VAP_PVS_CONST_CNTL
1005      * R300_VAP_PVS_CODE_CNTL_1
1006      * See the r5xx docs for instructions on how to use these. */
1007     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) |
1008                R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
1009                R300_PVS_LAST_INST(instruction_count - 1));
1010     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, instruction_count - 1);
1011
1012     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
1013     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
1014     OUT_CS_TABLE(code->body.d, code->length);
1015
1016     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
1017             R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
1018             R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
1019             R300_PVS_VF_MAX_VTX_NUM(12) |
1020             (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
1021
1022     /* Emit flow control instructions.  Even if there are no fc instructions,
1023      * we still need to write the registers to make sure they are cleared. */
1024     OUT_CS_REG(R300_VAP_PVS_FLOW_CNTL_OPC, code->fc_ops);
1025     if (r300screen->caps.is_r500) {
1026         OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, R300_VS_MAX_FC_OPS * 2);
1027         OUT_CS_TABLE(code->fc_op_addrs.r500, R300_VS_MAX_FC_OPS * 2);
1028     } else {
1029         OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_ADDRS_0, R300_VS_MAX_FC_OPS);
1030         OUT_CS_TABLE(code->fc_op_addrs.r300, R300_VS_MAX_FC_OPS);
1031     }
1032     OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, R300_VS_MAX_FC_OPS);
1033     OUT_CS_TABLE(code->fc_loop_index, R300_VS_MAX_FC_OPS);
1034
1035     END_CS;
1036 }
1037
1038 void r300_emit_vs_constants(struct r300_context* r300,
1039                             unsigned size, void *state)
1040 {
1041     unsigned count =
1042         ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
1043     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
1044     struct r300_vertex_shader *vs = (struct r300_vertex_shader*)r300->vs_state.state;
1045     unsigned i;
1046     int imm_first = vs->externals_count;
1047     int imm_end = vs->code.constants.Count;
1048     int imm_count = vs->immediates_count;
1049     CS_LOCALS(r300);
1050
1051     BEGIN_CS(size);
1052     OUT_CS_REG(R300_VAP_PVS_CONST_CNTL,
1053                R300_PVS_CONST_BASE_OFFSET(buf->buffer_base) |
1054                R300_PVS_MAX_CONST_ADDR(MAX2(imm_end - 1, 0)));
1055     if (vs->externals_count) {
1056         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
1057                    (r300->screen->caps.is_r500 ?
1058                    R500_PVS_CONST_START : R300_PVS_CONST_START) + buf->buffer_base);
1059         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
1060         if (buf->remap_table){
1061             for (i = 0; i < count; i++) {
1062                 uint32_t *data = &buf->ptr[buf->remap_table[i]*4];
1063                 OUT_CS_TABLE(data, 4);
1064             }
1065         } else {
1066             OUT_CS_TABLE(buf->ptr, count * 4);
1067         }
1068     }
1069
1070     /* Emit immediates. */
1071     if (imm_count) {
1072         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
1073                    (r300->screen->caps.is_r500 ?
1074                    R500_PVS_CONST_START : R300_PVS_CONST_START) +
1075                    buf->buffer_base + imm_first);
1076         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
1077         for (i = imm_first; i < imm_end; i++) {
1078             const float *data = vs->code.constants.Constants[i].u.Immediate;
1079             OUT_CS_TABLE(data, 4);
1080         }
1081     }
1082     END_CS;
1083 }
1084
1085 void r300_emit_viewport_state(struct r300_context* r300,
1086                               unsigned size, void* state)
1087 {
1088     struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
1089     CS_LOCALS(r300);
1090
1091     BEGIN_CS(size);
1092     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
1093     OUT_CS_TABLE(&viewport->xscale, 6);
1094     OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
1095     END_CS;
1096 }
1097
1098 void r300_emit_hiz_clear(struct r300_context *r300, unsigned size, void *state)
1099 {
1100     struct pipe_framebuffer_state *fb =
1101         (struct pipe_framebuffer_state*)r300->fb_state.state;
1102     struct r300_resource* tex;
1103     CS_LOCALS(r300);
1104
1105     tex = r300_resource(fb->zsbuf->texture);
1106
1107     BEGIN_CS(size);
1108     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
1109         R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
1110         R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
1111     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_HIZ, 2);
1112     OUT_CS(0);
1113     OUT_CS(tex->tex.hiz_dwords[fb->zsbuf->u.tex.level]);
1114     OUT_CS(r300->hiz_clear_value);
1115     END_CS;
1116
1117     /* Mark the current zbuffer's hiz ram as in use. */
1118     r300->hiz_in_use = TRUE;
1119     r300->hiz_func = HIZ_FUNC_NONE;
1120     r300_mark_atom_dirty(r300, &r300->hyperz_state);
1121 }
1122
1123 void r300_emit_zmask_clear(struct r300_context *r300, unsigned size, void *state)
1124 {
1125     struct pipe_framebuffer_state *fb =
1126         (struct pipe_framebuffer_state*)r300->fb_state.state;
1127     struct r300_resource *tex;
1128     CS_LOCALS(r300);
1129
1130     tex = r300_resource(fb->zsbuf->texture);
1131
1132     BEGIN_CS(size);
1133     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
1134         R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
1135         R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
1136     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_ZMASK, 2);
1137     OUT_CS(0);
1138     OUT_CS(tex->tex.zmask_dwords[fb->zsbuf->u.tex.level]);
1139     OUT_CS(0);
1140     END_CS;
1141
1142     /* Mark the current zbuffer's zmask as in use. */
1143     r300->zmask_in_use = TRUE;
1144     r300_mark_atom_dirty(r300, &r300->hyperz_state);
1145 }
1146
1147 void r300_emit_ztop_state(struct r300_context* r300,
1148                           unsigned size, void* state)
1149 {
1150     struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
1151     CS_LOCALS(r300);
1152
1153     BEGIN_CS(size);
1154     OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
1155     END_CS;
1156 }
1157
1158 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
1159 {
1160     CS_LOCALS(r300);
1161
1162     BEGIN_CS(size);
1163     OUT_CS_REG(R300_TX_INVALTAGS, 0);
1164     END_CS;
1165 }
1166
1167 boolean r300_emit_buffer_validate(struct r300_context *r300,
1168                                   boolean do_validate_vertex_buffers,
1169                                   struct pipe_resource *index_buffer)
1170 {
1171     struct pipe_framebuffer_state *fb =
1172         (struct pipe_framebuffer_state*)r300->fb_state.state;
1173     struct r300_textures_state *texstate =
1174         (struct r300_textures_state*)r300->textures_state.state;
1175     struct r300_resource *tex;
1176     unsigned i;
1177     boolean flushed = FALSE;
1178
1179 validate:
1180     if (r300->fb_state.dirty) {
1181         /* Color buffers... */
1182         for (i = 0; i < fb->nr_cbufs; i++) {
1183             tex = r300_resource(fb->cbufs[i]->texture);
1184             assert(tex && tex->buf && "cbuf is marked, but NULL!");
1185             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf,
1186                                     RADEON_USAGE_READWRITE,
1187                                     r300_surface(fb->cbufs[i])->domain);
1188         }
1189         /* ...depth buffer... */
1190         if (fb->zsbuf) {
1191             tex = r300_resource(fb->zsbuf->texture);
1192             assert(tex && tex->buf && "zsbuf is marked, but NULL!");
1193             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf,
1194                                     RADEON_USAGE_READWRITE,
1195                                     r300_surface(fb->zsbuf)->domain);
1196         }
1197     }
1198     if (r300->textures_state.dirty) {
1199         /* ...textures... */
1200         for (i = 0; i < texstate->count; i++) {
1201             if (!(texstate->tx_enable & (1 << i))) {
1202                 continue;
1203             }
1204
1205             tex = r300_resource(texstate->sampler_views[i]->base.texture);
1206             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, RADEON_USAGE_READ,
1207                                     tex->domain);
1208         }
1209     }
1210     /* ...occlusion query buffer... */
1211     if (r300->query_current)
1212         r300->rws->cs_add_reloc(r300->cs, r300->query_current->cs_buf,
1213                                 RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
1214     /* ...vertex buffer for SWTCL path... */
1215     if (r300->vbo)
1216         r300->rws->cs_add_reloc(r300->cs, r300_resource(r300->vbo)->cs_buf,
1217                                 RADEON_USAGE_READ,
1218                                 r300_resource(r300->vbo)->domain);
1219     /* ...vertex buffers for HWTCL path... */
1220     if (do_validate_vertex_buffers && r300->vertex_arrays_dirty) {
1221         struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
1222         struct pipe_vertex_buffer *last = r300->vertex_buffer +
1223                                       r300->nr_vertex_buffers;
1224         struct pipe_resource *buf;
1225
1226         for (; vbuf != last; vbuf++) {
1227             buf = vbuf->buffer;
1228             if (!buf)
1229                 continue;
1230
1231             r300->rws->cs_add_reloc(r300->cs, r300_resource(buf)->cs_buf,
1232                                     RADEON_USAGE_READ,
1233                                     r300_resource(buf)->domain);
1234         }
1235     }
1236     /* ...and index buffer for HWTCL path. */
1237     if (index_buffer)
1238         r300->rws->cs_add_reloc(r300->cs, r300_resource(index_buffer)->cs_buf,
1239                                 RADEON_USAGE_READ,
1240                                 r300_resource(index_buffer)->domain);
1241
1242     /* Now do the validation (flush is called inside cs_validate on failure). */
1243     if (!r300->rws->cs_validate(r300->cs)) {
1244         /* Ooops, an infinite loop, give up. */
1245         if (flushed)
1246             return FALSE;
1247
1248         flushed = TRUE;
1249         goto validate;
1250     }
1251
1252     return TRUE;
1253 }
1254
1255 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
1256 {
1257     struct r300_atom* atom;
1258     unsigned dwords = 0;
1259
1260     foreach_dirty_atom(r300, atom) {
1261         if (atom->dirty) {
1262             dwords += atom->size;
1263         }
1264     }
1265
1266     /* let's reserve some more, just in case */
1267     dwords += 32;
1268
1269     return dwords;
1270 }
1271
1272 unsigned r300_get_num_cs_end_dwords(struct r300_context *r300)
1273 {
1274     unsigned dwords = 0;
1275
1276     /* Emitted in flush. */
1277     dwords += 26; /* emit_query_end */
1278     dwords += r300->hyperz_state.size + 2; /* emit_hyperz_end + zcache flush */
1279     if (r300->screen->caps.is_r500)
1280         dwords += 2;
1281
1282     return dwords;
1283 }
1284
1285 /* Emit all dirty state. */
1286 void r300_emit_dirty_state(struct r300_context* r300)
1287 {
1288     struct r300_atom *atom;
1289
1290     foreach_dirty_atom(r300, atom) {
1291         if (atom->dirty) {
1292             atom->emit(r300, atom->size, atom->state);
1293             atom->dirty = FALSE;
1294         }
1295     }
1296
1297     r300->first_dirty = NULL;
1298     r300->last_dirty = NULL;
1299     r300->dirty_hw++;
1300 }