src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 /* r300_emit: Functions for emitting state. */
  25
  26 #include "util/u_format.h"
  27 #include "util/u_math.h"
  28 #include "util/u_mm.h"
  29
  30 #include "r300_context.h"
  31 #include "r300_cb.h"
  32 #include "r300_cs.h"
  33 #include "r300_emit.h"
  34 #include "r300_fs.h"
  35 #include "r300_screen.h"
  36 #include "r300_screen_buffer.h"
  37 #include "r300_vs.h"
  38
  39 void r300_emit_blend_state(struct r300_context* r300,
  40                            unsigned size, void* state)
  41 {
  42     struct r300_blend_state* blend = (struct r300_blend_state*)state;
  43     struct pipe_framebuffer_state* fb =
  44         (struct pipe_framebuffer_state*)r300->fb_state.state;
  45     CS_LOCALS(r300);
  46
  47     if (fb->nr_cbufs) {
  48         if (fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT)
  49             WRITE_CS_TABLE(blend->cb_noclamp, size);
  50         else
  51             WRITE_CS_TABLE(blend->cb_clamp, size);
  52     } else {
  53         WRITE_CS_TABLE(blend->cb_no_readwrite, size);
  54     }
  55 }
  56
  57 void r300_emit_blend_color_state(struct r300_context* r300,
  58                                  unsigned size, void* state)
  59 {
  60     struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
  61     CS_LOCALS(r300);
  62
  63     WRITE_CS_TABLE(bc->cb, size);
  64 }
  65
  66 void r300_emit_clip_state(struct r300_context* r300,
  67                           unsigned size, void* state)
  68 {
  69     struct r300_clip_state* clip = (struct r300_clip_state*)state;
  70     CS_LOCALS(r300);
  71
  72     WRITE_CS_TABLE(clip->cb, size);
  73 }
  74
  75 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
  76 {
  77     struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
  78     struct pipe_framebuffer_state* fb =
  79         (struct pipe_framebuffer_state*)r300->fb_state.state;
  80     CS_LOCALS(r300);
  81
  82     if (fb->zsbuf) {
  83         if (fb->nr_cbufs && fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT)
  84             WRITE_CS_TABLE(&dsa->cb_begin_fp16, size);
  85         else
  86             WRITE_CS_TABLE(&dsa->cb_begin, size);
  87     } else {
  88         if (fb->nr_cbufs && fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT)
  89             WRITE_CS_TABLE(dsa->cb_fp16_zb_no_readwrite, size);
  90         else
  91             WRITE_CS_TABLE(dsa->cb_zb_no_readwrite, size);
  92     }
  93 }
  94
  95 static void get_rc_constant_state(
  96     float vec[4],
  97     struct r300_context * r300,
  98     struct rc_constant * constant)
  99 {
 100     struct r300_textures_state* texstate = r300->textures_state.state;
 101     struct r300_resource *tex;
 102
 103     assert(constant->Type == RC_CONSTANT_STATE);
 104
 105     /* vec should either be (0, 0, 0, 1), which should be a relatively safe
 106      * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
 107      * state factors. */
 108
 109     switch (constant->u.State[0]) {
 110         /* Factor for converting rectangle coords to
 111          * normalized coords. Should only show up on non-r500. */
 112         case RC_STATE_R300_TEXRECT_FACTOR:
 113             tex = r300_resource(texstate->sampler_views[constant->u.State[1]]->base.texture);
 114             vec[0] = 1.0 / tex->tex.width0;
 115             vec[1] = 1.0 / tex->tex.height0;
 116             vec[2] = 0;
 117             vec[3] = 1;
 118             break;
 119
 120         case RC_STATE_R300_TEXSCALE_FACTOR:
 121             tex = r300_resource(texstate->sampler_views[constant->u.State[1]]->base.texture);
 122             /* Add a small number to the texture size to work around rounding errors in hw. */
 123             vec[0] = tex->b.b.b.width0  / (tex->tex.width0  + 0.001f);
 124             vec[1] = tex->b.b.b.height0 / (tex->tex.height0 + 0.001f);
 125             vec[2] = tex->b.b.b.depth0  / (tex->tex.depth0  + 0.001f);
 126             vec[3] = 1;
 127             break;
 128
 129         case RC_STATE_R300_VIEWPORT_SCALE:
 130             vec[0] = r300->viewport.scale[0];
 131             vec[1] = r300->viewport.scale[1];
 132             vec[2] = r300->viewport.scale[2];
 133             vec[3] = 1;
 134             break;
 135
 136         case RC_STATE_R300_VIEWPORT_OFFSET:
 137             vec[0] = r300->viewport.translate[0];
 138             vec[1] = r300->viewport.translate[1];
 139             vec[2] = r300->viewport.translate[2];
 140             vec[3] = 1;
 141             break;
 142
 143         default:
 144             fprintf(stderr, "r300: Implementation error: "
 145                 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
 146             vec[0] = 0;
 147             vec[1] = 0;
 148             vec[2] = 0;
 149             vec[3] = 1;
 150     }
 151 }
 152
 153 /* Convert a normal single-precision float into the 7.16 format
 154  * used by the R300 fragment shader.
 155  */
 156 uint32_t pack_float24(float f)
 157 {
 158     union {
 159         float fl;
 160         uint32_t u;
 161     } u;
 162     float mantissa;
 163     int exponent;
 164     uint32_t float24 = 0;
 165
 166     if (f == 0.0)
 167         return 0;
 168
 169     u.fl = f;
 170
 171     mantissa = frexpf(f, &exponent);
 172
 173     /* Handle -ve */
 174     if (mantissa < 0) {
 175         float24 |= (1 << 23);
 176         mantissa = mantissa * -1.0;
 177     }
 178     /* Handle exponent, bias of 63 */
 179     exponent += 62;
 180     float24 |= (exponent << 16);
 181     /* Kill 7 LSB of mantissa */
 182     float24 |= (u.u & 0x7FFFFF) >> 7;
 183
 184     return float24;
 185 }
 186
 187 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
 188 {
 189     struct r300_fragment_shader *fs = r300_fs(r300);
 190     CS_LOCALS(r300);
 191
 192     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 193 }
 194
 195 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 196 {
 197     struct r300_fragment_shader *fs = r300_fs(r300);
 198     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 199     unsigned count = fs->shader->externals_count;
 200     unsigned i, j;
 201     CS_LOCALS(r300);
 202
 203     if (count == 0)
 204         return;
 205
 206     BEGIN_CS(size);
 207     OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count * 4);
 208     if (buf->remap_table){
 209         for (i = 0; i < count; i++) {
 210             float *data = (float*)&buf->ptr[buf->remap_table[i]*4];
 211             for (j = 0; j < 4; j++)
 212                 OUT_CS(pack_float24(data[j]));
 213         }
 214     } else {
 215         for (i = 0; i < count; i++)
 216             for (j = 0; j < 4; j++)
 217                 OUT_CS(pack_float24(*(float*)&buf->ptr[i*4+j]));
 218     }
 219
 220     END_CS;
 221 }
 222
 223 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 224 {
 225     struct r300_fragment_shader *fs = r300_fs(r300);
 226     struct rc_constant_list *constants = &fs->shader->code.constants;
 227     unsigned i;
 228     unsigned count = fs->shader->rc_state_count;
 229     unsigned first = fs->shader->externals_count;
 230     unsigned end = constants->Count;
 231     unsigned j;
 232     CS_LOCALS(r300);
 233
 234     if (count == 0)
 235         return;
 236
 237     BEGIN_CS(size);
 238     for(i = first; i < end; ++i) {
 239         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 240             float data[4];
 241
 242             get_rc_constant_state(data, r300, &constants->Constants[i]);
 243
 244             OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
 245             for (j = 0; j < 4; j++)
 246                 OUT_CS(pack_float24(data[j]));
 247         }
 248     }
 249     END_CS;
 250 }
 251
 252 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
 253 {
 254     struct r300_fragment_shader *fs = r300_fs(r300);
 255     CS_LOCALS(r300);
 256
 257     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 258 }
 259
 260 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 261 {
 262     struct r300_fragment_shader *fs = r300_fs(r300);
 263     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 264     unsigned count = fs->shader->externals_count;
 265     CS_LOCALS(r300);
 266
 267     if (count == 0)
 268         return;
 269
 270     BEGIN_CS(size);
 271     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 272     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count * 4);
 273     if (buf->remap_table){
 274         for (unsigned i = 0; i < count; i++) {
 275             uint32_t *data = &buf->ptr[buf->remap_table[i]*4];
 276             OUT_CS_TABLE(data, 4);
 277         }
 278     } else {
 279         OUT_CS_TABLE(buf->ptr, count * 4);
 280     }
 281     END_CS;
 282 }
 283
 284 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 285 {
 286     struct r300_fragment_shader *fs = r300_fs(r300);
 287     struct rc_constant_list *constants = &fs->shader->code.constants;
 288     unsigned i;
 289     unsigned count = fs->shader->rc_state_count;
 290     unsigned first = fs->shader->externals_count;
 291     unsigned end = constants->Count;
 292     CS_LOCALS(r300);
 293
 294     if (count == 0)
 295         return;
 296
 297     BEGIN_CS(size);
 298     for(i = first; i < end; ++i) {
 299         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 300             float data[4];
 301
 302             get_rc_constant_state(data, r300, &constants->Constants[i]);
 303
 304             OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 305                        R500_GA_US_VECTOR_INDEX_TYPE_CONST |
 306                        (i & R500_GA_US_VECTOR_INDEX_MASK));
 307             OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
 308             OUT_CS_TABLE(data, 4);
 309         }
 310     }
 311     END_CS;
 312 }
 313
 314 void r300_emit_gpu_flush(struct r300_context *r300, unsigned size, void *state)
 315 {
 316     struct r300_gpu_flush *gpuflush = (struct r300_gpu_flush*)state;
 317     struct pipe_framebuffer_state* fb =
 318             (struct pipe_framebuffer_state*)r300->fb_state.state;
 319     uint32_t height = fb->height;
 320     uint32_t width = fb->width;
 321     CS_LOCALS(r300);
 322
 323     if (r300->cbzb_clear) {
 324         struct r300_surface *surf = r300_surface(fb->cbufs[0]);
 325
 326         height = surf->cbzb_height;
 327         width = surf->cbzb_width;
 328     }
 329
 330     DBG(r300, DBG_SCISSOR,
 331         "r300: Scissor width: %i, height: %i, CBZB clear: %s\n",
 332         width, height, r300->cbzb_clear ? "YES" : "NO");
 333
 334     BEGIN_CS(size);
 335
 336     /* Set up scissors.
 337      * By writing to the SC registers, SC & US assert idle. */
 338     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 339     if (r300->screen->caps.is_r500) {
 340         OUT_CS(0);
 341         OUT_CS(((width  - 1) << R300_SCISSORS_X_SHIFT) |
 342                ((height - 1) << R300_SCISSORS_Y_SHIFT));
 343     } else {
 344         OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
 345                (1440 << R300_SCISSORS_Y_SHIFT));
 346         OUT_CS(((width  + 1440-1) << R300_SCISSORS_X_SHIFT) |
 347                ((height + 1440-1) << R300_SCISSORS_Y_SHIFT));
 348     }
 349
 350     /* Flush CB & ZB caches and wait until the 3D engine is idle and clean. */
 351     OUT_CS_TABLE(gpuflush->cb_flush_clean, 6);
 352     END_CS;
 353 }
 354
 355 void r300_emit_aa_state(struct r300_context *r300, unsigned size, void *state)
 356 {
 357     struct r300_aa_state *aa = (struct r300_aa_state*)state;
 358     CS_LOCALS(r300);
 359
 360     BEGIN_CS(size);
 361     OUT_CS_REG(R300_GB_AA_CONFIG, aa->aa_config);
 362
 363     if (aa->dest) {
 364         OUT_CS_REG(R300_RB3D_AARESOLVE_OFFSET, aa->dest->offset);
 365         OUT_CS_RELOC(aa->dest);
 366         OUT_CS_REG(R300_RB3D_AARESOLVE_PITCH, aa->dest->pitch);
 367     }
 368
 369     OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, aa->aaresolve_ctl);
 370     END_CS;
 371 }
 372
 373 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
 374 {
 375     struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
 376     struct r300_surface* surf;
 377     unsigned i;
 378     uint32_t rb3d_cctl = 0;
 379
 380     CS_LOCALS(r300);
 381
 382     BEGIN_CS(size);
 383
 384     /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
 385      * what we usually want. */
 386     if (r300->screen->caps.is_r500) {
 387         rb3d_cctl = R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE;
 388     }
 389     if (fb->nr_cbufs && r300->fb_multiwrite) {
 390         rb3d_cctl |= R300_RB3D_CCTL_NUM_MULTIWRITES(fb->nr_cbufs);
 391     }
 392
 393     OUT_CS_REG(R300_RB3D_CCTL, rb3d_cctl);
 394
 395     /* Set up colorbuffers. */
 396     for (i = 0; i < fb->nr_cbufs; i++) {
 397         surf = r300_surface(fb->cbufs[i]);
 398
 399         OUT_CS_REG(R300_RB3D_COLOROFFSET0 + (4 * i), surf->offset);
 400         OUT_CS_RELOC(surf);
 401
 402         OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), surf->pitch);
 403         OUT_CS_RELOC(surf);
 404     }
 405
 406     /* Set up the ZB part of the CBZB clear. */
 407     if (r300->cbzb_clear) {
 408         surf = r300_surface(fb->cbufs[0]);
 409
 410         OUT_CS_REG(R300_ZB_FORMAT, surf->cbzb_format);
 411
 412         OUT_CS_REG(R300_ZB_DEPTHOFFSET, surf->cbzb_midpoint_offset);
 413         OUT_CS_RELOC(surf);
 414
 415         OUT_CS_REG(R300_ZB_DEPTHPITCH, surf->cbzb_pitch);
 416         OUT_CS_RELOC(surf);
 417
 418         DBG(r300, DBG_CBZB,
 419             "CBZB clearing cbuf %08x %08x\n", surf->cbzb_format,
 420             surf->cbzb_pitch);
 421     }
 422     /* Set up a zbuffer. */
 423     else if (fb->zsbuf) {
 424         surf = r300_surface(fb->zsbuf);
 425
 426         OUT_CS_REG(R300_ZB_FORMAT, surf->format);
 427
 428         OUT_CS_REG(R300_ZB_DEPTHOFFSET, surf->offset);
 429         OUT_CS_RELOC(surf);
 430
 431         OUT_CS_REG(R300_ZB_DEPTHPITCH, surf->pitch);
 432         OUT_CS_RELOC(surf);
 433
 434         if (r300->hyperz_enabled) {
 435             /* HiZ RAM. */
 436             OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0);
 437             OUT_CS_REG(R300_ZB_HIZ_PITCH, surf->pitch_hiz);
 438             /* Z Mask RAM. (compressed zbuffer) */
 439             OUT_CS_REG(R300_ZB_ZMASK_OFFSET, 0);
 440             OUT_CS_REG(R300_ZB_ZMASK_PITCH, surf->pitch_zmask);
 441         }
 442     }
 443
 444     END_CS;
 445 }
 446
 447 void r300_emit_hyperz_state(struct r300_context *r300,
 448                             unsigned size, void *state)
 449 {
 450     struct r300_hyperz_state *z = state;
 451     CS_LOCALS(r300);
 452
 453     if (z->flush)
 454         WRITE_CS_TABLE(&z->cb_flush_begin, size);
 455     else
 456         WRITE_CS_TABLE(&z->cb_begin, size - 2);
 457 }
 458
 459 void r300_emit_hyperz_end(struct r300_context *r300)
 460 {
 461     struct r300_hyperz_state z =
 462             *(struct r300_hyperz_state*)r300->hyperz_state.state;
 463
 464     z.flush = 1;
 465     z.zb_bw_cntl = 0;
 466     z.zb_depthclearvalue = 0;
 467     z.sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 468     z.gb_z_peq_config = 0;
 469
 470     r300_emit_hyperz_state(r300, r300->hyperz_state.size, &z);
 471 }
 472
 473 void r300_emit_fb_state_pipelined(struct r300_context *r300,
 474                                   unsigned size, void *state)
 475 {
 476     struct pipe_framebuffer_state* fb =
 477             (struct pipe_framebuffer_state*)r300->fb_state.state;
 478     unsigned i, num_cbufs = fb->nr_cbufs;
 479     unsigned mspos0, mspos1;
 480     CS_LOCALS(r300);
 481
 482     /* If we use the multiwrite feature, the colorbuffers 2,3,4 must be
 483      * marked as UNUSED in the US block. */
 484     if (r300->fb_multiwrite) {
 485         num_cbufs = MIN2(num_cbufs, 1);
 486     }
 487
 488     BEGIN_CS(size);
 489
 490     /* Colorbuffer format in the US block.
 491      * (must be written after unpipelined regs) */
 492     OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
 493     for (i = 0; i < num_cbufs; i++) {
 494         OUT_CS(r300_surface(fb->cbufs[i])->format);
 495     }
 496     for (; i < 1; i++) {
 497         OUT_CS(R300_US_OUT_FMT_C4_8 |
 498                R300_C0_SEL_B | R300_C1_SEL_G |
 499                R300_C2_SEL_R | R300_C3_SEL_A);
 500     }
 501     for (; i < 4; i++) {
 502         OUT_CS(R300_US_OUT_FMT_UNUSED);
 503     }
 504
 505     /* Multisampling. Depends on framebuffer sample count.
 506      * These are pipelined regs and as such cannot be moved
 507      * to the AA state. */
 508     mspos0 = 0x66666666;
 509     mspos1 = 0x6666666;
 510
 511     if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
 512         /* Subsample placement. These may not be optimal. */
 513         switch (fb->cbufs[0]->texture->nr_samples) {
 514         case 2:
 515             mspos0 = 0x33996633;
 516             mspos1 = 0x6666663;
 517             break;
 518         case 3:
 519             mspos0 = 0x33936933;
 520             mspos1 = 0x6666663;
 521             break;
 522         case 4:
 523             mspos0 = 0x33939933;
 524             mspos1 = 0x3966663;
 525             break;
 526         case 6:
 527             mspos0 = 0x22a2aa22;
 528             mspos1 = 0x2a65672;
 529             break;
 530         default:
 531             debug_printf("r300: Bad number of multisamples!\n");
 532         }
 533     }
 534
 535     OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
 536     OUT_CS(mspos0);
 537     OUT_CS(mspos1);
 538     END_CS;
 539 }
 540
 541 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
 542 {
 543     struct r300_query *query = r300->query_current;
 544     CS_LOCALS(r300);
 545
 546     if (!query)
 547         return;
 548
 549     BEGIN_CS(size);
 550     if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
 551         OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 552     } else {
 553         OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
 554     }
 555     OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
 556     END_CS;
 557     query->begin_emitted = TRUE;
 558 }
 559
 560 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
 561                                            struct r300_query *query)
 562 {
 563     struct r300_capabilities* caps = &r300->screen->caps;
 564     CS_LOCALS(r300);
 565
 566     assert(caps->num_frag_pipes);
 567
 568     BEGIN_CS(6 * caps->num_frag_pipes + 2);
 569     /* I'm not so sure I like this switch, but it's hard to be elegant
 570      * when there's so many special cases...
 571      *
 572      * So here's the basic idea. For each pipe, enable writes to it only,
 573      * then put out the relocation for ZPASS_ADDR, taking into account a
 574      * 4-byte offset for each pipe. RV380 and older are special; they have
 575      * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
 576      * so there's a chipset cap for that. */
 577     switch (caps->num_frag_pipes) {
 578         case 4:
 579             /* pipe 3 only */
 580             OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
 581             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 3) * 4);
 582             OUT_CS_RELOC(r300->query_current);
 583         case 3:
 584             /* pipe 2 only */
 585             OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
 586             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 2) * 4);
 587             OUT_CS_RELOC(r300->query_current);
 588         case 2:
 589             /* pipe 1 only */
 590             /* As mentioned above, accomodate RV380 and older. */
 591             OUT_CS_REG(R300_SU_REG_DEST,
 592                     1 << (caps->high_second_pipe ? 3 : 1));
 593             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);
 594             OUT_CS_RELOC(r300->query_current);
 595         case 1:
 596             /* pipe 0 only */
 597             OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
 598             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 0) * 4);
 599             OUT_CS_RELOC(r300->query_current);
 600             break;
 601         default:
 602             fprintf(stderr, "r300: Implementation error: Chipset reports %d"
 603                     " pixel pipes!\n", caps->num_frag_pipes);
 604             abort();
 605     }
 606
 607     /* And, finally, reset it to normal... */
 608     OUT_CS_REG(R300_SU_REG_DEST, 0xF);
 609     END_CS;
 610 }
 611
 612 static void rv530_emit_query_end_single_z(struct r300_context *r300,
 613                                           struct r300_query *query)
 614 {
 615     CS_LOCALS(r300);
 616
 617     BEGIN_CS(8);
 618     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 619     OUT_CS_REG(R300_ZB_ZPASS_ADDR, query->num_results * 4);
 620     OUT_CS_RELOC(r300->query_current);
 621     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 622     END_CS;
 623 }
 624
 625 static void rv530_emit_query_end_double_z(struct r300_context *r300,
 626                                           struct r300_query *query)
 627 {
 628     CS_LOCALS(r300);
 629
 630     BEGIN_CS(14);
 631     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 632     OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 0) * 4);
 633     OUT_CS_RELOC(r300->query_current);
 634     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
 635     OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);
 636     OUT_CS_RELOC(r300->query_current);
 637     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 638     END_CS;
 639 }
 640
 641 void r300_emit_query_end(struct r300_context* r300)
 642 {
 643     struct r300_capabilities *caps = &r300->screen->caps;
 644     struct r300_query *query = r300->query_current;
 645
 646     if (!query)
 647         return;
 648
 649     if (query->begin_emitted == FALSE)
 650         return;
 651
 652     if (caps->family == CHIP_FAMILY_RV530) {
 653         if (caps->num_z_pipes == 2)
 654             rv530_emit_query_end_double_z(r300, query);
 655         else
 656             rv530_emit_query_end_single_z(r300, query);
 657     } else
 658         r300_emit_query_end_frag_pipes(r300, query);
 659
 660     query->begin_emitted = FALSE;
 661     query->num_results += query->num_pipes;
 662
 663     /* XXX grab all the results and reset the counter. */
 664     if (query->num_results >= query->buffer_size / 4 - 4) {
 665         query->num_results = (query->buffer_size / 4) / 2;
 666         fprintf(stderr, "r300: Rewinding OQBO...\n");
 667     }
 668 }
 669
 670 void r300_emit_invariant_state(struct r300_context *r300,
 671                                unsigned size, void *state)
 672 {
 673     CS_LOCALS(r300);
 674     WRITE_CS_TABLE(state, size);
 675 }
 676
 677 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
 678 {
 679     struct r300_rs_state* rs = state;
 680     CS_LOCALS(r300);
 681
 682     BEGIN_CS(size);
 683     OUT_CS_TABLE(rs->cb_main, RS_STATE_MAIN_SIZE);
 684     if (rs->polygon_offset_enable) {
 685         if (r300->zbuffer_bpp == 16) {
 686             OUT_CS_TABLE(rs->cb_poly_offset_zb16, 5);
 687         } else {
 688             OUT_CS_TABLE(rs->cb_poly_offset_zb24, 5);
 689         }
 690     }
 691     END_CS;
 692 }
 693
 694 void r300_emit_rs_block_state(struct r300_context* r300,
 695                               unsigned size, void* state)
 696 {
 697     struct r300_rs_block* rs = (struct r300_rs_block*)state;
 698     unsigned i;
 699     /* It's the same for both INST and IP tables */
 700     unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
 701     CS_LOCALS(r300);
 702
 703     if (DBG_ON(r300, DBG_RS_BLOCK)) {
 704         r500_dump_rs_block(rs);
 705
 706         fprintf(stderr, "r300: RS emit:\n");
 707
 708         for (i = 0; i < count; i++)
 709             fprintf(stderr, "    : ip %d: 0x%08x\n", i, rs->ip[i]);
 710
 711         for (i = 0; i < count; i++)
 712             fprintf(stderr, "    : inst %d: 0x%08x\n", i, rs->inst[i]);
 713
 714         fprintf(stderr, "    : count: 0x%08x inst_count: 0x%08x\n",
 715             rs->count, rs->inst_count);
 716     }
 717
 718     BEGIN_CS(size);
 719     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 720     OUT_CS(rs->vap_vtx_state_cntl);
 721     OUT_CS(rs->vap_vsm_vtx_assm);
 722     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 723     OUT_CS(rs->vap_out_vtx_fmt[0]);
 724     OUT_CS(rs->vap_out_vtx_fmt[1]);
 725     OUT_CS_REG_SEQ(R300_GB_ENABLE, 1);
 726     OUT_CS(rs->gb_enable);
 727
 728     if (r300->screen->caps.is_r500) {
 729         OUT_CS_REG_SEQ(R500_RS_IP_0, count);
 730     } else {
 731         OUT_CS_REG_SEQ(R300_RS_IP_0, count);
 732     }
 733     OUT_CS_TABLE(rs->ip, count);
 734
 735     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 736     OUT_CS(rs->count);
 737     OUT_CS(rs->inst_count);
 738
 739     if (r300->screen->caps.is_r500) {
 740         OUT_CS_REG_SEQ(R500_RS_INST_0, count);
 741     } else {
 742         OUT_CS_REG_SEQ(R300_RS_INST_0, count);
 743     }
 744     OUT_CS_TABLE(rs->inst, count);
 745     END_CS;
 746 }
 747
 748 void r300_emit_scissor_state(struct r300_context* r300,
 749                              unsigned size, void* state)
 750 {
 751     struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
 752     CS_LOCALS(r300);
 753
 754     BEGIN_CS(size);
 755     OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
 756     if (r300->screen->caps.is_r500) {
 757         OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
 758                (scissor->miny << R300_CLIPRECT_Y_SHIFT));
 759         OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
 760                ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
 761     } else {
 762         OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
 763                ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
 764         OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
 765                ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
 766     }
 767     END_CS;
 768 }
 769
 770 void r300_emit_textures_state(struct r300_context *r300,
 771                               unsigned size, void *state)
 772 {
 773     struct r300_textures_state *allstate = (struct r300_textures_state*)state;
 774     struct r300_texture_sampler_state *texstate;
 775     struct r300_resource *tex;
 776     unsigned i;
 777     boolean has_us_format = r300->screen->caps.has_us_format;
 778     CS_LOCALS(r300);
 779
 780     BEGIN_CS(size);
 781     OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
 782
 783     for (i = 0; i < allstate->count; i++) {
 784         if ((1 << i) & allstate->tx_enable) {
 785             texstate = &allstate->regs[i];
 786             tex = r300_resource(allstate->sampler_views[i]->base.texture);
 787
 788             OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
 789             OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
 790             OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
 791                        texstate->border_color);
 792
 793             OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
 794             OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
 795             OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
 796
 797             OUT_CS_REG(R300_TX_OFFSET_0 + (i * 4), texstate->format.tile_config);
 798             OUT_CS_RELOC(tex);
 799
 800             if (has_us_format) {
 801                 OUT_CS_REG(R500_US_FORMAT0_0 + (i * 4),
 802                            texstate->format.us_format0);
 803             }
 804         }
 805     }
 806     END_CS;
 807 }
 808
 809 void r300_emit_vertex_arrays(struct r300_context* r300, int offset,
 810                              boolean indexed, int instance_id)
 811 {
 812     struct pipe_vertex_buffer *vbuf = r300->vbuf_mgr->vertex_buffer;
 813     struct pipe_resource **valid_vbuf = r300->vbuf_mgr->real_vertex_buffer;
 814     struct pipe_vertex_element *velem = r300->velems->velem;
 815     struct r300_resource *buf;
 816     int i;
 817     unsigned vertex_array_count = r300->velems->count;
 818     unsigned real_vertex_array_count = vertex_array_count +
 819                 (vertex_array_count == 16 || instance_id == -1 ? 0 : 1);
 820     unsigned packet_size = (real_vertex_array_count * 3 + 1) / 2;
 821     struct pipe_vertex_buffer *vb1, *vb2;
 822     unsigned *hw_format_size = r300->velems->format_size;
 823     unsigned size1, size2, offset1, offset2, stride1, stride2;
 824     CS_LOCALS(r300);
 825
 826     BEGIN_CS(2 + packet_size + real_vertex_array_count * 2);
 827     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
 828     OUT_CS(real_vertex_array_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 829
 830     if (instance_id == -1) {
 831         /* Non-instanced arrays. This ignores instance_divisor and instance_id. */
 832         for (i = 0; i < vertex_array_count - 1; i += 2) {
 833             vb1 = &vbuf[velem[i].vertex_buffer_index];
 834             vb2 = &vbuf[velem[i+1].vertex_buffer_index];
 835             size1 = hw_format_size[i];
 836             size2 = hw_format_size[i+1];
 837
 838             OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
 839                    R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
 840             OUT_CS(vb1->buffer_offset + velem[i].src_offset   + offset * vb1->stride);
 841             OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
 842         }
 843
 844         if (vertex_array_count & 1) {
 845             vb1 = &vbuf[velem[i].vertex_buffer_index];
 846             size1 = hw_format_size[i];
 847
 848             OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
 849             OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
 850         }
 851
 852         for (i = 0; i < vertex_array_count; i++) {
 853             buf = r300_resource(valid_vbuf[velem[i].vertex_buffer_index]);
 854             OUT_CS_RELOC(buf);
 855         }
 856     } else {
 857         /* Instanced arrays. */
 858         for (i = 0; i < vertex_array_count - 1; i += 2) {
 859             vb1 = &vbuf[velem[i].vertex_buffer_index];
 860             vb2 = &vbuf[velem[i+1].vertex_buffer_index];
 861             size1 = hw_format_size[i];
 862             size2 = hw_format_size[i+1];
 863
 864             if (velem[i].instance_divisor) {
 865                 stride1 = 0;
 866                 offset1 = vb1->buffer_offset + velem[i].src_offset +
 867                           (instance_id / velem[i].instance_divisor) * vb1->stride;
 868             } else {
 869                 stride1 = vb1->stride;
 870                 offset1 = vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride;
 871             }
 872             if (velem[i+1].instance_divisor) {
 873                 stride2 = 0;
 874                 offset2 = vb2->buffer_offset + velem[i+1].src_offset +
 875                           (instance_id / velem[i+1].instance_divisor) * vb2->stride;
 876             } else {
 877                 stride2 = vb2->stride;
 878                 offset2 = vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride;
 879             }
 880
 881             OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(stride1) |
 882                    R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(stride2));
 883             OUT_CS(offset1);
 884             OUT_CS(offset2);
 885         }
 886
 887         if (vertex_array_count & 1) {
 888             vb1 = &vbuf[velem[i].vertex_buffer_index];
 889             size1 = hw_format_size[i];
 890
 891             if (velem[i].instance_divisor) {
 892                 stride1 = 0;
 893                 offset1 = vb1->buffer_offset + velem[i].src_offset +
 894                           (instance_id / velem[i].instance_divisor) * vb1->stride;
 895             } else {
 896                 stride1 = vb1->stride;
 897                 offset1 = vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride;
 898             }
 899
 900             /* Insert vertex buffer containing InstanceID. */
 901             if (vertex_array_count < 16) {
 902                 OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(stride1) |
 903                        R300_VBPNTR_SIZE1(4));
 904                 OUT_CS(offset1);
 905                 OUT_CS(4 * instance_id);
 906             } else {
 907                 OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(stride1));
 908                 OUT_CS(offset1);
 909             }
 910         } else if (vertex_array_count < 16) {
 911             /* Insert vertex buffer containing InstanceID. */
 912             OUT_CS(R300_VBPNTR_SIZE0(4));
 913             OUT_CS(4 * instance_id);
 914         }
 915
 916         for (i = 0; i < vertex_array_count; i++) {
 917             buf = r300_resource(valid_vbuf[velem[i].vertex_buffer_index]);
 918             OUT_CS_RELOC(buf);
 919         }
 920         if (vertex_array_count < 16)
 921             OUT_CS_RELOC(r300->vb_instanceid);
 922     }
 923     END_CS;
 924 }
 925
 926 void r300_emit_vertex_arrays_swtcl(struct r300_context *r300, boolean indexed)
 927 {
 928     CS_LOCALS(r300);
 929
 930     DBG(r300, DBG_SWTCL, "r300: Preparing vertex buffer %p for render, "
 931             "vertex size %d\n", r300->vbo,
 932             r300->vertex_info.size);
 933     /* Set the pointer to our vertex buffer. The emitted values are this:
 934      * PACKET3 [3D_LOAD_VBPNTR]
 935      * COUNT   [1]
 936      * FORMAT  [size | stride << 8]
 937      * OFFSET  [offset into BO]
 938      * VBPNTR  [relocated BO]
 939      */
 940     BEGIN_CS(7);
 941     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 942     OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 943     OUT_CS(r300->vertex_info.size |
 944             (r300->vertex_info.size << 8));
 945     OUT_CS(r300->draw_vbo_offset);
 946     OUT_CS(0);
 947     OUT_CS_RELOC(r300_resource(r300->vbo));
 948     END_CS;
 949 }
 950
 951 void r300_emit_vertex_stream_state(struct r300_context* r300,
 952                                    unsigned size, void* state)
 953 {
 954     struct r300_vertex_element_state *velems =
 955         (struct r300_vertex_element_state*)state;
 956     struct r300_vertex_stream_state *streams;
 957     unsigned i;
 958     CS_LOCALS(r300);
 959
 960     if (r300->screen->caps.has_tcl && r300->instancing_enabled) {
 961         streams = &velems->vertex_stream_instanced;
 962     } else {
 963         streams = &velems->vertex_stream;
 964     }
 965
 966     if (DBG_ON(r300, DBG_PSC)) {
 967         fprintf(stderr, "r300: PSC emit:\n");
 968
 969         for (i = 0; i < streams->count; i++) {
 970             fprintf(stderr, "    : prog_stream_cntl%d: 0x%08x\n", i,
 971                    streams->vap_prog_stream_cntl[i]);
 972         }
 973
 974         for (i = 0; i < streams->count; i++) {
 975             fprintf(stderr, "    : prog_stream_cntl_ext%d: 0x%08x\n", i,
 976                    streams->vap_prog_stream_cntl_ext[i]);
 977         }
 978     }
 979
 980     BEGIN_CS((1 + streams->count) * 2);
 981     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
 982     OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
 983     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
 984     OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
 985     END_CS;
 986 }
 987
 988 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
 989 {
 990     CS_LOCALS(r300);
 991
 992     BEGIN_CS(size);
 993     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 994     END_CS;
 995 }
 996
 997 void r300_emit_vap_invariant_state(struct r300_context *r300,
 998                                    unsigned size, void *state)
 999 {
1000     CS_LOCALS(r300);
1001     WRITE_CS_TABLE(state, size);
1002 }
1003
1004 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
1005 {
1006     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
1007     struct r300_vertex_program_code* code = &vs->code;
1008     struct r300_screen* r300screen = r300->screen;
1009     unsigned instruction_count = code->length / 4;
1010
1011     unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
1012     unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
1013     unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
1014     unsigned temp_count = MAX2(code->num_temporaries, 1);
1015
1016     unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
1017                                   vtx_mem_size / output_count, 10);
1018     unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 5);
1019
1020     CS_LOCALS(r300);
1021
1022     BEGIN_CS(size);
1023
1024     /* R300_VAP_PVS_CODE_CNTL_0
1025      * R300_VAP_PVS_CONST_CNTL
1026      * R300_VAP_PVS_CODE_CNTL_1
1027      * See the r5xx docs for instructions on how to use these. */
1028     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) |
1029                R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
1030                R300_PVS_LAST_INST(instruction_count - 1));
1031     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, instruction_count - 1);
1032
1033     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
1034     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
1035     OUT_CS_TABLE(code->body.d, code->length);
1036
1037     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
1038             R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
1039             R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
1040             R300_PVS_VF_MAX_VTX_NUM(12) |
1041             (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
1042
1043     /* Emit flow control instructions. */
1044     if (code->num_fc_ops) {
1045
1046         OUT_CS_REG(R300_VAP_PVS_FLOW_CNTL_OPC, code->fc_ops);
1047         if (r300screen->caps.is_r500) {
1048             OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, code->num_fc_ops * 2);
1049             OUT_CS_TABLE(code->fc_op_addrs.r500, code->num_fc_ops * 2);
1050         } else {
1051             OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_ADDRS_0, code->num_fc_ops);
1052             OUT_CS_TABLE(code->fc_op_addrs.r300, code->num_fc_ops);
1053         }
1054         OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, code->num_fc_ops);
1055         OUT_CS_TABLE(code->fc_loop_index, code->num_fc_ops);
1056     }
1057
1058     END_CS;
1059 }
1060
1061 void r300_emit_vs_constants(struct r300_context* r300,
1062                             unsigned size, void *state)
1063 {
1064     unsigned count =
1065         ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
1066     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
1067     struct r300_vertex_shader *vs = (struct r300_vertex_shader*)r300->vs_state.state;
1068     unsigned i;
1069     int imm_first = vs->externals_count;
1070     int imm_end = vs->code.constants.Count;
1071     int imm_count = vs->immediates_count;
1072     CS_LOCALS(r300);
1073
1074     BEGIN_CS(size);
1075     OUT_CS_REG(R300_VAP_PVS_CONST_CNTL,
1076                R300_PVS_CONST_BASE_OFFSET(buf->buffer_base) |
1077                R300_PVS_MAX_CONST_ADDR(MAX2(imm_end - 1, 0)));
1078     if (vs->externals_count) {
1079         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
1080                    (r300->screen->caps.is_r500 ?
1081                    R500_PVS_CONST_START : R300_PVS_CONST_START) + buf->buffer_base);
1082         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
1083         if (buf->remap_table){
1084             for (i = 0; i < count; i++) {
1085                 uint32_t *data = &buf->ptr[buf->remap_table[i]*4];
1086                 OUT_CS_TABLE(data, 4);
1087             }
1088         } else {
1089             OUT_CS_TABLE(buf->ptr, count * 4);
1090         }
1091     }
1092
1093     /* Emit immediates. */
1094     if (imm_count) {
1095         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
1096                    (r300->screen->caps.is_r500 ?
1097                    R500_PVS_CONST_START : R300_PVS_CONST_START) +
1098                    buf->buffer_base + imm_first);
1099         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
1100         for (i = imm_first; i < imm_end; i++) {
1101             const float *data = vs->code.constants.Constants[i].u.Immediate;
1102             OUT_CS_TABLE(data, 4);
1103         }
1104     }
1105     END_CS;
1106 }
1107
1108 void r300_emit_viewport_state(struct r300_context* r300,
1109                               unsigned size, void* state)
1110 {
1111     struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
1112     CS_LOCALS(r300);
1113
1114     BEGIN_CS(size);
1115     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
1116     OUT_CS_TABLE(&viewport->xscale, 6);
1117     OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
1118     END_CS;
1119 }
1120
1121 void r300_emit_hiz_clear(struct r300_context *r300, unsigned size, void *state)
1122 {
1123     struct pipe_framebuffer_state *fb =
1124         (struct pipe_framebuffer_state*)r300->fb_state.state;
1125     struct r300_resource* tex;
1126     CS_LOCALS(r300);
1127
1128     tex = r300_resource(fb->zsbuf->texture);
1129
1130     BEGIN_CS(size);
1131     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_HIZ, 2);
1132     OUT_CS(0);
1133     OUT_CS(tex->tex.hiz_dwords[fb->zsbuf->u.tex.level]);
1134     OUT_CS(r300->hiz_clear_value);
1135     END_CS;
1136
1137     /* Mark the current zbuffer's hiz ram as in use. */
1138     r300->hiz_in_use = TRUE;
1139     r300->hiz_func = HIZ_FUNC_NONE;
1140     r300_mark_atom_dirty(r300, &r300->hyperz_state);
1141 }
1142
1143 void r300_emit_zmask_clear(struct r300_context *r300, unsigned size, void *state)
1144 {
1145     struct pipe_framebuffer_state *fb =
1146         (struct pipe_framebuffer_state*)r300->fb_state.state;
1147     struct r300_resource *tex;
1148     CS_LOCALS(r300);
1149
1150     tex = r300_resource(fb->zsbuf->texture);
1151
1152     BEGIN_CS(size);
1153     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_ZMASK, 2);
1154     OUT_CS(0);
1155     OUT_CS(tex->tex.zmask_dwords[fb->zsbuf->u.tex.level]);
1156     OUT_CS(0);
1157     END_CS;
1158
1159     /* Mark the current zbuffer's zmask as in use. */
1160     r300->zmask_in_use = TRUE;
1161     r300_mark_atom_dirty(r300, &r300->hyperz_state);
1162 }
1163
1164 void r300_emit_ztop_state(struct r300_context* r300,
1165                           unsigned size, void* state)
1166 {
1167     struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
1168     CS_LOCALS(r300);
1169
1170     BEGIN_CS(size);
1171     OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
1172     END_CS;
1173 }
1174
1175 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
1176 {
1177     CS_LOCALS(r300);
1178
1179     BEGIN_CS(size);
1180     OUT_CS_REG(R300_TX_INVALTAGS, 0);
1181     END_CS;
1182 }
1183
1184 boolean r300_emit_buffer_validate(struct r300_context *r300,
1185                                   boolean do_validate_vertex_buffers,
1186                                   struct pipe_resource *index_buffer)
1187 {
1188     struct pipe_framebuffer_state *fb =
1189         (struct pipe_framebuffer_state*)r300->fb_state.state;
1190     struct r300_textures_state *texstate =
1191         (struct r300_textures_state*)r300->textures_state.state;
1192     struct r300_resource *tex;
1193     unsigned i;
1194     boolean flushed = FALSE;
1195
1196 validate:
1197     if (r300->fb_state.dirty) {
1198         /* Color buffers... */
1199         for (i = 0; i < fb->nr_cbufs; i++) {
1200             tex = r300_resource(fb->cbufs[i]->texture);
1201             assert(tex && tex->buf && "cbuf is marked, but NULL!");
1202             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, 0,
1203                                     r300_surface(fb->cbufs[i])->domain);
1204         }
1205         /* ...depth buffer... */
1206         if (fb->zsbuf) {
1207             tex = r300_resource(fb->zsbuf->texture);
1208             assert(tex && tex->buf && "zsbuf is marked, but NULL!");
1209             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, 0,
1210                                     r300_surface(fb->zsbuf)->domain);
1211         }
1212     }
1213     if (r300->textures_state.dirty) {
1214         /* ...textures... */
1215         for (i = 0; i < texstate->count; i++) {
1216             if (!(texstate->tx_enable & (1 << i))) {
1217                 continue;
1218             }
1219
1220             tex = r300_resource(texstate->sampler_views[i]->base.texture);
1221             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, tex->domain, 0);
1222         }
1223     }
1224     /* ...occlusion query buffer... */
1225     if (r300->query_current)
1226         r300->rws->cs_add_reloc(r300->cs, r300->query_current->cs_buf,
1227                                 0, r300->query_current->domain);
1228     /* ...vertex buffer for SWTCL path... */
1229     if (r300->vbo)
1230         r300->rws->cs_add_reloc(r300->cs, r300_resource(r300->vbo)->cs_buf,
1231                                 r300_resource(r300->vbo)->domain, 0);
1232     /* ...vertex buffers for HWTCL path... */
1233     if (do_validate_vertex_buffers && r300->vertex_arrays_dirty) {
1234         struct pipe_resource **buf = r300->vbuf_mgr->real_vertex_buffer;
1235         struct pipe_resource **last = r300->vbuf_mgr->real_vertex_buffer +
1236                                       r300->vbuf_mgr->nr_real_vertex_buffers;
1237         for (; buf != last; buf++) {
1238             if (!*buf)
1239                 continue;
1240
1241             r300->rws->cs_add_reloc(r300->cs, r300_resource(*buf)->cs_buf,
1242                                     r300_resource(*buf)->domain, 0);
1243         }
1244         if (r300->instancing_enabled) {
1245             r300->rws->cs_add_reloc(r300->cs, r300->vb_instanceid->cs_buf,
1246                                     r300->vb_instanceid->domain, 0);
1247         }
1248     }
1249     /* ...and index buffer for HWTCL path. */
1250     if (index_buffer)
1251         r300->rws->cs_add_reloc(r300->cs, r300_resource(index_buffer)->cs_buf,
1252                                 r300_resource(index_buffer)->domain, 0);
1253
1254     /* Now do the validation. */
1255     if (!r300->rws->cs_validate(r300->cs)) {
1256         /* Ooops, an infinite loop, give up. */
1257         if (flushed)
1258             return FALSE;
1259
1260         r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL);
1261         flushed = TRUE;
1262         goto validate;
1263     }
1264
1265     return TRUE;
1266 }
1267
1268 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
1269 {
1270     struct r300_atom* atom;
1271     unsigned dwords = 0;
1272
1273     foreach_dirty_atom(r300, atom) {
1274         if (atom->dirty) {
1275             dwords += atom->size;
1276         }
1277     }
1278
1279     /* let's reserve some more, just in case */
1280     dwords += 32;
1281
1282     return dwords;
1283 }
1284
1285 unsigned r300_get_num_cs_end_dwords(struct r300_context *r300)
1286 {
1287     unsigned dwords = 0;
1288
1289     /* Emitted in flush. */
1290     dwords += 26; /* emit_query_end */
1291     dwords += r300->hyperz_state.size + 2; /* emit_hyperz_end + zcache flush */
1292     if (r300->screen->caps.is_r500)
1293         dwords += 2;
1294
1295     return dwords;
1296 }
1297
1298 /* Emit all dirty state. */
1299 void r300_emit_dirty_state(struct r300_context* r300)
1300 {
1301     struct r300_atom *atom;
1302
1303     foreach_dirty_atom(r300, atom) {
1304         if (atom->dirty) {
1305             atom->emit(r300, atom->size, atom->state);
1306             atom->dirty = FALSE;
1307         }
1308     }
1309
1310     r300->first_dirty = NULL;
1311     r300->last_dirty = NULL;
1312     r300->dirty_hw++;
1313 }