src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 /* r300_emit: Functions for emitting state. */
  25
  26 #include "util/u_format.h"
  27 #include "util/u_math.h"
  28 #include "util/u_mm.h"
  29
  30 #include "r300_context.h"
  31 #include "r300_cb.h"
  32 #include "r300_cs.h"
  33 #include "r300_emit.h"
  34 #include "r300_fs.h"
  35 #include "r300_screen.h"
  36 #include "r300_screen_buffer.h"
  37 #include "r300_vs.h"
  38
  39 void r300_emit_blend_state(struct r300_context* r300,
  40                            unsigned size, void* state)
  41 {
  42     struct r300_blend_state* blend = (struct r300_blend_state*)state;
  43     struct pipe_framebuffer_state* fb =
  44         (struct pipe_framebuffer_state*)r300->fb_state.state;
  45     CS_LOCALS(r300);
  46
  47     if (fb->nr_cbufs) {
  48         WRITE_CS_TABLE(blend->cb, size);
  49     } else {
  50         WRITE_CS_TABLE(blend->cb_no_readwrite, size);
  51     }
  52 }
  53
  54 void r300_emit_blend_color_state(struct r300_context* r300,
  55                                  unsigned size, void* state)
  56 {
  57     struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
  58     CS_LOCALS(r300);
  59
  60     WRITE_CS_TABLE(bc->cb, size);
  61 }
  62
  63 void r300_emit_clip_state(struct r300_context* r300,
  64                           unsigned size, void* state)
  65 {
  66     struct r300_clip_state* clip = (struct r300_clip_state*)state;
  67     CS_LOCALS(r300);
  68
  69     WRITE_CS_TABLE(clip->cb, size);
  70 }
  71
  72 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
  73 {
  74     struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
  75     struct pipe_framebuffer_state* fb =
  76         (struct pipe_framebuffer_state*)r300->fb_state.state;
  77     CS_LOCALS(r300);
  78
  79     if (fb->zsbuf) {
  80         WRITE_CS_TABLE(&dsa->cb_begin, size);
  81     } else {
  82         WRITE_CS_TABLE(dsa->cb_no_readwrite, size);
  83     }
  84 }
  85
  86 static void get_rc_constant_state(
  87     float vec[4],
  88     struct r300_context * r300,
  89     struct rc_constant * constant)
  90 {
  91     struct r300_textures_state* texstate = r300->textures_state.state;
  92     struct r300_resource *tex;
  93
  94     assert(constant->Type == RC_CONSTANT_STATE);
  95
  96     /* vec should either be (0, 0, 0, 1), which should be a relatively safe
  97      * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
  98      * state factors. */
  99
 100     switch (constant->u.State[0]) {
 101         /* Factor for converting rectangle coords to
 102          * normalized coords. Should only show up on non-r500. */
 103         case RC_STATE_R300_TEXRECT_FACTOR:
 104             tex = r300_resource(texstate->sampler_views[constant->u.State[1]]->base.texture);
 105             vec[0] = 1.0 / tex->tex.width0;
 106             vec[1] = 1.0 / tex->tex.height0;
 107             vec[2] = 0;
 108             vec[3] = 1;
 109             break;
 110
 111         case RC_STATE_R300_TEXSCALE_FACTOR:
 112             tex = r300_resource(texstate->sampler_views[constant->u.State[1]]->base.texture);
 113             /* Add a small number to the texture size to work around rounding errors in hw. */
 114             vec[0] = tex->b.b.b.width0  / (tex->tex.width0  + 0.001f);
 115             vec[1] = tex->b.b.b.height0 / (tex->tex.height0 + 0.001f);
 116             vec[2] = tex->b.b.b.depth0  / (tex->tex.depth0  + 0.001f);
 117             vec[3] = 1;
 118             break;
 119
 120         case RC_STATE_R300_VIEWPORT_SCALE:
 121             vec[0] = r300->viewport.scale[0];
 122             vec[1] = r300->viewport.scale[1];
 123             vec[2] = r300->viewport.scale[2];
 124             vec[3] = 1;
 125             break;
 126
 127         case RC_STATE_R300_VIEWPORT_OFFSET:
 128             vec[0] = r300->viewport.translate[0];
 129             vec[1] = r300->viewport.translate[1];
 130             vec[2] = r300->viewport.translate[2];
 131             vec[3] = 1;
 132             break;
 133
 134         default:
 135             fprintf(stderr, "r300: Implementation error: "
 136                 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
 137             vec[0] = 0;
 138             vec[1] = 0;
 139             vec[2] = 0;
 140             vec[3] = 1;
 141     }
 142 }
 143
 144 /* Convert a normal single-precision float into the 7.16 format
 145  * used by the R300 fragment shader.
 146  */
 147 uint32_t pack_float24(float f)
 148 {
 149     union {
 150         float fl;
 151         uint32_t u;
 152     } u;
 153     float mantissa;
 154     int exponent;
 155     uint32_t float24 = 0;
 156
 157     if (f == 0.0)
 158         return 0;
 159
 160     u.fl = f;
 161
 162     mantissa = frexpf(f, &exponent);
 163
 164     /* Handle -ve */
 165     if (mantissa < 0) {
 166         float24 |= (1 << 23);
 167         mantissa = mantissa * -1.0;
 168     }
 169     /* Handle exponent, bias of 63 */
 170     exponent += 62;
 171     float24 |= (exponent << 16);
 172     /* Kill 7 LSB of mantissa */
 173     float24 |= (u.u & 0x7FFFFF) >> 7;
 174
 175     return float24;
 176 }
 177
 178 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
 179 {
 180     struct r300_fragment_shader *fs = r300_fs(r300);
 181     CS_LOCALS(r300);
 182
 183     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 184 }
 185
 186 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 187 {
 188     struct r300_fragment_shader *fs = r300_fs(r300);
 189     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 190     unsigned count = fs->shader->externals_count;
 191     unsigned i, j;
 192     CS_LOCALS(r300);
 193
 194     if (count == 0)
 195         return;
 196
 197     BEGIN_CS(size);
 198     OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count * 4);
 199     if (buf->remap_table){
 200         for (i = 0; i < count; i++) {
 201             float *data = (float*)&buf->ptr[buf->remap_table[i]*4];
 202             for (j = 0; j < 4; j++)
 203                 OUT_CS(pack_float24(data[j]));
 204         }
 205     } else {
 206         for (i = 0; i < count; i++)
 207             for (j = 0; j < 4; j++)
 208                 OUT_CS(pack_float24(*(float*)&buf->ptr[i*4+j]));
 209     }
 210
 211     END_CS;
 212 }
 213
 214 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 215 {
 216     struct r300_fragment_shader *fs = r300_fs(r300);
 217     struct rc_constant_list *constants = &fs->shader->code.constants;
 218     unsigned i;
 219     unsigned count = fs->shader->rc_state_count;
 220     unsigned first = fs->shader->externals_count;
 221     unsigned end = constants->Count;
 222     unsigned j;
 223     CS_LOCALS(r300);
 224
 225     if (count == 0)
 226         return;
 227
 228     BEGIN_CS(size);
 229     for(i = first; i < end; ++i) {
 230         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 231             float data[4];
 232
 233             get_rc_constant_state(data, r300, &constants->Constants[i]);
 234
 235             OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
 236             for (j = 0; j < 4; j++)
 237                 OUT_CS(pack_float24(data[j]));
 238         }
 239     }
 240     END_CS;
 241 }
 242
 243 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
 244 {
 245     struct r300_fragment_shader *fs = r300_fs(r300);
 246     CS_LOCALS(r300);
 247
 248     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 249 }
 250
 251 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 252 {
 253     struct r300_fragment_shader *fs = r300_fs(r300);
 254     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 255     unsigned count = fs->shader->externals_count;
 256     CS_LOCALS(r300);
 257
 258     if (count == 0)
 259         return;
 260
 261     BEGIN_CS(size);
 262     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 263     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count * 4);
 264     if (buf->remap_table){
 265         for (unsigned i = 0; i < count; i++) {
 266             uint32_t *data = &buf->ptr[buf->remap_table[i]*4];
 267             OUT_CS_TABLE(data, 4);
 268         }
 269     } else {
 270         OUT_CS_TABLE(buf->ptr, count * 4);
 271     }
 272     END_CS;
 273 }
 274
 275 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 276 {
 277     struct r300_fragment_shader *fs = r300_fs(r300);
 278     struct rc_constant_list *constants = &fs->shader->code.constants;
 279     unsigned i;
 280     unsigned count = fs->shader->rc_state_count;
 281     unsigned first = fs->shader->externals_count;
 282     unsigned end = constants->Count;
 283     CS_LOCALS(r300);
 284
 285     if (count == 0)
 286         return;
 287
 288     BEGIN_CS(size);
 289     for(i = first; i < end; ++i) {
 290         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 291             float data[4];
 292
 293             get_rc_constant_state(data, r300, &constants->Constants[i]);
 294
 295             OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 296                        R500_GA_US_VECTOR_INDEX_TYPE_CONST |
 297                        (i & R500_GA_US_VECTOR_INDEX_MASK));
 298             OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
 299             OUT_CS_TABLE(data, 4);
 300         }
 301     }
 302     END_CS;
 303 }
 304
 305 void r300_emit_gpu_flush(struct r300_context *r300, unsigned size, void *state)
 306 {
 307     struct r300_gpu_flush *gpuflush = (struct r300_gpu_flush*)state;
 308     struct pipe_framebuffer_state* fb =
 309             (struct pipe_framebuffer_state*)r300->fb_state.state;
 310     uint32_t height = fb->height;
 311     uint32_t width = fb->width;
 312     CS_LOCALS(r300);
 313
 314     if (r300->cbzb_clear) {
 315         struct r300_surface *surf = r300_surface(fb->cbufs[0]);
 316
 317         height = surf->cbzb_height;
 318         width = surf->cbzb_width;
 319     }
 320
 321     DBG(r300, DBG_SCISSOR,
 322         "r300: Scissor width: %i, height: %i, CBZB clear: %s\n",
 323         width, height, r300->cbzb_clear ? "YES" : "NO");
 324
 325     BEGIN_CS(size);
 326
 327     /* Set up scissors.
 328      * By writing to the SC registers, SC & US assert idle. */
 329     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 330     if (r300->screen->caps.is_r500) {
 331         OUT_CS(0);
 332         OUT_CS(((width  - 1) << R300_SCISSORS_X_SHIFT) |
 333                ((height - 1) << R300_SCISSORS_Y_SHIFT));
 334     } else {
 335         OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
 336                (1440 << R300_SCISSORS_Y_SHIFT));
 337         OUT_CS(((width  + 1440-1) << R300_SCISSORS_X_SHIFT) |
 338                ((height + 1440-1) << R300_SCISSORS_Y_SHIFT));
 339     }
 340
 341     /* Flush CB & ZB caches and wait until the 3D engine is idle and clean. */
 342     OUT_CS_TABLE(gpuflush->cb_flush_clean, 6);
 343     END_CS;
 344 }
 345
 346 void r300_emit_aa_state(struct r300_context *r300, unsigned size, void *state)
 347 {
 348     struct r300_aa_state *aa = (struct r300_aa_state*)state;
 349     CS_LOCALS(r300);
 350
 351     BEGIN_CS(size);
 352     OUT_CS_REG(R300_GB_AA_CONFIG, aa->aa_config);
 353
 354     if (aa->dest) {
 355         OUT_CS_REG(R300_RB3D_AARESOLVE_OFFSET, aa->dest->offset);
 356         OUT_CS_RELOC(aa->dest);
 357         OUT_CS_REG(R300_RB3D_AARESOLVE_PITCH, aa->dest->pitch);
 358     }
 359
 360     OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, aa->aaresolve_ctl);
 361     END_CS;
 362 }
 363
 364 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
 365 {
 366     struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
 367     struct r300_surface* surf;
 368     unsigned i;
 369     boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
 370     uint32_t rb3d_cctl = 0;
 371
 372     CS_LOCALS(r300);
 373
 374     BEGIN_CS(size);
 375
 376     /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
 377      * what we usually want. */
 378     if (r300->screen->caps.is_r500) {
 379         rb3d_cctl = R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE;
 380     }
 381     if (fb->nr_cbufs &&
 382         r300_fragment_shader_writes_all(r300_fs(r300))) {
 383         rb3d_cctl |= R300_RB3D_CCTL_NUM_MULTIWRITES(fb->nr_cbufs);
 384     }
 385
 386     OUT_CS_REG(R300_RB3D_CCTL, rb3d_cctl);
 387
 388     /* Set up colorbuffers. */
 389     for (i = 0; i < fb->nr_cbufs; i++) {
 390         surf = r300_surface(fb->cbufs[i]);
 391
 392         OUT_CS_REG(R300_RB3D_COLOROFFSET0 + (4 * i), surf->offset);
 393         OUT_CS_RELOC(surf);
 394
 395         OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), surf->pitch);
 396         OUT_CS_RELOC(surf);
 397     }
 398
 399     /* Set up the ZB part of the CBZB clear. */
 400     if (r300->cbzb_clear) {
 401         surf = r300_surface(fb->cbufs[0]);
 402
 403         OUT_CS_REG(R300_ZB_FORMAT, surf->cbzb_format);
 404
 405         OUT_CS_REG(R300_ZB_DEPTHOFFSET, surf->cbzb_midpoint_offset);
 406         OUT_CS_RELOC(surf);
 407
 408         OUT_CS_REG(R300_ZB_DEPTHPITCH, surf->cbzb_pitch);
 409         OUT_CS_RELOC(surf);
 410
 411         DBG(r300, DBG_CBZB,
 412             "CBZB clearing cbuf %08x %08x\n", surf->cbzb_format,
 413             surf->cbzb_pitch);
 414     }
 415     /* Set up a zbuffer. */
 416     else if (fb->zsbuf) {
 417         surf = r300_surface(fb->zsbuf);
 418
 419         OUT_CS_REG(R300_ZB_FORMAT, surf->format);
 420
 421         OUT_CS_REG(R300_ZB_DEPTHOFFSET, surf->offset);
 422         OUT_CS_RELOC(surf);
 423
 424         OUT_CS_REG(R300_ZB_DEPTHPITCH, surf->pitch);
 425         OUT_CS_RELOC(surf);
 426
 427         if (can_hyperz) {
 428             uint32_t surf_pitch;
 429             struct r300_resource *tex;
 430             int level = surf->base.u.tex.level;
 431             tex = r300_resource(surf->base.texture);
 432
 433             surf_pitch = surf->pitch & R300_DEPTHPITCH_MASK;
 434
 435             /* HiZ RAM. */
 436             if (r300->screen->caps.hiz_ram) {
 437                 if (tex->hiz_mem[level]) {
 438                     OUT_CS_REG(R300_ZB_HIZ_OFFSET, tex->hiz_mem[level]->ofs << 2);
 439                     OUT_CS_REG(R300_ZB_HIZ_PITCH, surf_pitch);
 440                 } else {
 441                     OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0);
 442                     OUT_CS_REG(R300_ZB_HIZ_PITCH, 0);
 443                 }
 444             }
 445
 446             /* Z Mask RAM. (compressed zbuffer) */
 447             OUT_CS_REG(R300_ZB_ZMASK_OFFSET, 0);
 448             OUT_CS_REG(R300_ZB_ZMASK_PITCH, surf_pitch);
 449         }
 450     }
 451
 452     END_CS;
 453 }
 454
 455 void r300_emit_hyperz_state(struct r300_context *r300,
 456                             unsigned size, void *state)
 457 {
 458     struct r300_hyperz_state *z = state;
 459     CS_LOCALS(r300);
 460
 461     if (z->flush)
 462         WRITE_CS_TABLE(&z->cb_flush_begin, size);
 463     else
 464         WRITE_CS_TABLE(&z->cb_begin, size - 2);
 465 }
 466
 467 void r300_emit_hyperz_end(struct r300_context *r300)
 468 {
 469     struct r300_hyperz_state z =
 470             *(struct r300_hyperz_state*)r300->hyperz_state.state;
 471
 472     z.flush = 1;
 473     z.zb_bw_cntl = 0;
 474     z.zb_depthclearvalue = 0;
 475     z.sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 476     z.gb_z_peq_config = 0;
 477
 478     r300_emit_hyperz_state(r300, r300->hyperz_state.size, &z);
 479 }
 480
 481 void r300_emit_fb_state_pipelined(struct r300_context *r300,
 482                                   unsigned size, void *state)
 483 {
 484     struct pipe_framebuffer_state* fb =
 485             (struct pipe_framebuffer_state*)r300->fb_state.state;
 486     unsigned i, num_cbufs = fb->nr_cbufs;
 487     CS_LOCALS(r300);
 488
 489     /* If we use the multiwrite feature, the colorbuffers 2,3,4 must be
 490      * marked as UNUSED in the US block. */
 491     if (r300_fragment_shader_writes_all(r300_fs(r300))) {
 492         num_cbufs = MIN2(num_cbufs, 1);
 493     }
 494
 495     BEGIN_CS(size);
 496
 497     /* Colorbuffer format in the US block.
 498      * (must be written after unpipelined regs) */
 499     OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
 500     for (i = 0; i < num_cbufs; i++) {
 501         OUT_CS(r300_surface(fb->cbufs[i])->format);
 502     }
 503     for (; i < 4; i++) {
 504         OUT_CS(R300_US_OUT_FMT_UNUSED);
 505     }
 506
 507     /* Multisampling. Depends on framebuffer sample count.
 508      * These are pipelined regs and as such cannot be moved
 509      * to the AA state. */
 510     if (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
 511         unsigned mspos0 = 0x66666666;
 512         unsigned mspos1 = 0x6666666;
 513
 514         if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
 515             /* Subsample placement. These may not be optimal. */
 516             switch (fb->cbufs[0]->texture->nr_samples) {
 517                 case 2:
 518                     mspos0 = 0x33996633;
 519                     mspos1 = 0x6666663;
 520                     break;
 521                 case 3:
 522                     mspos0 = 0x33936933;
 523                     mspos1 = 0x6666663;
 524                     break;
 525                 case 4:
 526                     mspos0 = 0x33939933;
 527                     mspos1 = 0x3966663;
 528                     break;
 529                 case 6:
 530                     mspos0 = 0x22a2aa22;
 531                     mspos1 = 0x2a65672;
 532                     break;
 533                 default:
 534                     debug_printf("r300: Bad number of multisamples!\n");
 535             }
 536         }
 537
 538         OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
 539         OUT_CS(mspos0);
 540         OUT_CS(mspos1);
 541     }
 542     END_CS;
 543 }
 544
 545 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
 546 {
 547     struct r300_query *query = r300->query_current;
 548     CS_LOCALS(r300);
 549
 550     if (!query)
 551         return;
 552
 553     BEGIN_CS(size);
 554     if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
 555         OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 556     } else {
 557         OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
 558     }
 559     OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
 560     END_CS;
 561     query->begin_emitted = TRUE;
 562 }
 563
 564 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
 565                                            struct r300_query *query)
 566 {
 567     struct r300_capabilities* caps = &r300->screen->caps;
 568     CS_LOCALS(r300);
 569
 570     assert(caps->num_frag_pipes);
 571
 572     BEGIN_CS(6 * caps->num_frag_pipes + 2);
 573     /* I'm not so sure I like this switch, but it's hard to be elegant
 574      * when there's so many special cases...
 575      *
 576      * So here's the basic idea. For each pipe, enable writes to it only,
 577      * then put out the relocation for ZPASS_ADDR, taking into account a
 578      * 4-byte offset for each pipe. RV380 and older are special; they have
 579      * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
 580      * so there's a chipset cap for that. */
 581     switch (caps->num_frag_pipes) {
 582         case 4:
 583             /* pipe 3 only */
 584             OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
 585             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 3) * 4);
 586             OUT_CS_RELOC(r300->query_current);
 587         case 3:
 588             /* pipe 2 only */
 589             OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
 590             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 2) * 4);
 591             OUT_CS_RELOC(r300->query_current);
 592         case 2:
 593             /* pipe 1 only */
 594             /* As mentioned above, accomodate RV380 and older. */
 595             OUT_CS_REG(R300_SU_REG_DEST,
 596                     1 << (caps->high_second_pipe ? 3 : 1));
 597             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);
 598             OUT_CS_RELOC(r300->query_current);
 599         case 1:
 600             /* pipe 0 only */
 601             OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
 602             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 0) * 4);
 603             OUT_CS_RELOC(r300->query_current);
 604             break;
 605         default:
 606             fprintf(stderr, "r300: Implementation error: Chipset reports %d"
 607                     " pixel pipes!\n", caps->num_frag_pipes);
 608             abort();
 609     }
 610
 611     /* And, finally, reset it to normal... */
 612     OUT_CS_REG(R300_SU_REG_DEST, 0xF);
 613     END_CS;
 614 }
 615
 616 static void rv530_emit_query_end_single_z(struct r300_context *r300,
 617                                           struct r300_query *query)
 618 {
 619     CS_LOCALS(r300);
 620
 621     BEGIN_CS(8);
 622     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 623     OUT_CS_REG(R300_ZB_ZPASS_ADDR, query->num_results * 4);
 624     OUT_CS_RELOC(r300->query_current);
 625     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 626     END_CS;
 627 }
 628
 629 static void rv530_emit_query_end_double_z(struct r300_context *r300,
 630                                           struct r300_query *query)
 631 {
 632     CS_LOCALS(r300);
 633
 634     BEGIN_CS(14);
 635     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 636     OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 0) * 4);
 637     OUT_CS_RELOC(r300->query_current);
 638     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
 639     OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);
 640     OUT_CS_RELOC(r300->query_current);
 641     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 642     END_CS;
 643 }
 644
 645 void r300_emit_query_end(struct r300_context* r300)
 646 {
 647     struct r300_capabilities *caps = &r300->screen->caps;
 648     struct r300_query *query = r300->query_current;
 649
 650     if (!query)
 651         return;
 652
 653     if (query->begin_emitted == FALSE)
 654         return;
 655
 656     if (caps->family == CHIP_FAMILY_RV530) {
 657         if (caps->num_z_pipes == 2)
 658             rv530_emit_query_end_double_z(r300, query);
 659         else
 660             rv530_emit_query_end_single_z(r300, query);
 661     } else
 662         r300_emit_query_end_frag_pipes(r300, query);
 663
 664     query->begin_emitted = FALSE;
 665     query->num_results += query->num_pipes;
 666
 667     /* XXX grab all the results and reset the counter. */
 668     if (query->num_results >= query->buffer_size / 4 - 4) {
 669         query->num_results = (query->buffer_size / 4) / 2;
 670         fprintf(stderr, "r300: Rewinding OQBO...\n");
 671     }
 672 }
 673
 674 void r300_emit_invariant_state(struct r300_context *r300,
 675                                unsigned size, void *state)
 676 {
 677     CS_LOCALS(r300);
 678     WRITE_CS_TABLE(state, size);
 679 }
 680
 681 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
 682 {
 683     struct r300_rs_state* rs = state;
 684     CS_LOCALS(r300);
 685
 686     BEGIN_CS(size);
 687     OUT_CS_TABLE(rs->cb_main, RS_STATE_MAIN_SIZE);
 688     if (rs->polygon_offset_enable) {
 689         if (r300->zbuffer_bpp == 16) {
 690             OUT_CS_TABLE(rs->cb_poly_offset_zb16, 5);
 691         } else {
 692             OUT_CS_TABLE(rs->cb_poly_offset_zb24, 5);
 693         }
 694     }
 695     END_CS;
 696 }
 697
 698 void r300_emit_rs_block_state(struct r300_context* r300,
 699                               unsigned size, void* state)
 700 {
 701     struct r300_rs_block* rs = (struct r300_rs_block*)state;
 702     unsigned i;
 703     /* It's the same for both INST and IP tables */
 704     unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
 705     CS_LOCALS(r300);
 706
 707     if (DBG_ON(r300, DBG_RS_BLOCK)) {
 708         r500_dump_rs_block(rs);
 709
 710         fprintf(stderr, "r300: RS emit:\n");
 711
 712         for (i = 0; i < count; i++)
 713             fprintf(stderr, "    : ip %d: 0x%08x\n", i, rs->ip[i]);
 714
 715         for (i = 0; i < count; i++)
 716             fprintf(stderr, "    : inst %d: 0x%08x\n", i, rs->inst[i]);
 717
 718         fprintf(stderr, "    : count: 0x%08x inst_count: 0x%08x\n",
 719             rs->count, rs->inst_count);
 720     }
 721
 722     BEGIN_CS(size);
 723     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 724     OUT_CS(rs->vap_vtx_state_cntl);
 725     OUT_CS(rs->vap_vsm_vtx_assm);
 726     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 727     OUT_CS(rs->vap_out_vtx_fmt[0]);
 728     OUT_CS(rs->vap_out_vtx_fmt[1]);
 729     OUT_CS_REG_SEQ(R300_GB_ENABLE, 1);
 730     OUT_CS(rs->gb_enable);
 731
 732     if (r300->screen->caps.is_r500) {
 733         OUT_CS_REG_SEQ(R500_RS_IP_0, count);
 734     } else {
 735         OUT_CS_REG_SEQ(R300_RS_IP_0, count);
 736     }
 737     OUT_CS_TABLE(rs->ip, count);
 738
 739     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 740     OUT_CS(rs->count);
 741     OUT_CS(rs->inst_count);
 742
 743     if (r300->screen->caps.is_r500) {
 744         OUT_CS_REG_SEQ(R500_RS_INST_0, count);
 745     } else {
 746         OUT_CS_REG_SEQ(R300_RS_INST_0, count);
 747     }
 748     OUT_CS_TABLE(rs->inst, count);
 749     END_CS;
 750 }
 751
 752 void r300_emit_scissor_state(struct r300_context* r300,
 753                              unsigned size, void* state)
 754 {
 755     struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
 756     CS_LOCALS(r300);
 757
 758     BEGIN_CS(size);
 759     OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
 760     if (r300->screen->caps.is_r500) {
 761         OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
 762                (scissor->miny << R300_CLIPRECT_Y_SHIFT));
 763         OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
 764                ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
 765     } else {
 766         OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
 767                ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
 768         OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
 769                ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
 770     }
 771     END_CS;
 772 }
 773
 774 void r300_emit_textures_state(struct r300_context *r300,
 775                               unsigned size, void *state)
 776 {
 777     struct r300_textures_state *allstate = (struct r300_textures_state*)state;
 778     struct r300_texture_sampler_state *texstate;
 779     struct r300_resource *tex;
 780     unsigned i;
 781     CS_LOCALS(r300);
 782
 783     BEGIN_CS(size);
 784     OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
 785
 786     for (i = 0; i < allstate->count; i++) {
 787         if ((1 << i) & allstate->tx_enable) {
 788             texstate = &allstate->regs[i];
 789             tex = r300_resource(allstate->sampler_views[i]->base.texture);
 790
 791             OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
 792             OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
 793             OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
 794                        texstate->border_color);
 795
 796             OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
 797             OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
 798             OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
 799
 800             OUT_CS_REG(R300_TX_OFFSET_0 + (i * 4), texstate->format.tile_config);
 801             OUT_CS_RELOC(tex);
 802         }
 803     }
 804     END_CS;
 805 }
 806
 807 void r300_emit_vertex_arrays(struct r300_context* r300, int offset, boolean indexed)
 808 {
 809     struct pipe_vertex_buffer *vbuf = r300->vbuf_mgr->vertex_buffer;
 810     struct pipe_resource **valid_vbuf = r300->vbuf_mgr->real_vertex_buffer;
 811     struct pipe_vertex_element *velem = r300->velems->velem;
 812     struct r300_resource *buf;
 813     int i;
 814     unsigned vertex_array_count = r300->velems->count;
 815     unsigned packet_size = (vertex_array_count * 3 + 1) / 2;
 816     struct pipe_vertex_buffer *vb1, *vb2;
 817     unsigned *hw_format_size;
 818     unsigned size1, size2;
 819     CS_LOCALS(r300);
 820
 821     BEGIN_CS(2 + packet_size + vertex_array_count * 2);
 822     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
 823     OUT_CS(vertex_array_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 824
 825     hw_format_size = r300->velems->format_size;
 826
 827     for (i = 0; i < vertex_array_count - 1; i += 2) {
 828         vb1 = &vbuf[velem[i].vertex_buffer_index];
 829         vb2 = &vbuf[velem[i+1].vertex_buffer_index];
 830         size1 = hw_format_size[i];
 831         size2 = hw_format_size[i+1];
 832
 833         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
 834                R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
 835         OUT_CS(vb1->buffer_offset + velem[i].src_offset   + offset * vb1->stride);
 836         OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
 837     }
 838
 839     if (vertex_array_count & 1) {
 840         vb1 = &vbuf[velem[i].vertex_buffer_index];
 841         size1 = hw_format_size[i];
 842
 843         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
 844         OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
 845     }
 846
 847     for (i = 0; i < vertex_array_count; i++) {
 848         buf = r300_resource(valid_vbuf[velem[i].vertex_buffer_index]);
 849         OUT_CS_RELOC(buf);
 850     }
 851     END_CS;
 852 }
 853
 854 void r300_emit_vertex_arrays_swtcl(struct r300_context *r300, boolean indexed)
 855 {
 856     CS_LOCALS(r300);
 857
 858     DBG(r300, DBG_SWTCL, "r300: Preparing vertex buffer %p for render, "
 859             "vertex size %d\n", r300->vbo,
 860             r300->vertex_info.size);
 861     /* Set the pointer to our vertex buffer. The emitted values are this:
 862      * PACKET3 [3D_LOAD_VBPNTR]
 863      * COUNT   [1]
 864      * FORMAT  [size | stride << 8]
 865      * OFFSET  [offset into BO]
 866      * VBPNTR  [relocated BO]
 867      */
 868     BEGIN_CS(7);
 869     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 870     OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 871     OUT_CS(r300->vertex_info.size |
 872             (r300->vertex_info.size << 8));
 873     OUT_CS(r300->draw_vbo_offset);
 874     OUT_CS(0);
 875     OUT_CS_RELOC(r300_resource(r300->vbo));
 876     END_CS;
 877 }
 878
 879 void r300_emit_vertex_stream_state(struct r300_context* r300,
 880                                    unsigned size, void* state)
 881 {
 882     struct r300_vertex_stream_state *streams =
 883         (struct r300_vertex_stream_state*)state;
 884     unsigned i;
 885     CS_LOCALS(r300);
 886
 887     if (DBG_ON(r300, DBG_PSC)) {
 888         fprintf(stderr, "r300: PSC emit:\n");
 889
 890         for (i = 0; i < streams->count; i++) {
 891             fprintf(stderr, "    : prog_stream_cntl%d: 0x%08x\n", i,
 892                    streams->vap_prog_stream_cntl[i]);
 893         }
 894
 895         for (i = 0; i < streams->count; i++) {
 896             fprintf(stderr, "    : prog_stream_cntl_ext%d: 0x%08x\n", i,
 897                    streams->vap_prog_stream_cntl_ext[i]);
 898         }
 899     }
 900
 901     BEGIN_CS(size);
 902     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
 903     OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
 904     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
 905     OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
 906     END_CS;
 907 }
 908
 909 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
 910 {
 911     CS_LOCALS(r300);
 912
 913     BEGIN_CS(size);
 914     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 915     END_CS;
 916 }
 917
 918 void r300_emit_vap_invariant_state(struct r300_context *r300,
 919                                    unsigned size, void *state)
 920 {
 921     CS_LOCALS(r300);
 922     WRITE_CS_TABLE(state, size);
 923 }
 924
 925 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
 926 {
 927     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
 928     struct r300_vertex_program_code* code = &vs->code;
 929     struct r300_screen* r300screen = r300->screen;
 930     unsigned instruction_count = code->length / 4;
 931
 932     unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
 933     unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
 934     unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
 935     unsigned temp_count = MAX2(code->num_temporaries, 1);
 936
 937     unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
 938                                   vtx_mem_size / output_count, 10);
 939     unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 5);
 940
 941     CS_LOCALS(r300);
 942
 943     BEGIN_CS(size);
 944
 945     /* R300_VAP_PVS_CODE_CNTL_0
 946      * R300_VAP_PVS_CONST_CNTL
 947      * R300_VAP_PVS_CODE_CNTL_1
 948      * See the r5xx docs for instructions on how to use these. */
 949     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) |
 950                R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
 951                R300_PVS_LAST_INST(instruction_count - 1));
 952     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, instruction_count - 1);
 953
 954     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 955     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
 956     OUT_CS_TABLE(code->body.d, code->length);
 957
 958     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
 959             R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
 960             R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
 961             R300_PVS_VF_MAX_VTX_NUM(12) |
 962             (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
 963
 964     /* Emit flow control instructions. */
 965     if (code->num_fc_ops) {
 966
 967         OUT_CS_REG(R300_VAP_PVS_FLOW_CNTL_OPC, code->fc_ops);
 968         if (r300screen->caps.is_r500) {
 969             OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, code->num_fc_ops * 2);
 970             OUT_CS_TABLE(code->fc_op_addrs.r500, code->num_fc_ops * 2);
 971         } else {
 972             OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_ADDRS_0, code->num_fc_ops);
 973             OUT_CS_TABLE(code->fc_op_addrs.r300, code->num_fc_ops);
 974         }
 975         OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, code->num_fc_ops);
 976         OUT_CS_TABLE(code->fc_loop_index, code->num_fc_ops);
 977     }
 978
 979     END_CS;
 980 }
 981
 982 void r300_emit_vs_constants(struct r300_context* r300,
 983                             unsigned size, void *state)
 984 {
 985     unsigned count =
 986         ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
 987     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 988     struct r300_vertex_shader *vs = (struct r300_vertex_shader*)r300->vs_state.state;
 989     unsigned i;
 990     int imm_first = vs->externals_count;
 991     int imm_end = vs->code.constants.Count;
 992     int imm_count = vs->immediates_count;
 993     CS_LOCALS(r300);
 994
 995     BEGIN_CS(size);
 996     OUT_CS_REG(R300_VAP_PVS_CONST_CNTL,
 997                R300_PVS_CONST_BASE_OFFSET(buf->buffer_base) |
 998                R300_PVS_MAX_CONST_ADDR(MAX2(imm_end - 1, 0)));
 999     if (vs->externals_count) {
1000         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
1001                    (r300->screen->caps.is_r500 ?
1002                    R500_PVS_CONST_START : R300_PVS_CONST_START) + buf->buffer_base);
1003         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
1004         if (buf->remap_table){
1005             for (i = 0; i < count; i++) {
1006                 uint32_t *data = &buf->ptr[buf->remap_table[i]*4];
1007                 OUT_CS_TABLE(data, 4);
1008             }
1009         } else {
1010             OUT_CS_TABLE(buf->ptr, count * 4);
1011         }
1012     }
1013
1014     /* Emit immediates. */
1015     if (imm_count) {
1016         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
1017                    (r300->screen->caps.is_r500 ?
1018                    R500_PVS_CONST_START : R300_PVS_CONST_START) +
1019                    buf->buffer_base + imm_first);
1020         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
1021         for (i = imm_first; i < imm_end; i++) {
1022             const float *data = vs->code.constants.Constants[i].u.Immediate;
1023             OUT_CS_TABLE(data, 4);
1024         }
1025     }
1026     END_CS;
1027 }
1028
1029 void r300_emit_viewport_state(struct r300_context* r300,
1030                               unsigned size, void* state)
1031 {
1032     struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
1033     CS_LOCALS(r300);
1034
1035     BEGIN_CS(size);
1036     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
1037     OUT_CS_TABLE(&viewport->xscale, 6);
1038     OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
1039     END_CS;
1040 }
1041
1042 static void r300_emit_hiz_line_clear(struct r300_context *r300, int start, uint16_t count, uint32_t val)
1043 {
1044     CS_LOCALS(r300);
1045     BEGIN_CS(4);
1046     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_HIZ, 2);
1047     OUT_CS(start);
1048     OUT_CS(count);
1049     OUT_CS(val);
1050     END_CS;
1051 }
1052
1053 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
1054
1055 void r300_emit_hiz_clear(struct r300_context *r300, unsigned size, void *state)
1056 {
1057     struct pipe_framebuffer_state *fb =
1058         (struct pipe_framebuffer_state*)r300->fb_state.state;
1059     struct r300_hyperz_state *z =
1060         (struct r300_hyperz_state*)r300->hyperz_state.state;
1061     struct r300_screen* r300screen = r300->screen;
1062     uint32_t stride, offset = 0, height, offset_shift;
1063     struct r300_resource* tex;
1064     int i;
1065
1066     tex = r300_resource(fb->zsbuf->texture);
1067
1068     offset = tex->hiz_mem[fb->zsbuf->u.tex.level]->ofs;
1069     stride = tex->tex.stride_in_pixels[fb->zsbuf->u.tex.level];
1070
1071     /* convert from pixels to 4x4 blocks */
1072     stride = ALIGN_DIVUP(stride, 4);
1073
1074     stride = ALIGN_DIVUP(stride, r300screen->caps.num_frag_pipes);
1075     /* there are 4 blocks per dwords */
1076     stride = ALIGN_DIVUP(stride, 4);
1077
1078     height = ALIGN_DIVUP(fb->zsbuf->height, 4);
1079
1080     offset_shift = 2;
1081     offset_shift += (r300screen->caps.num_frag_pipes / 2);
1082
1083     for (i = 0; i < height; i++) {
1084         offset = i * stride;
1085         offset <<= offset_shift;
1086         r300_emit_hiz_line_clear(r300, offset, stride, 0xffffffff);
1087     }
1088     z->current_func = -1;
1089
1090     /* Mark the current zbuffer's hiz ram as in use. */
1091     tex->hiz_in_use[fb->zsbuf->u.tex.level] = TRUE;
1092 }
1093
1094 void r300_emit_zmask_clear(struct r300_context *r300, unsigned size, void *state)
1095 {
1096     struct pipe_framebuffer_state *fb =
1097         (struct pipe_framebuffer_state*)r300->fb_state.state;
1098     struct r300_resource *tex;
1099     CS_LOCALS(r300);
1100
1101     tex = r300_resource(fb->zsbuf->texture);
1102
1103     BEGIN_CS(size);
1104     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_ZMASK, 2);
1105     OUT_CS(0);
1106     OUT_CS(tex->tex.zmask_dwords[fb->zsbuf->u.tex.level]);
1107     OUT_CS(0);
1108     END_CS;
1109
1110     /* Mark the current zbuffer's zmask as in use. */
1111     r300->zmask_in_use = TRUE;
1112     r300_mark_atom_dirty(r300, &r300->hyperz_state);
1113 }
1114
1115 void r300_emit_ztop_state(struct r300_context* r300,
1116                           unsigned size, void* state)
1117 {
1118     struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
1119     CS_LOCALS(r300);
1120
1121     BEGIN_CS(size);
1122     OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
1123     END_CS;
1124 }
1125
1126 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
1127 {
1128     CS_LOCALS(r300);
1129
1130     BEGIN_CS(size);
1131     OUT_CS_REG(R300_TX_INVALTAGS, 0);
1132     END_CS;
1133 }
1134
1135 boolean r300_emit_buffer_validate(struct r300_context *r300,
1136                                   boolean do_validate_vertex_buffers,
1137                                   struct pipe_resource *index_buffer)
1138 {
1139     struct pipe_framebuffer_state *fb =
1140         (struct pipe_framebuffer_state*)r300->fb_state.state;
1141     struct r300_textures_state *texstate =
1142         (struct r300_textures_state*)r300->textures_state.state;
1143     struct r300_resource *tex;
1144     unsigned i;
1145     boolean flushed = FALSE;
1146
1147 validate:
1148     if (r300->fb_state.dirty) {
1149         /* Color buffers... */
1150         for (i = 0; i < fb->nr_cbufs; i++) {
1151             tex = r300_resource(fb->cbufs[i]->texture);
1152             assert(tex && tex->buf && "cbuf is marked, but NULL!");
1153             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, 0,
1154                                     r300_surface(fb->cbufs[i])->domain);
1155         }
1156         /* ...depth buffer... */
1157         if (fb->zsbuf) {
1158             tex = r300_resource(fb->zsbuf->texture);
1159             assert(tex && tex->buf && "zsbuf is marked, but NULL!");
1160             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, 0,
1161                                     r300_surface(fb->zsbuf)->domain);
1162         }
1163     }
1164     if (r300->textures_state.dirty) {
1165         /* ...textures... */
1166         for (i = 0; i < texstate->count; i++) {
1167             if (!(texstate->tx_enable & (1 << i))) {
1168                 continue;
1169             }
1170
1171             tex = r300_resource(texstate->sampler_views[i]->base.texture);
1172             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, tex->domain, 0);
1173         }
1174     }
1175     /* ...occlusion query buffer... */
1176     if (r300->query_current)
1177         r300->rws->cs_add_reloc(r300->cs, r300->query_current->cs_buf,
1178                                 0, r300->query_current->domain);
1179     /* ...vertex buffer for SWTCL path... */
1180     if (r300->vbo)
1181         r300->rws->cs_add_reloc(r300->cs, r300_resource(r300->vbo)->cs_buf,
1182                                 r300_resource(r300->vbo)->domain, 0);
1183     /* ...vertex buffers for HWTCL path... */
1184     if (do_validate_vertex_buffers) {
1185         struct pipe_resource **buf = r300->vbuf_mgr->real_vertex_buffer;
1186         struct pipe_resource **last = r300->vbuf_mgr->real_vertex_buffer +
1187                                       r300->vbuf_mgr->nr_real_vertex_buffers;
1188         for (; buf != last; buf++) {
1189             if (!*buf)
1190                 continue;
1191
1192             r300->rws->cs_add_reloc(r300->cs, r300_resource(*buf)->cs_buf,
1193                                     r300_resource(*buf)->domain, 0);
1194         }
1195     }
1196     /* ...and index buffer for HWTCL path. */
1197     if (index_buffer)
1198         r300->rws->cs_add_reloc(r300->cs, r300_resource(index_buffer)->cs_buf,
1199                                 r300_resource(index_buffer)->domain, 0);
1200
1201     /* Now do the validation. */
1202     if (!r300->rws->cs_validate(r300->cs)) {
1203         /* Ooops, an infinite loop, give up. */
1204         if (flushed)
1205             return FALSE;
1206
1207         r300->context.flush(&r300->context, 0, NULL);
1208         flushed = TRUE;
1209         goto validate;
1210     }
1211
1212     return TRUE;
1213 }
1214
1215 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
1216 {
1217     struct r300_atom* atom;
1218     unsigned dwords = 0;
1219
1220     foreach_dirty_atom(r300, atom) {
1221         if (atom->dirty) {
1222             dwords += atom->size;
1223         }
1224     }
1225
1226     /* let's reserve some more, just in case */
1227     dwords += 32;
1228
1229     return dwords;
1230 }
1231
1232 unsigned r300_get_num_cs_end_dwords(struct r300_context *r300)
1233 {
1234     unsigned dwords = 0;
1235
1236     /* Emitted in flush. */
1237     dwords += 26; /* emit_query_end */
1238     dwords += r300->hyperz_state.size + 2; /* emit_hyperz_end + zcache flush */
1239     if (r300->screen->caps.index_bias_supported)
1240         dwords += 2;
1241
1242     return dwords;
1243 }
1244
1245 /* Emit all dirty state. */
1246 void r300_emit_dirty_state(struct r300_context* r300)
1247 {
1248     struct r300_atom *atom;
1249
1250     foreach_dirty_atom(r300, atom) {
1251         if (atom->dirty) {
1252             atom->emit(r300, atom->size, atom->state);
1253             atom->dirty = FALSE;
1254         }
1255     }
1256
1257     r300->first_dirty = NULL;
1258     r300->last_dirty = NULL;
1259     r300->dirty_hw++;
1260 }