src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 /* r300_emit: Functions for emitting state. */
  24
  25 #include "r300_emit.h"
  26
  27 void r300_emit_blend_state(struct r300_context* r300,
  28                            struct r300_blend_state* blend)
  29 {
  30     CS_LOCALS(r300);
  31     BEGIN_CS(7);
  32     OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2);
  33     OUT_CS(blend->blend_control);
  34     OUT_CS(blend->alpha_blend_control);
  35     OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop);
  36     OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither);
  37     END_CS;
  38 }
  39
  40 void r300_emit_blend_color_state(struct r300_context* r300,
  41                                  struct r300_blend_color_state* bc)
  42 {
  43     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  44     CS_LOCALS(r300);
  45
  46     if (r300screen->caps->is_r500) {
  47         BEGIN_CS(3);
  48         OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
  49         OUT_CS(bc->blend_color_red_alpha);
  50         OUT_CS(bc->blend_color_green_blue);
  51         END_CS;
  52     } else {
  53         BEGIN_CS(2);
  54         OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color);
  55         END_CS;
  56     }
  57 }
  58
  59 void r300_emit_dsa_state(struct r300_context* r300,
  60                            struct r300_dsa_state* dsa)
  61 {
  62     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  63     CS_LOCALS(r300);
  64
  65     BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8);
  66     OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
  67     /* XXX figure out the r300 counterpart for this */
  68     if (r300screen->caps->is_r500) {
  69         /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */
  70     }
  71     OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
  72     OUT_CS(dsa->z_buffer_control);
  73     OUT_CS(dsa->z_stencil_control);
  74     OUT_CS(dsa->stencil_ref_mask);
  75     OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top);
  76     if (r300screen->caps->is_r500) {
  77         /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */
  78     }
  79     END_CS;
  80 }
  81
  82 void r300_emit_fragment_shader(struct r300_context* r300,
  83                                struct r300_fragment_shader* fs)
  84 {
  85     int i;
  86     CS_LOCALS(r300);
  87
  88     BEGIN_CS(22);
  89
  90     OUT_CS_REG(R300_US_CONFIG, fs->indirections);
  91     OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size);
  92     /* XXX figure out exactly how big the sizes are on this reg */
  93     OUT_CS_REG(R300_US_CODE_OFFSET, 0x40);
  94     /* XXX figure these ones out a bit better kthnx */
  95     OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0);
  96     OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
  97     OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
  98     OUT_CS_REG(R300_US_CODE_ADDR_3, 0x40 | R300_RGBA_OUT);
  99
 100     for (i = 0; i < fs->alu_instruction_count; i++) {
 101         OUT_CS_REG(R300_US_ALU_RGB_INST_0 + (4 * i),
 102             fs->instructions[i].alu_rgb_inst);
 103         OUT_CS_REG(R300_US_ALU_RGB_ADDR_0 + (4 * i),
 104             fs->instructions[i].alu_rgb_addr);
 105         OUT_CS_REG(R300_US_ALU_ALPHA_INST_0 + (4 * i),
 106             fs->instructions[i].alu_alpha_inst);
 107         OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0 + (4 * i),
 108             fs->instructions[i].alu_alpha_addr);
 109     }
 110
 111     END_CS;
 112 }
 113
 114 void r500_emit_fragment_shader(struct r300_context* r300,
 115                                struct r500_fragment_shader* fs)
 116 {
 117     int i;
 118     struct r300_constant_buffer* constants =
 119         &r300->shader_constants[PIPE_SHADER_FRAGMENT];
 120     CS_LOCALS(r300);
 121
 122     BEGIN_CS(9 + (fs->instruction_count * 6) + (constants->count ? 3 : 0) +
 123             (constants->count * 4));
 124     OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
 125     OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size);
 126     OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
 127             R500_US_CODE_END_ADDR(fs->instruction_count));
 128
 129     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
 130     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, fs->instruction_count * 6);
 131     for (i = 0; i < fs->instruction_count; i++) {
 132         OUT_CS(fs->instructions[i].inst0);
 133         OUT_CS(fs->instructions[i].inst1);
 134         OUT_CS(fs->instructions[i].inst2);
 135         OUT_CS(fs->instructions[i].inst3);
 136         OUT_CS(fs->instructions[i].inst4);
 137         OUT_CS(fs->instructions[i].inst5);
 138     }
 139
 140     if (constants->count) {
 141         OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 142                 R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 143         OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->count * 4);
 144         for (i = 0; i < constants->count; i++) {
 145             OUT_CS_32F(constants->constants[i][0]);
 146             OUT_CS_32F(constants->constants[i][1]);
 147             OUT_CS_32F(constants->constants[i][2]);
 148             OUT_CS_32F(constants->constants[i][3]);
 149         }
 150     }
 151
 152     END_CS;
 153 }
 154
 155 void r300_emit_fb_state(struct r300_context* r300,
 156                         struct pipe_framebuffer_state* fb)
 157 {
 158     struct r300_texture* tex;
 159     unsigned pixpitch;
 160     int i;
 161     CS_LOCALS(r300);
 162
 163     BEGIN_CS((8 * fb->nr_cbufs) + (fb->zsbuf ? 8 : 0) + 4);
 164     for (i = 0; i < fb->nr_cbufs; i++) {
 165         tex = (struct r300_texture*)fb->cbufs[i]->texture;
 166         pixpitch = tex->stride / tex->tex.block.size;
 167
 168         OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
 169         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 170
 171         OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), pixpitch |
 172             r300_translate_colorformat(tex->tex.format));
 173
 174         OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i),
 175             r300_translate_out_fmt(fb->cbufs[i]->format));
 176     }
 177
 178     if (fb->zsbuf) {
 179         tex = (struct r300_texture*)fb->zsbuf->texture;
 180         pixpitch = (tex->stride / tex->tex.block.size);
 181
 182         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 183         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 184
 185         OUT_CS_REG(R300_ZB_FORMAT, r300_translate_zsformat(tex->tex.format));
 186
 187         OUT_CS_REG(R300_ZB_DEPTHPITCH, pixpitch);
 188     }
 189
 190     OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 191         R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 192         R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 193     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
 194         R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 195         R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 196     END_CS;
 197 }
 198
 199 void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs)
 200 {
 201     CS_LOCALS(r300);
 202
 203     BEGIN_CS(20);
 204     OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
 205     OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
 206     OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
 207     OUT_CS(rs->point_minmax);
 208     OUT_CS(rs->line_control);
 209     OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6);
 210     OUT_CS(rs->depth_scale_front);
 211     OUT_CS(rs->depth_offset_front);
 212     OUT_CS(rs->depth_scale_back);
 213     OUT_CS(rs->depth_offset_back);
 214     OUT_CS(rs->polygon_offset_enable);
 215     OUT_CS(rs->cull_mode);
 216     OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
 217     OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
 218     OUT_CS_REG(R300_GA_COLOR_CONTROL, rs->color_control);
 219     END_CS;
 220 }
 221
 222 void r300_emit_rs_block_state(struct r300_context* r300,
 223                               struct r300_rs_block* rs)
 224 {
 225     int i;
 226     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 227     CS_LOCALS(r300);
 228
 229     BEGIN_CS(21);
 230     if (r300screen->caps->is_r500) {
 231         OUT_CS_REG_SEQ(R500_RS_IP_0, 8);
 232     } else {
 233         OUT_CS_REG_SEQ(R300_RS_IP_0, 8);
 234     }
 235     for (i = 0; i < 8; i++) {
 236         OUT_CS(rs->ip[i]);
 237         debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]);
 238     }
 239
 240     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 241     OUT_CS(rs->count);
 242     OUT_CS(rs->inst_count);
 243
 244     if (r300screen->caps->is_r500) {
 245         OUT_CS_REG_SEQ(R500_RS_INST_0, 8);
 246     } else {
 247         OUT_CS_REG_SEQ(R300_RS_INST_0, 8);
 248     }
 249     for (i = 0; i < 8; i++) {
 250         OUT_CS(rs->inst[i]);
 251         debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]);
 252     }
 253
 254     debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count,
 255             rs->inst_count);
 256
 257     END_CS;
 258 }
 259
 260 void r300_emit_sampler(struct r300_context* r300,
 261                        struct r300_sampler_state* sampler, unsigned offset)
 262 {
 263     CS_LOCALS(r300);
 264
 265     BEGIN_CS(6);
 266     OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), sampler->filter0);
 267     OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1);
 268     OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color);
 269     END_CS;
 270 }
 271
 272 void r300_emit_scissor_state(struct r300_context* r300,
 273                              struct r300_scissor_state* scissor)
 274 {
 275     CS_LOCALS(r300);
 276
 277     BEGIN_CS(3);
 278     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 279     OUT_CS(scissor->scissor_top_left);
 280     OUT_CS(scissor->scissor_bottom_right);
 281     END_CS;
 282 }
 283
 284 void r300_emit_texture(struct r300_context* r300,
 285                        struct r300_texture* tex, unsigned offset)
 286 {
 287     CS_LOCALS(r300);
 288
 289     BEGIN_CS(10);
 290     OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0);
 291     OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1);
 292     OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2);
 293     OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (offset * 4), 1);
 294     OUT_CS_RELOC(tex->buffer, 0,
 295             RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0);
 296     END_CS;
 297 }
 298
 299 void r300_emit_vertex_buffer(struct r300_context* r300)
 300 {
 301     CS_LOCALS(r300);
 302
 303     debug_printf("r300: Preparing vertex buffer %p for render, "
 304             "vertex size %d\n", r300->vbo,
 305             r300->vertex_info.vinfo.size);
 306     /* Set the pointer to our vertex buffer. The emitted values are this:
 307      * PACKET3 [3D_LOAD_VBPNTR]
 308      * COUNT   [1]
 309      * FORMAT  [size | stride << 8]
 310      * OFFSET  [offset into BO]
 311      * VBPNTR  [relocated BO]
 312      */
 313     BEGIN_CS(7);
 314     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 315     OUT_CS(1);
 316     OUT_CS(r300->vertex_info.vinfo.size |
 317             (r300->vertex_info.vinfo.size << 8));
 318     OUT_CS(r300->vbo_offset);
 319     OUT_CS_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0);
 320     END_CS;
 321 }
 322
 323 void r300_emit_vertex_format_state(struct r300_context* r300)
 324 {
 325     int i;
 326     CS_LOCALS(r300);
 327
 328     BEGIN_CS(26);
 329     OUT_CS_REG(R300_VAP_VTX_SIZE, r300->vertex_info.vinfo.size);
 330
 331     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 332     OUT_CS(r300->vertex_info.vinfo.hwfmt[0]);
 333     OUT_CS(r300->vertex_info.vinfo.hwfmt[1]);
 334     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 335     OUT_CS(r300->vertex_info.vinfo.hwfmt[2]);
 336     OUT_CS(r300->vertex_info.vinfo.hwfmt[3]);
 337     for (i = 0; i < 4; i++) {
 338         debug_printf("hwfmt%d: 0x%08x\n", i,
 339                 r300->vertex_info.vinfo.hwfmt[i]);
 340     }
 341
 342     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8);
 343     for (i = 0; i < 8; i++) {
 344         OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]);
 345         debug_printf("prog_stream_cntl%d: 0x%08x\n", i,
 346                 r300->vertex_info.vap_prog_stream_cntl[i]);
 347     }
 348     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8);
 349     for (i = 0; i < 8; i++) {
 350         OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]);
 351         debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i,
 352                 r300->vertex_info.vap_prog_stream_cntl_ext[i]);
 353     }
 354     END_CS;
 355 }
 356
 357 void r300_emit_vertex_shader(struct r300_context* r300,
 358                              struct r300_vertex_shader* vs)
 359 {
 360     int i;
 361     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 362     struct r300_constant_buffer* constants =
 363         &r300->shader_constants[PIPE_SHADER_VERTEX];
 364     CS_LOCALS(r300);
 365
 366     if (!r300screen->caps->has_tcl) {
 367         debug_printf("r300: Implementation error: emit_vertex_shader called,"
 368                 " but has_tcl is FALSE!\n");
 369         return;
 370     }
 371
 372     if (constants->count) {
 373         BEGIN_CS(16 + (vs->instruction_count * 4) + (constants->count * 4));
 374     } else {
 375         BEGIN_CS(13 + (vs->instruction_count * 4) + (constants->count * 4));
 376     }
 377
 378     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) |
 379             R300_PVS_LAST_INST(vs->instruction_count - 1));
 380     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, vs->instruction_count - 1);
 381
 382     /* XXX */
 383     OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x0);
 384
 385     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 386     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4);
 387     for (i = 0; i < vs->instruction_count; i++) {
 388         OUT_CS(vs->instructions[i].inst0);
 389         OUT_CS(vs->instructions[i].inst1);
 390         OUT_CS(vs->instructions[i].inst2);
 391         OUT_CS(vs->instructions[i].inst3);
 392     }
 393
 394     if (constants->count) {
 395         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 396                 (r300screen->caps->is_r500 ?
 397                  R500_PVS_CONST_START : R300_PVS_CONST_START));
 398         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, constants->count * 4);
 399         for (i = 0; i < constants->count; i++) {
 400             OUT_CS_32F(constants->constants[i][0]);
 401             OUT_CS_32F(constants->constants[i][1]);
 402             OUT_CS_32F(constants->constants[i][2]);
 403             OUT_CS_32F(constants->constants[i][3]);
 404         }
 405     }
 406
 407     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
 408             R300_PVS_NUM_CNTLRS(5) |
 409             R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) |
 410             R300_PVS_VF_MAX_VTX_NUM(12));
 411     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 412     END_CS;
 413
 414 }
 415
 416 void r300_emit_viewport_state(struct r300_context* r300,
 417                               struct r300_viewport_state* viewport)
 418 {
 419     CS_LOCALS(r300);
 420
 421     BEGIN_CS(9);
 422     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
 423     OUT_CS_32F(viewport->xscale);
 424     OUT_CS_32F(viewport->xoffset);
 425     OUT_CS_32F(viewport->yscale);
 426     OUT_CS_32F(viewport->yoffset);
 427     OUT_CS_32F(viewport->zscale);
 428     OUT_CS_32F(viewport->zoffset);
 429
 430     OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
 431     END_CS;
 432 }
 433
 434 void r300_flush_textures(struct r300_context* r300)
 435 {
 436     CS_LOCALS(r300);
 437
 438     BEGIN_CS(4);
 439     OUT_CS_REG(R300_TX_INVALTAGS, 0);
 440     OUT_CS_REG(R300_TX_ENABLE, (1 << r300->texture_count) - 1);
 441     END_CS;
 442 }
 443
 444 /* Emit all dirty state. */
 445 void r300_emit_dirty_state(struct r300_context* r300)
 446 {
 447     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 448     struct r300_texture* tex;
 449     int i;
 450     int dirty_tex = 0;
 451
 452     if (!(r300->dirty_state)) {
 453         return;
 454     }
 455
 456     r300_update_derived_state(r300);
 457
 458     /* XXX check size */
 459     /* Color buffers... */
 460     for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) {
 461         tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i];
 462         //assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 463         if (!tex->buffer) return;
 464         r300->winsys->add_buffer(r300->winsys, tex->buffer,
 465                 0, RADEON_GEM_DOMAIN_VRAM);
 466     }
 467     /* ...depth buffer... */
 468     if (r300->framebuffer_state.zsbuf) {
 469         tex = (struct r300_texture*)r300->framebuffer_state.zsbuf;
 470         //assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
 471         if (!tex->buffer) return;
 472         r300->winsys->add_buffer(r300->winsys, tex->buffer,
 473                 0, RADEON_GEM_DOMAIN_VRAM);
 474     }
 475     /* ...and vertex buffer. */
 476     if (r300->vbo) {
 477         r300->winsys->add_buffer(r300->winsys, r300->vbo,
 478                 RADEON_GEM_DOMAIN_GTT, 0);
 479     } else {
 480         debug_printf("No VBO while emitting dirty state!\n");
 481     }
 482
 483     if (r300->winsys->validate(r300->winsys)) {
 484         /* XXX */
 485         r300->context.flush(&r300->context, 0, NULL);
 486     }
 487
 488     if (r300->dirty_state & R300_NEW_BLEND) {
 489         r300_emit_blend_state(r300, r300->blend_state);
 490         r300->dirty_state &= ~R300_NEW_BLEND;
 491     }
 492
 493     if (r300->dirty_state & R300_NEW_BLEND_COLOR) {
 494         r300_emit_blend_color_state(r300, r300->blend_color_state);
 495         r300->dirty_state &= ~R300_NEW_BLEND_COLOR;
 496     }
 497
 498     if (r300->dirty_state & R300_NEW_DSA) {
 499         r300_emit_dsa_state(r300, r300->dsa_state);
 500         r300->dirty_state &= ~R300_NEW_DSA;
 501     }
 502
 503     if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) {
 504         if (r300screen->caps->is_r500) {
 505             r500_emit_fragment_shader(r300,
 506                 (struct r500_fragment_shader*)r300->fs);
 507         } else {
 508             r300_emit_fragment_shader(r300,
 509                 (struct r300_fragment_shader*)r300->fs);
 510         }
 511         r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER;
 512     }
 513
 514     if (r300->dirty_state & R300_NEW_FRAMEBUFFERS) {
 515         r300_emit_fb_state(r300, &r300->framebuffer_state);
 516         r300->dirty_state &= ~R300_NEW_FRAMEBUFFERS;
 517     }
 518
 519     if (r300->dirty_state & R300_NEW_RASTERIZER) {
 520         r300_emit_rs_state(r300, r300->rs_state);
 521         r300->dirty_state &= ~R300_NEW_RASTERIZER;
 522     }
 523
 524     if (r300->dirty_state & R300_NEW_RS_BLOCK) {
 525         r300_emit_rs_block_state(r300, r300->rs_block);
 526         r300->dirty_state &= ~R300_NEW_RS_BLOCK;
 527     }
 528
 529     if (r300->dirty_state & R300_ANY_NEW_SAMPLERS) {
 530         for (i = 0; i < r300->sampler_count; i++) {
 531             if (r300->dirty_state & (R300_NEW_SAMPLER << i)) {
 532                 r300_emit_sampler(r300, r300->sampler_states[i], i);
 533                 r300->dirty_state &= ~(R300_NEW_SAMPLER << i);
 534                 dirty_tex++;
 535             }
 536         }
 537     }
 538
 539     if (r300->dirty_state & R300_NEW_SCISSOR) {
 540         r300_emit_scissor_state(r300, r300->scissor_state);
 541         r300->dirty_state &= ~R300_NEW_SCISSOR;
 542     }
 543
 544     if (r300->dirty_state & R300_ANY_NEW_TEXTURES) {
 545         for (i = 0; i < r300->texture_count; i++) {
 546             if (r300->dirty_state & (R300_NEW_TEXTURE << i)) {
 547                 r300_emit_texture(r300, r300->textures[i], i);
 548                 r300->dirty_state &= ~(R300_NEW_TEXTURE << i);
 549                 dirty_tex++;
 550             }
 551         }
 552     }
 553
 554     if (r300->dirty_state & R300_NEW_VIEWPORT) {
 555         r300_emit_viewport_state(r300, r300->viewport_state);
 556         r300->dirty_state &= ~R300_NEW_VIEWPORT;
 557     }
 558
 559     if (dirty_tex) {
 560         r300_flush_textures(r300);
 561     }
 562
 563     if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) {
 564         r300_emit_vertex_format_state(r300);
 565         r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT;
 566     }
 567
 568     /* Finally, emit the VBO. */
 569     r300_emit_vertex_buffer(r300);
 570
 571     r300->dirty_hw++;
 572 }