src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 /* r300_emit: Functions for emitting state. */
  24
  25 #include "r300_emit.h"
  26
  27 void r300_emit_blend_state(struct r300_context* r300,
  28                            struct r300_blend_state* blend)
  29 {
  30     CS_LOCALS(r300);
  31     BEGIN_CS(7);
  32     OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2);
  33     OUT_CS(blend->blend_control);
  34     OUT_CS(blend->alpha_blend_control);
  35     OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop);
  36     OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither);
  37     END_CS;
  38 }
  39
  40 void r300_emit_blend_color_state(struct r300_context* r300,
  41                                  struct r300_blend_color_state* bc)
  42 {
  43     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  44     CS_LOCALS(r300);
  45
  46     if (r300screen->caps->is_r500) {
  47         BEGIN_CS(3);
  48         OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
  49         OUT_CS(bc->blend_color_red_alpha);
  50         OUT_CS(bc->blend_color_green_blue);
  51         END_CS;
  52     } else {
  53         BEGIN_CS(2);
  54         OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color);
  55         END_CS;
  56     }
  57 }
  58
  59 void r300_emit_clip_state(struct r300_context* r300,
  60                           struct pipe_clip_state* clip)
  61 {
  62     int i;
  63     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  64     CS_LOCALS(r300);
  65
  66     if (r300screen->caps->has_tcl) {
  67         BEGIN_CS(5 + (6 * 4));
  68         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
  69                 (r300screen->caps->is_r500 ?
  70                  R500_PVS_UCP_START : R300_PVS_UCP_START));
  71         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
  72         for (i = 0; i < 6; i++) {
  73             OUT_CS_32F(clip->ucp[i][0]);
  74             OUT_CS_32F(clip->ucp[i][1]);
  75             OUT_CS_32F(clip->ucp[i][2]);
  76             OUT_CS_32F(clip->ucp[i][3]);
  77         }
  78         OUT_CS_REG(R300_VAP_CLIP_CNTL, ((1 << clip->nr) - 1) |
  79                 R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
  80         END_CS;
  81     } else {
  82         BEGIN_CS(2);
  83         OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
  84         END_CS;
  85     }
  86
  87 }
  88
  89 void r300_emit_dsa_state(struct r300_context* r300,
  90                            struct r300_dsa_state* dsa)
  91 {
  92     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  93     CS_LOCALS(r300);
  94
  95     BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8);
  96     OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
  97     /* XXX figure out the r300 counterpart for this */
  98     if (r300screen->caps->is_r500) {
  99         /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */
 100     }
 101     OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
 102     OUT_CS(dsa->z_buffer_control);
 103     OUT_CS(dsa->z_stencil_control);
 104     OUT_CS(dsa->stencil_ref_mask);
 105     OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top);
 106     if (r300screen->caps->is_r500) {
 107         /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */
 108     }
 109     END_CS;
 110 }
 111
 112 void r300_emit_fragment_shader(struct r300_context* r300,
 113                                struct r300_fragment_shader* fs)
 114 {
 115     int i;
 116     CS_LOCALS(r300);
 117
 118     BEGIN_CS(22);
 119
 120     OUT_CS_REG(R300_US_CONFIG, fs->indirections);
 121     OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size);
 122     /* XXX figure out exactly how big the sizes are on this reg */
 123     OUT_CS_REG(R300_US_CODE_OFFSET, 0x40);
 124     /* XXX figure these ones out a bit better kthnx */
 125     OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0);
 126     OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
 127     OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
 128     OUT_CS_REG(R300_US_CODE_ADDR_3, 0x40 | R300_RGBA_OUT);
 129
 130     for (i = 0; i < fs->alu_instruction_count; i++) {
 131         OUT_CS_REG(R300_US_ALU_RGB_INST_0 + (4 * i),
 132             fs->instructions[i].alu_rgb_inst);
 133         OUT_CS_REG(R300_US_ALU_RGB_ADDR_0 + (4 * i),
 134             fs->instructions[i].alu_rgb_addr);
 135         OUT_CS_REG(R300_US_ALU_ALPHA_INST_0 + (4 * i),
 136             fs->instructions[i].alu_alpha_inst);
 137         OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0 + (4 * i),
 138             fs->instructions[i].alu_alpha_addr);
 139     }
 140
 141     END_CS;
 142 }
 143
 144 void r500_emit_fragment_shader(struct r300_context* r300,
 145                                struct r500_fragment_shader* fs)
 146 {
 147     int i;
 148     struct r300_constant_buffer* constants =
 149         &r300->shader_constants[PIPE_SHADER_FRAGMENT];
 150     CS_LOCALS(r300);
 151
 152     BEGIN_CS(9 + (fs->instruction_count * 6) + (constants->count ? 3 : 0) +
 153             (constants->count * 4));
 154     OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
 155     OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size);
 156     OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
 157             R500_US_CODE_END_ADDR(fs->instruction_count));
 158
 159     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
 160     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, fs->instruction_count * 6);
 161     for (i = 0; i < fs->instruction_count; i++) {
 162         OUT_CS(fs->instructions[i].inst0);
 163         OUT_CS(fs->instructions[i].inst1);
 164         OUT_CS(fs->instructions[i].inst2);
 165         OUT_CS(fs->instructions[i].inst3);
 166         OUT_CS(fs->instructions[i].inst4);
 167         OUT_CS(fs->instructions[i].inst5);
 168     }
 169
 170     if (constants->count) {
 171         OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 172                 R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 173         OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->count * 4);
 174         for (i = 0; i < constants->count; i++) {
 175             OUT_CS_32F(constants->constants[i][0]);
 176             OUT_CS_32F(constants->constants[i][1]);
 177             OUT_CS_32F(constants->constants[i][2]);
 178             OUT_CS_32F(constants->constants[i][3]);
 179         }
 180     }
 181
 182     END_CS;
 183 }
 184
 185 void r300_emit_fb_state(struct r300_context* r300,
 186                         struct pipe_framebuffer_state* fb)
 187 {
 188     struct r300_texture* tex;
 189     unsigned pixpitch;
 190     int i;
 191     CS_LOCALS(r300);
 192
 193     BEGIN_CS((8 * fb->nr_cbufs) + (fb->zsbuf ? 8 : 0) + 4);
 194     for (i = 0; i < fb->nr_cbufs; i++) {
 195         tex = (struct r300_texture*)fb->cbufs[i]->texture;
 196         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 197         pixpitch = tex->stride / tex->tex.block.size;
 198
 199         OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
 200         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 201
 202         OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), pixpitch |
 203             r300_translate_colorformat(tex->tex.format));
 204
 205         OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i),
 206             r300_translate_out_fmt(fb->cbufs[i]->format));
 207     }
 208
 209     if (fb->zsbuf) {
 210         tex = (struct r300_texture*)fb->zsbuf->texture;
 211         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
 212         pixpitch = tex->stride / tex->tex.block.size;
 213
 214         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 215         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 216
 217         OUT_CS_REG(R300_ZB_FORMAT, r300_translate_zsformat(tex->tex.format));
 218
 219         OUT_CS_REG(R300_ZB_DEPTHPITCH, pixpitch);
 220     }
 221
 222     OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 223         R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 224         R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 225     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
 226         R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 227         R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 228     END_CS;
 229 }
 230
 231 void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs)
 232 {
 233     CS_LOCALS(r300);
 234
 235     BEGIN_CS(20);
 236     OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
 237     OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
 238     OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
 239     OUT_CS(rs->point_minmax);
 240     OUT_CS(rs->line_control);
 241     OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6);
 242     OUT_CS(rs->depth_scale_front);
 243     OUT_CS(rs->depth_offset_front);
 244     OUT_CS(rs->depth_scale_back);
 245     OUT_CS(rs->depth_offset_back);
 246     OUT_CS(rs->polygon_offset_enable);
 247     OUT_CS(rs->cull_mode);
 248     OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
 249     OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
 250     OUT_CS_REG(R300_GA_COLOR_CONTROL, rs->color_control);
 251     END_CS;
 252 }
 253
 254 void r300_emit_rs_block_state(struct r300_context* r300,
 255                               struct r300_rs_block* rs)
 256 {
 257     int i;
 258     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 259     CS_LOCALS(r300);
 260
 261     BEGIN_CS(21);
 262     if (r300screen->caps->is_r500) {
 263         OUT_CS_REG_SEQ(R500_RS_IP_0, 8);
 264     } else {
 265         OUT_CS_REG_SEQ(R300_RS_IP_0, 8);
 266     }
 267     for (i = 0; i < 8; i++) {
 268         OUT_CS(rs->ip[i]);
 269         /* debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); */
 270     }
 271
 272     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 273     OUT_CS(rs->count);
 274     OUT_CS(rs->inst_count);
 275
 276     if (r300screen->caps->is_r500) {
 277         OUT_CS_REG_SEQ(R500_RS_INST_0, 8);
 278     } else {
 279         OUT_CS_REG_SEQ(R300_RS_INST_0, 8);
 280     }
 281     for (i = 0; i < 8; i++) {
 282         OUT_CS(rs->inst[i]);
 283         /* debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); */
 284     }
 285
 286     /* debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count,
 287      *        rs->inst_count); */
 288
 289     END_CS;
 290 }
 291
 292 void r300_emit_sampler(struct r300_context* r300,
 293                        struct r300_sampler_state* sampler, unsigned offset)
 294 {
 295     CS_LOCALS(r300);
 296
 297     BEGIN_CS(6);
 298     OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), sampler->filter0);
 299     OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1);
 300     OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color);
 301     END_CS;
 302 }
 303
 304 void r300_emit_scissor_state(struct r300_context* r300,
 305                              struct r300_scissor_state* scissor)
 306 {
 307     CS_LOCALS(r300);
 308
 309     BEGIN_CS(3);
 310     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 311     OUT_CS(scissor->scissor_top_left);
 312     OUT_CS(scissor->scissor_bottom_right);
 313     END_CS;
 314 }
 315
 316 void r300_emit_texture(struct r300_context* r300,
 317                        struct r300_texture* tex, unsigned offset)
 318 {
 319     CS_LOCALS(r300);
 320
 321     BEGIN_CS(10);
 322     OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0);
 323     OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1);
 324     OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2);
 325     OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (offset * 4), 1);
 326     OUT_CS_RELOC(tex->buffer, 0,
 327             RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0);
 328     END_CS;
 329 }
 330
 331 void r300_emit_vertex_buffer(struct r300_context* r300)
 332 {
 333     CS_LOCALS(r300);
 334
 335     debug_printf("r300: Preparing vertex buffer %p for render, "
 336             "vertex size %d\n", r300->vbo,
 337             r300->vertex_info.vinfo.size);
 338     /* Set the pointer to our vertex buffer. The emitted values are this:
 339      * PACKET3 [3D_LOAD_VBPNTR]
 340      * COUNT   [1]
 341      * FORMAT  [size | stride << 8]
 342      * OFFSET  [offset into BO]
 343      * VBPNTR  [relocated BO]
 344      */
 345     BEGIN_CS(7);
 346     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 347     OUT_CS(1);
 348     OUT_CS(r300->vertex_info.vinfo.size |
 349             (r300->vertex_info.vinfo.size << 8));
 350     OUT_CS(r300->vbo_offset);
 351     OUT_CS_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0);
 352     END_CS;
 353 }
 354
 355 void r300_emit_vertex_format_state(struct r300_context* r300)
 356 {
 357     int i;
 358     CS_LOCALS(r300);
 359
 360     BEGIN_CS(26);
 361     OUT_CS_REG(R300_VAP_VTX_SIZE, r300->vertex_info.vinfo.size);
 362
 363     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 364     OUT_CS(r300->vertex_info.vinfo.hwfmt[0]);
 365     OUT_CS(r300->vertex_info.vinfo.hwfmt[1]);
 366     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 367     OUT_CS(r300->vertex_info.vinfo.hwfmt[2]);
 368     OUT_CS(r300->vertex_info.vinfo.hwfmt[3]);
 369     /* for (i = 0; i < 4; i++) {
 370      *    debug_printf("hwfmt%d: 0x%08x\n", i,
 371      *            r300->vertex_info.vinfo.hwfmt[i]);
 372      * } */
 373
 374     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8);
 375     for (i = 0; i < 8; i++) {
 376         OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]);
 377         /* debug_printf("prog_stream_cntl%d: 0x%08x\n", i,
 378          *        r300->vertex_info.vap_prog_stream_cntl[i]); */
 379     }
 380     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8);
 381     for (i = 0; i < 8; i++) {
 382         OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]);
 383         /* debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i,
 384          *        r300->vertex_info.vap_prog_stream_cntl_ext[i]); */
 385     }
 386     END_CS;
 387 }
 388
 389 void r300_emit_vertex_shader(struct r300_context* r300,
 390                              struct r300_vertex_shader* vs)
 391 {
 392     int i;
 393     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 394     struct r300_constant_buffer* constants =
 395         &r300->shader_constants[PIPE_SHADER_VERTEX];
 396     CS_LOCALS(r300);
 397
 398     if (!r300screen->caps->has_tcl) {
 399         debug_printf("r300: Implementation error: emit_vertex_shader called,"
 400                 " but has_tcl is FALSE!\n");
 401         return;
 402     }
 403
 404     if (constants->count) {
 405         BEGIN_CS(14 + (vs->instruction_count * 4) + (constants->count * 4));
 406     } else {
 407         BEGIN_CS(11 + (vs->instruction_count * 4));
 408     }
 409
 410     /* R300_VAP_PVS_CODE_CNTL_0
 411      * R300_VAP_PVS_CONST_CNTL
 412      * R300_VAP_PVS_CODE_CNTL_1
 413      * See the r5xx docs for instructions on how to use these.
 414      * XXX these could be optimized to select better values... */
 415     OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
 416     OUT_CS(R300_PVS_FIRST_INST(0) |
 417             R300_PVS_XYZW_VALID_INST(vs->instruction_count - 1) |
 418             R300_PVS_LAST_INST(vs->instruction_count - 1));
 419     OUT_CS(R300_PVS_MAX_CONST_ADDR(constants->count - 1));
 420     OUT_CS(vs->instruction_count - 1);
 421
 422     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 423     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4);
 424     for (i = 0; i < vs->instruction_count; i++) {
 425         OUT_CS(vs->instructions[i].inst0);
 426         OUT_CS(vs->instructions[i].inst1);
 427         OUT_CS(vs->instructions[i].inst2);
 428         OUT_CS(vs->instructions[i].inst3);
 429     }
 430
 431     if (constants->count) {
 432         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 433                 (r300screen->caps->is_r500 ?
 434                  R500_PVS_CONST_START : R300_PVS_CONST_START));
 435         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, constants->count * 4);
 436         for (i = 0; i < constants->count; i++) {
 437             OUT_CS_32F(constants->constants[i][0]);
 438             OUT_CS_32F(constants->constants[i][1]);
 439             OUT_CS_32F(constants->constants[i][2]);
 440             OUT_CS_32F(constants->constants[i][3]);
 441         }
 442     }
 443
 444     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
 445             R300_PVS_NUM_CNTLRS(5) |
 446             R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) |
 447             R300_PVS_VF_MAX_VTX_NUM(12));
 448     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 449     END_CS;
 450 }
 451
 452 void r300_emit_viewport_state(struct r300_context* r300,
 453                               struct r300_viewport_state* viewport)
 454 {
 455     CS_LOCALS(r300);
 456
 457     BEGIN_CS(9);
 458     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
 459     OUT_CS_32F(viewport->xscale);
 460     OUT_CS_32F(viewport->xoffset);
 461     OUT_CS_32F(viewport->yscale);
 462     OUT_CS_32F(viewport->yoffset);
 463     OUT_CS_32F(viewport->zscale);
 464     OUT_CS_32F(viewport->zoffset);
 465
 466     if (r300->rs_state->enable_vte) {
 467         OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
 468     } else {
 469         OUT_CS_REG(R300_VAP_VTE_CNTL, 0);
 470     }
 471     END_CS;
 472 }
 473
 474 void r300_flush_textures(struct r300_context* r300)
 475 {
 476     CS_LOCALS(r300);
 477
 478     BEGIN_CS(4);
 479     OUT_CS_REG(R300_TX_INVALTAGS, 0);
 480     OUT_CS_REG(R300_TX_ENABLE, (1 << r300->texture_count) - 1);
 481     END_CS;
 482 }
 483
 484 /* Emit all dirty state. */
 485 void r300_emit_dirty_state(struct r300_context* r300)
 486 {
 487     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 488     struct r300_texture* tex;
 489     int i, dirty_tex = 0;
 490     boolean invalid = FALSE;
 491
 492     if (!(r300->dirty_state)) {
 493         return;
 494     }
 495
 496     r300_update_derived_state(r300);
 497
 498     /* XXX check size */
 499 validate:
 500     /* Color buffers... */
 501     for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) {
 502         tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]->texture;
 503         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 504         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 505                     0, RADEON_GEM_DOMAIN_VRAM)) {
 506             r300->context.flush(&r300->context, 0, NULL);
 507             goto validate;
 508         }
 509     }
 510     /* ...depth buffer... */
 511     if (r300->framebuffer_state.zsbuf) {
 512         tex = (struct r300_texture*)r300->framebuffer_state.zsbuf->texture;
 513         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
 514         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 515                     0, RADEON_GEM_DOMAIN_VRAM)) {
 516             r300->context.flush(&r300->context, 0, NULL);
 517             goto validate;
 518         }
 519     }
 520     /* ...textures... */
 521     for (i = 0; i < r300->texture_count; i++) {
 522         tex = r300->textures[i];
 523         assert(tex && tex->buffer && "texture is marked, but NULL!");
 524         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 525                     RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) {
 526             r300->context.flush(&r300->context, 0, NULL);
 527             goto validate;
 528         }
 529     }
 530     /* ...and vertex buffer. */
 531     if (r300->vbo) {
 532         if (!r300->winsys->add_buffer(r300->winsys, r300->vbo,
 533                     RADEON_GEM_DOMAIN_GTT, 0)) {
 534             r300->context.flush(&r300->context, 0, NULL);
 535             goto validate;
 536         }
 537     } else {
 538         debug_printf("No VBO while emitting dirty state!\n");
 539     }
 540     if (r300->winsys->validate(r300->winsys)) {
 541         r300->context.flush(&r300->context, 0, NULL);
 542         if (invalid) {
 543             /* Well, hell. */
 544             exit(1);
 545         }
 546         invalid = TRUE;
 547         goto validate;
 548     }
 549
 550     if (r300->dirty_state & R300_NEW_BLEND) {
 551         r300_emit_blend_state(r300, r300->blend_state);
 552         r300->dirty_state &= ~R300_NEW_BLEND;
 553     }
 554
 555     if (r300->dirty_state & R300_NEW_BLEND_COLOR) {
 556         r300_emit_blend_color_state(r300, r300->blend_color_state);
 557         r300->dirty_state &= ~R300_NEW_BLEND_COLOR;
 558     }
 559
 560     if (r300->dirty_state & R300_NEW_CLIP) {
 561         r300_emit_clip_state(r300, &r300->clip_state);
 562         r300->dirty_state &= ~R300_NEW_CLIP;
 563     }
 564
 565     if (r300->dirty_state & R300_NEW_DSA) {
 566         r300_emit_dsa_state(r300, r300->dsa_state);
 567         r300->dirty_state &= ~R300_NEW_DSA;
 568     }
 569
 570     if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) {
 571         if (r300screen->caps->is_r500) {
 572             r500_emit_fragment_shader(r300,
 573                 (struct r500_fragment_shader*)r300->fs);
 574         } else {
 575             r300_emit_fragment_shader(r300,
 576                 (struct r300_fragment_shader*)r300->fs);
 577         }
 578         r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER;
 579     }
 580
 581     if (r300->dirty_state & R300_NEW_FRAMEBUFFERS) {
 582         r300_emit_fb_state(r300, &r300->framebuffer_state);
 583         r300->dirty_state &= ~R300_NEW_FRAMEBUFFERS;
 584     }
 585
 586     if (r300->dirty_state & R300_NEW_RASTERIZER) {
 587         r300_emit_rs_state(r300, r300->rs_state);
 588         r300->dirty_state &= ~R300_NEW_RASTERIZER;
 589     }
 590
 591     if (r300->dirty_state & R300_NEW_RS_BLOCK) {
 592         r300_emit_rs_block_state(r300, r300->rs_block);
 593         r300->dirty_state &= ~R300_NEW_RS_BLOCK;
 594     }
 595
 596     if (r300->dirty_state & R300_ANY_NEW_SAMPLERS) {
 597         for (i = 0; i < r300->sampler_count; i++) {
 598             if (r300->dirty_state & (R300_NEW_SAMPLER << i)) {
 599                 r300_emit_sampler(r300, r300->sampler_states[i], i);
 600                 r300->dirty_state &= ~(R300_NEW_SAMPLER << i);
 601                 dirty_tex++;
 602             }
 603         }
 604     }
 605
 606     if (r300->dirty_state & R300_NEW_SCISSOR) {
 607         r300_emit_scissor_state(r300, r300->scissor_state);
 608         r300->dirty_state &= ~R300_NEW_SCISSOR;
 609     }
 610
 611     if (r300->dirty_state & R300_ANY_NEW_TEXTURES) {
 612         for (i = 0; i < r300->texture_count; i++) {
 613             if (r300->dirty_state & (R300_NEW_TEXTURE << i)) {
 614                 r300_emit_texture(r300, r300->textures[i], i);
 615                 r300->dirty_state &= ~(R300_NEW_TEXTURE << i);
 616                 dirty_tex++;
 617             }
 618         }
 619     }
 620
 621     if (r300->dirty_state & R300_NEW_VIEWPORT) {
 622         r300_emit_viewport_state(r300, r300->viewport_state);
 623         r300->dirty_state &= ~R300_NEW_VIEWPORT;
 624     }
 625
 626     if (dirty_tex) {
 627         r300_flush_textures(r300);
 628     }
 629
 630     if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) {
 631         r300_emit_vertex_format_state(r300);
 632         r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT;
 633     }
 634
 635     if (r300->dirty_state & R300_NEW_VERTEX_SHADER) {
 636         r300_emit_vertex_shader(r300, r300->vs);
 637         r300->dirty_state &= ~R300_NEW_VERTEX_SHADER;
 638     }
 639
 640     /* Finally, emit the VBO. */
 641     r300_emit_vertex_buffer(r300);
 642
 643     r300->dirty_hw++;
 644 }