2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 /* r300_emit: Functions for emitting state. */
25 #include "r300_emit.h"
27 void r300_emit_blend_state(struct r300_context
* r300
,
28 struct r300_blend_state
* blend
)
32 OUT_CS_REG_SEQ(R300_RB3D_CBLEND
, 2);
33 OUT_CS(blend
->blend_control
);
34 OUT_CS(blend
->alpha_blend_control
);
35 OUT_CS_REG(R300_RB3D_ROPCNTL
, blend
->rop
);
36 OUT_CS_REG(R300_RB3D_DITHER_CTL
, blend
->dither
);
40 void r300_emit_blend_color_state(struct r300_context
* r300
,
41 struct r300_blend_color_state
* bc
)
43 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
46 if (r300screen
->caps
->is_r500
) {
48 OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR
, 2);
49 OUT_CS(bc
->blend_color_red_alpha
);
50 OUT_CS(bc
->blend_color_green_blue
);
54 OUT_CS_REG(R300_RB3D_BLEND_COLOR
, bc
->blend_color
);
59 void r300_emit_dsa_state(struct r300_context
* r300
,
60 struct r300_dsa_state
* dsa
)
62 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
65 BEGIN_CS(r300screen
->caps
->is_r500
? 8 : 8);
66 OUT_CS_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
67 /* XXX figure out the r300 counterpart for this */
68 if (r300screen
->caps
->is_r500
) {
69 /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */
71 OUT_CS_REG_SEQ(R300_ZB_CNTL
, 3);
72 OUT_CS(dsa
->z_buffer_control
);
73 OUT_CS(dsa
->z_stencil_control
);
74 OUT_CS(dsa
->stencil_ref_mask
);
75 OUT_CS_REG(R300_ZB_ZTOP
, dsa
->z_buffer_top
);
76 if (r300screen
->caps
->is_r500
) {
77 /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */
82 void r300_emit_fragment_shader(struct r300_context
* r300
,
83 struct r300_fragment_shader
* fs
)
90 OUT_CS_REG(R300_US_CONFIG
, fs
->indirections
);
91 OUT_CS_REG(R300_US_PIXSIZE
, fs
->shader
.stack_size
);
92 /* XXX figure out exactly how big the sizes are on this reg */
93 OUT_CS_REG(R300_US_CODE_OFFSET
, 0x40);
94 /* XXX figure these ones out a bit better kthnx */
95 OUT_CS_REG(R300_US_CODE_ADDR_0
, 0x0);
96 OUT_CS_REG(R300_US_CODE_ADDR_1
, 0x0);
97 OUT_CS_REG(R300_US_CODE_ADDR_2
, 0x0);
98 OUT_CS_REG(R300_US_CODE_ADDR_3
, 0x40 | R300_RGBA_OUT
);
100 for (i
= 0; i
< fs
->alu_instruction_count
; i
++) {
101 OUT_CS_REG(R300_US_ALU_RGB_INST_0
+ (4 * i
),
102 fs
->instructions
[i
].alu_rgb_inst
);
103 OUT_CS_REG(R300_US_ALU_RGB_ADDR_0
+ (4 * i
),
104 fs
->instructions
[i
].alu_rgb_addr
);
105 OUT_CS_REG(R300_US_ALU_ALPHA_INST_0
+ (4 * i
),
106 fs
->instructions
[i
].alu_alpha_inst
);
107 OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0
+ (4 * i
),
108 fs
->instructions
[i
].alu_alpha_addr
);
114 void r500_emit_fragment_shader(struct r300_context
* r300
,
115 struct r500_fragment_shader
* fs
)
118 struct r300_constant_buffer
* constants
=
119 &r300
->shader_constants
[PIPE_SHADER_FRAGMENT
];
122 BEGIN_CS(9 + (fs
->instruction_count
* 6) + (constants
->count
? 3 : 0) +
123 (constants
->count
* 4));
124 OUT_CS_REG(R500_US_CONFIG
, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO
);
125 OUT_CS_REG(R500_US_PIXSIZE
, fs
->shader
.stack_size
);
126 OUT_CS_REG(R500_US_CODE_ADDR
, R500_US_CODE_START_ADDR(0) |
127 R500_US_CODE_END_ADDR(fs
->instruction_count
));
129 OUT_CS_REG(R500_GA_US_VECTOR_INDEX
, R500_GA_US_VECTOR_INDEX_TYPE_INSTR
);
130 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA
, fs
->instruction_count
* 6);
131 for (i
= 0; i
< fs
->instruction_count
; i
++) {
132 OUT_CS(fs
->instructions
[i
].inst0
);
133 OUT_CS(fs
->instructions
[i
].inst1
);
134 OUT_CS(fs
->instructions
[i
].inst2
);
135 OUT_CS(fs
->instructions
[i
].inst3
);
136 OUT_CS(fs
->instructions
[i
].inst4
);
137 OUT_CS(fs
->instructions
[i
].inst5
);
140 if (constants
->count
) {
141 OUT_CS_REG(R500_GA_US_VECTOR_INDEX
,
142 R500_GA_US_VECTOR_INDEX_TYPE_CONST
);
143 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA
, constants
->count
* 4);
144 for (i
= 0; i
< constants
->count
; i
++) {
145 OUT_CS_32F(constants
->constants
[i
][0]);
146 OUT_CS_32F(constants
->constants
[i
][1]);
147 OUT_CS_32F(constants
->constants
[i
][2]);
148 OUT_CS_32F(constants
->constants
[i
][3]);
155 void r300_emit_fb_state(struct r300_context
* r300
,
156 struct pipe_framebuffer_state
* fb
)
158 struct r300_texture
* tex
;
163 BEGIN_CS((8 * fb
->nr_cbufs
) + (fb
->zsbuf
? 8 : 0) + 4);
164 for (i
= 0; i
< fb
->nr_cbufs
; i
++) {
165 tex
= (struct r300_texture
*)fb
->cbufs
[i
]->texture
;
166 assert(tex
&& tex
->buffer
&& "cbuf is marked, but NULL!");
167 pixpitch
= tex
->stride
/ tex
->tex
.block
.size
;
169 OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0
+ (4 * i
), 1);
170 OUT_CS_RELOC(tex
->buffer
, 0, 0, RADEON_GEM_DOMAIN_VRAM
, 0);
172 OUT_CS_REG(R300_RB3D_COLORPITCH0
+ (4 * i
), pixpitch
|
173 r300_translate_colorformat(tex
->tex
.format
));
175 OUT_CS_REG(R300_US_OUT_FMT_0
+ (4 * i
),
176 r300_translate_out_fmt(fb
->cbufs
[i
]->format
));
180 tex
= (struct r300_texture
*)fb
->zsbuf
->texture
;
181 assert(tex
&& tex
->buffer
&& "zsbuf is marked, but NULL!");
182 pixpitch
= tex
->stride
/ tex
->tex
.block
.size
;
184 OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET
, 1);
185 OUT_CS_RELOC(tex
->buffer
, 0, 0, RADEON_GEM_DOMAIN_VRAM
, 0);
187 OUT_CS_REG(R300_ZB_FORMAT
, r300_translate_zsformat(tex
->tex
.format
));
189 OUT_CS_REG(R300_ZB_DEPTHPITCH
, pixpitch
);
192 OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT
,
193 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS
|
194 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D
);
195 OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT
,
196 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE
|
197 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE
);
201 void r300_emit_rs_state(struct r300_context
* r300
, struct r300_rs_state
* rs
)
206 OUT_CS_REG(R300_VAP_CNTL_STATUS
, rs
->vap_control_status
);
207 OUT_CS_REG(R300_GA_POINT_SIZE
, rs
->point_size
);
208 OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX
, 2);
209 OUT_CS(rs
->point_minmax
);
210 OUT_CS(rs
->line_control
);
211 OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 6);
212 OUT_CS(rs
->depth_scale_front
);
213 OUT_CS(rs
->depth_offset_front
);
214 OUT_CS(rs
->depth_scale_back
);
215 OUT_CS(rs
->depth_offset_back
);
216 OUT_CS(rs
->polygon_offset_enable
);
217 OUT_CS(rs
->cull_mode
);
218 OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG
, rs
->line_stipple_config
);
219 OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE
, rs
->line_stipple_value
);
220 OUT_CS_REG(R300_GA_COLOR_CONTROL
, rs
->color_control
);
224 void r300_emit_rs_block_state(struct r300_context
* r300
,
225 struct r300_rs_block
* rs
)
228 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
232 if (r300screen
->caps
->is_r500
) {
233 OUT_CS_REG_SEQ(R500_RS_IP_0
, 8);
235 OUT_CS_REG_SEQ(R300_RS_IP_0
, 8);
237 for (i
= 0; i
< 8; i
++) {
239 /* debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); */
242 OUT_CS_REG_SEQ(R300_RS_COUNT
, 2);
244 OUT_CS(rs
->inst_count
);
246 if (r300screen
->caps
->is_r500
) {
247 OUT_CS_REG_SEQ(R500_RS_INST_0
, 8);
249 OUT_CS_REG_SEQ(R300_RS_INST_0
, 8);
251 for (i
= 0; i
< 8; i
++) {
253 /* debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); */
256 /* debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count,
257 * rs->inst_count); */
262 void r300_emit_sampler(struct r300_context
* r300
,
263 struct r300_sampler_state
* sampler
, unsigned offset
)
268 OUT_CS_REG(R300_TX_FILTER0_0
+ (offset
* 4), sampler
->filter0
);
269 OUT_CS_REG(R300_TX_FILTER1_0
+ (offset
* 4), sampler
->filter1
);
270 OUT_CS_REG(R300_TX_BORDER_COLOR_0
+ (offset
* 4), sampler
->border_color
);
274 void r300_emit_scissor_state(struct r300_context
* r300
,
275 struct r300_scissor_state
* scissor
)
280 OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL
, 2);
281 OUT_CS(scissor
->scissor_top_left
);
282 OUT_CS(scissor
->scissor_bottom_right
);
286 void r300_emit_texture(struct r300_context
* r300
,
287 struct r300_texture
* tex
, unsigned offset
)
292 OUT_CS_REG(R300_TX_FORMAT0_0
+ (offset
* 4), tex
->state
.format0
);
293 OUT_CS_REG(R300_TX_FORMAT1_0
+ (offset
* 4), tex
->state
.format1
);
294 OUT_CS_REG(R300_TX_FORMAT2_0
+ (offset
* 4), tex
->state
.format2
);
295 OUT_CS_REG_SEQ(R300_TX_OFFSET_0
+ (offset
* 4), 1);
296 OUT_CS_RELOC(tex
->buffer
, 0,
297 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0, 0);
301 void r300_emit_vertex_buffer(struct r300_context
* r300
)
305 debug_printf("r300: Preparing vertex buffer %p for render, "
306 "vertex size %d\n", r300
->vbo
,
307 r300
->vertex_info
.vinfo
.size
);
308 /* Set the pointer to our vertex buffer. The emitted values are this:
309 * PACKET3 [3D_LOAD_VBPNTR]
311 * FORMAT [size | stride << 8]
312 * OFFSET [offset into BO]
313 * VBPNTR [relocated BO]
316 OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR
, 3);
318 OUT_CS(r300
->vertex_info
.vinfo
.size
|
319 (r300
->vertex_info
.vinfo
.size
<< 8));
320 OUT_CS(r300
->vbo_offset
);
321 OUT_CS_RELOC(r300
->vbo
, 0, RADEON_GEM_DOMAIN_GTT
, 0, 0);
325 void r300_emit_vertex_format_state(struct r300_context
* r300
)
331 OUT_CS_REG(R300_VAP_VTX_SIZE
, r300
->vertex_info
.vinfo
.size
);
333 OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL
, 2);
334 OUT_CS(r300
->vertex_info
.vinfo
.hwfmt
[0]);
335 OUT_CS(r300
->vertex_info
.vinfo
.hwfmt
[1]);
336 OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0
, 2);
337 OUT_CS(r300
->vertex_info
.vinfo
.hwfmt
[2]);
338 OUT_CS(r300
->vertex_info
.vinfo
.hwfmt
[3]);
339 /* for (i = 0; i < 4; i++) {
340 * debug_printf("hwfmt%d: 0x%08x\n", i,
341 * r300->vertex_info.vinfo.hwfmt[i]);
344 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0
, 8);
345 for (i
= 0; i
< 8; i
++) {
346 OUT_CS(r300
->vertex_info
.vap_prog_stream_cntl
[i
]);
347 /* debug_printf("prog_stream_cntl%d: 0x%08x\n", i,
348 * r300->vertex_info.vap_prog_stream_cntl[i]); */
350 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0
, 8);
351 for (i
= 0; i
< 8; i
++) {
352 OUT_CS(r300
->vertex_info
.vap_prog_stream_cntl_ext
[i
]);
353 /* debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i,
354 * r300->vertex_info.vap_prog_stream_cntl_ext[i]); */
359 void r300_emit_vertex_shader(struct r300_context
* r300
,
360 struct r300_vertex_shader
* vs
)
363 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
364 struct r300_constant_buffer
* constants
=
365 &r300
->shader_constants
[PIPE_SHADER_VERTEX
];
368 if (!r300screen
->caps
->has_tcl
) {
369 debug_printf("r300: Implementation error: emit_vertex_shader called,"
370 " but has_tcl is FALSE!\n");
374 if (constants
->count
) {
375 BEGIN_CS(16 + (vs
->instruction_count
* 4) + (constants
->count
* 4));
377 BEGIN_CS(13 + (vs
->instruction_count
* 4) + (constants
->count
* 4));
380 OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0
, R300_PVS_FIRST_INST(0) |
381 R300_PVS_LAST_INST(vs
->instruction_count
- 1));
382 OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1
, vs
->instruction_count
- 1);
385 OUT_CS_REG(R300_VAP_PVS_CONST_CNTL
, 0x0);
387 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG
, 0);
388 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA
, vs
->instruction_count
* 4);
389 for (i
= 0; i
< vs
->instruction_count
; i
++) {
390 OUT_CS(vs
->instructions
[i
].inst0
);
391 OUT_CS(vs
->instructions
[i
].inst1
);
392 OUT_CS(vs
->instructions
[i
].inst2
);
393 OUT_CS(vs
->instructions
[i
].inst3
);
396 if (constants
->count
) {
397 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG
,
398 (r300screen
->caps
->is_r500
?
399 R500_PVS_CONST_START
: R300_PVS_CONST_START
));
400 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA
, constants
->count
* 4);
401 for (i
= 0; i
< constants
->count
; i
++) {
402 OUT_CS_32F(constants
->constants
[i
][0]);
403 OUT_CS_32F(constants
->constants
[i
][1]);
404 OUT_CS_32F(constants
->constants
[i
][2]);
405 OUT_CS_32F(constants
->constants
[i
][3]);
409 OUT_CS_REG(R300_VAP_CNTL
, R300_PVS_NUM_SLOTS(10) |
410 R300_PVS_NUM_CNTLRS(5) |
411 R300_PVS_NUM_FPUS(r300screen
->caps
->num_vert_fpus
) |
412 R300_PVS_VF_MAX_VTX_NUM(12));
413 OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG
, 0x0);
418 void r300_emit_viewport_state(struct r300_context
* r300
,
419 struct r300_viewport_state
* viewport
)
424 OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE
, 6);
425 OUT_CS_32F(viewport
->xscale
);
426 OUT_CS_32F(viewport
->xoffset
);
427 OUT_CS_32F(viewport
->yscale
);
428 OUT_CS_32F(viewport
->yoffset
);
429 OUT_CS_32F(viewport
->zscale
);
430 OUT_CS_32F(viewport
->zoffset
);
432 if (r300
->rs_state
->enable_vte
) {
433 OUT_CS_REG(R300_VAP_VTE_CNTL
, viewport
->vte_control
);
435 OUT_CS_REG(R300_VAP_VTE_CNTL
, 0);
440 void r300_flush_textures(struct r300_context
* r300
)
445 OUT_CS_REG(R300_TX_INVALTAGS
, 0);
446 OUT_CS_REG(R300_TX_ENABLE
, (1 << r300
->texture_count
) - 1);
450 /* Emit all dirty state. */
451 void r300_emit_dirty_state(struct r300_context
* r300
)
453 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
454 struct r300_texture
* tex
;
455 int i
, dirty_tex
= 0;
456 boolean invalid
= FALSE
;
458 if (!(r300
->dirty_state
)) {
462 r300_update_derived_state(r300
);
466 /* Color buffers... */
467 for (i
= 0; i
< r300
->framebuffer_state
.nr_cbufs
; i
++) {
468 tex
= (struct r300_texture
*)r300
->framebuffer_state
.cbufs
[i
]->texture
;
469 assert(tex
&& tex
->buffer
&& "cbuf is marked, but NULL!");
470 if (!r300
->winsys
->add_buffer(r300
->winsys
, tex
->buffer
,
471 0, RADEON_GEM_DOMAIN_VRAM
)) {
472 r300
->context
.flush(&r300
->context
, 0, NULL
);
476 /* ...depth buffer... */
477 if (r300
->framebuffer_state
.zsbuf
) {
478 tex
= (struct r300_texture
*)r300
->framebuffer_state
.zsbuf
->texture
;
479 assert(tex
&& tex
->buffer
&& "zsbuf is marked, but NULL!");
480 if (!r300
->winsys
->add_buffer(r300
->winsys
, tex
->buffer
,
481 0, RADEON_GEM_DOMAIN_VRAM
)) {
482 r300
->context
.flush(&r300
->context
, 0, NULL
);
487 for (i
= 0; i
< r300
->texture_count
; i
++) {
488 tex
= r300
->textures
[i
];
489 assert(tex
&& tex
->buffer
&& "texture is marked, but NULL!");
490 if (!r300
->winsys
->add_buffer(r300
->winsys
, tex
->buffer
,
491 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0)) {
492 r300
->context
.flush(&r300
->context
, 0, NULL
);
496 /* ...and vertex buffer. */
498 if (!r300
->winsys
->add_buffer(r300
->winsys
, r300
->vbo
,
499 RADEON_GEM_DOMAIN_GTT
, 0)) {
500 r300
->context
.flush(&r300
->context
, 0, NULL
);
504 debug_printf("No VBO while emitting dirty state!\n");
506 if (r300
->winsys
->validate(r300
->winsys
)) {
507 r300
->context
.flush(&r300
->context
, 0, NULL
);
516 if (r300
->dirty_state
& R300_NEW_BLEND
) {
517 r300_emit_blend_state(r300
, r300
->blend_state
);
518 r300
->dirty_state
&= ~R300_NEW_BLEND
;
521 if (r300
->dirty_state
& R300_NEW_BLEND_COLOR
) {
522 r300_emit_blend_color_state(r300
, r300
->blend_color_state
);
523 r300
->dirty_state
&= ~R300_NEW_BLEND_COLOR
;
526 if (r300
->dirty_state
& R300_NEW_DSA
) {
527 r300_emit_dsa_state(r300
, r300
->dsa_state
);
528 r300
->dirty_state
&= ~R300_NEW_DSA
;
531 if (r300
->dirty_state
& R300_NEW_FRAGMENT_SHADER
) {
532 if (r300screen
->caps
->is_r500
) {
533 r500_emit_fragment_shader(r300
,
534 (struct r500_fragment_shader
*)r300
->fs
);
536 r300_emit_fragment_shader(r300
,
537 (struct r300_fragment_shader
*)r300
->fs
);
539 r300
->dirty_state
&= ~R300_NEW_FRAGMENT_SHADER
;
542 if (r300
->dirty_state
& R300_NEW_FRAMEBUFFERS
) {
543 r300_emit_fb_state(r300
, &r300
->framebuffer_state
);
544 r300
->dirty_state
&= ~R300_NEW_FRAMEBUFFERS
;
547 if (r300
->dirty_state
& R300_NEW_RASTERIZER
) {
548 r300_emit_rs_state(r300
, r300
->rs_state
);
549 r300
->dirty_state
&= ~R300_NEW_RASTERIZER
;
552 if (r300
->dirty_state
& R300_NEW_RS_BLOCK
) {
553 r300_emit_rs_block_state(r300
, r300
->rs_block
);
554 r300
->dirty_state
&= ~R300_NEW_RS_BLOCK
;
557 if (r300
->dirty_state
& R300_ANY_NEW_SAMPLERS
) {
558 for (i
= 0; i
< r300
->sampler_count
; i
++) {
559 if (r300
->dirty_state
& (R300_NEW_SAMPLER
<< i
)) {
560 r300_emit_sampler(r300
, r300
->sampler_states
[i
], i
);
561 r300
->dirty_state
&= ~(R300_NEW_SAMPLER
<< i
);
567 if (r300
->dirty_state
& R300_NEW_SCISSOR
) {
568 r300_emit_scissor_state(r300
, r300
->scissor_state
);
569 r300
->dirty_state
&= ~R300_NEW_SCISSOR
;
572 if (r300
->dirty_state
& R300_ANY_NEW_TEXTURES
) {
573 for (i
= 0; i
< r300
->texture_count
; i
++) {
574 if (r300
->dirty_state
& (R300_NEW_TEXTURE
<< i
)) {
575 r300_emit_texture(r300
, r300
->textures
[i
], i
);
576 r300
->dirty_state
&= ~(R300_NEW_TEXTURE
<< i
);
582 if (r300
->dirty_state
& R300_NEW_VIEWPORT
) {
583 r300_emit_viewport_state(r300
, r300
->viewport_state
);
584 r300
->dirty_state
&= ~R300_NEW_VIEWPORT
;
588 r300_flush_textures(r300
);
591 if (r300
->dirty_state
& R300_NEW_VERTEX_FORMAT
) {
592 r300_emit_vertex_format_state(r300
);
593 r300
->dirty_state
&= ~R300_NEW_VERTEX_FORMAT
;
596 /* Finally, emit the VBO. */
597 r300_emit_vertex_buffer(r300
);