src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 /* r300_emit: Functions for emitting state. */
  24
  25 #include "r300_emit.h"
  26
  27 void r300_emit_blend_state(struct r300_context* r300,
  28                            struct r300_blend_state* blend)
  29 {
  30     CS_LOCALS(r300);
  31     BEGIN_CS(7);
  32     OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2);
  33     OUT_CS(blend->blend_control);
  34     OUT_CS(blend->alpha_blend_control);
  35     OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop);
  36     OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither);
  37     END_CS;
  38 }
  39
  40 void r300_emit_blend_color_state(struct r300_context* r300,
  41                                  struct r300_blend_color_state* bc)
  42 {
  43     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  44     CS_LOCALS(r300);
  45
  46     if (r300screen->caps->is_r500) {
  47         BEGIN_CS(3);
  48         OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
  49         OUT_CS(bc->blend_color_red_alpha);
  50         OUT_CS(bc->blend_color_green_blue);
  51         END_CS;
  52     } else {
  53         BEGIN_CS(2);
  54         OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color);
  55         END_CS;
  56     }
  57 }
  58
  59 void r300_emit_clip_state(struct r300_context* r300,
  60                           struct pipe_clip_state* clip)
  61 {
  62     int i;
  63     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  64     CS_LOCALS(r300);
  65
  66     BEGIN_CS(5 + (6 * 4));
  67     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
  68             (r300screen->caps->is_r500 ?
  69              R500_PVS_UCP_START : R300_PVS_UCP_START));
  70     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
  71     for (i = 0; i < 6; i++) {
  72         OUT_CS_32F(clip->ucp[i][0]);
  73         OUT_CS_32F(clip->ucp[i][1]);
  74         OUT_CS_32F(clip->ucp[i][2]);
  75         OUT_CS_32F(clip->ucp[i][3]);
  76     }
  77
  78     OUT_CS_REG(R300_VAP_CLIP_CNTL, ((1 << clip->nr) - 1) |
  79             R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
  80     END_CS;
  81 }
  82
  83 void r300_emit_dsa_state(struct r300_context* r300,
  84                            struct r300_dsa_state* dsa)
  85 {
  86     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  87     CS_LOCALS(r300);
  88
  89     BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8);
  90     OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
  91     /* XXX figure out the r300 counterpart for this */
  92     if (r300screen->caps->is_r500) {
  93         /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */
  94     }
  95     OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
  96     OUT_CS(dsa->z_buffer_control);
  97     OUT_CS(dsa->z_stencil_control);
  98     OUT_CS(dsa->stencil_ref_mask);
  99     OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top);
 100     if (r300screen->caps->is_r500) {
 101         /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */
 102     }
 103     END_CS;
 104 }
 105
 106 void r300_emit_fragment_shader(struct r300_context* r300,
 107                                struct r300_fragment_shader* fs)
 108 {
 109     int i;
 110     CS_LOCALS(r300);
 111
 112     BEGIN_CS(22);
 113
 114     OUT_CS_REG(R300_US_CONFIG, fs->indirections);
 115     OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size);
 116     /* XXX figure out exactly how big the sizes are on this reg */
 117     OUT_CS_REG(R300_US_CODE_OFFSET, 0x40);
 118     /* XXX figure these ones out a bit better kthnx */
 119     OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0);
 120     OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
 121     OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
 122     OUT_CS_REG(R300_US_CODE_ADDR_3, 0x40 | R300_RGBA_OUT);
 123
 124     for (i = 0; i < fs->alu_instruction_count; i++) {
 125         OUT_CS_REG(R300_US_ALU_RGB_INST_0 + (4 * i),
 126             fs->instructions[i].alu_rgb_inst);
 127         OUT_CS_REG(R300_US_ALU_RGB_ADDR_0 + (4 * i),
 128             fs->instructions[i].alu_rgb_addr);
 129         OUT_CS_REG(R300_US_ALU_ALPHA_INST_0 + (4 * i),
 130             fs->instructions[i].alu_alpha_inst);
 131         OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0 + (4 * i),
 132             fs->instructions[i].alu_alpha_addr);
 133     }
 134
 135     END_CS;
 136 }
 137
 138 void r500_emit_fragment_shader(struct r300_context* r300,
 139                                struct r500_fragment_shader* fs)
 140 {
 141     int i;
 142     struct r300_constant_buffer* constants =
 143         &r300->shader_constants[PIPE_SHADER_FRAGMENT];
 144     CS_LOCALS(r300);
 145
 146     BEGIN_CS(9 + (fs->instruction_count * 6) + (constants->count ? 3 : 0) +
 147             (constants->count * 4));
 148     OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
 149     OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size);
 150     OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
 151             R500_US_CODE_END_ADDR(fs->instruction_count));
 152
 153     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
 154     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, fs->instruction_count * 6);
 155     for (i = 0; i < fs->instruction_count; i++) {
 156         OUT_CS(fs->instructions[i].inst0);
 157         OUT_CS(fs->instructions[i].inst1);
 158         OUT_CS(fs->instructions[i].inst2);
 159         OUT_CS(fs->instructions[i].inst3);
 160         OUT_CS(fs->instructions[i].inst4);
 161         OUT_CS(fs->instructions[i].inst5);
 162     }
 163
 164     if (constants->count) {
 165         OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 166                 R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 167         OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->count * 4);
 168         for (i = 0; i < constants->count; i++) {
 169             OUT_CS_32F(constants->constants[i][0]);
 170             OUT_CS_32F(constants->constants[i][1]);
 171             OUT_CS_32F(constants->constants[i][2]);
 172             OUT_CS_32F(constants->constants[i][3]);
 173         }
 174     }
 175
 176     END_CS;
 177 }
 178
 179 void r300_emit_fb_state(struct r300_context* r300,
 180                         struct pipe_framebuffer_state* fb)
 181 {
 182     struct r300_texture* tex;
 183     unsigned pixpitch;
 184     int i;
 185     CS_LOCALS(r300);
 186
 187     BEGIN_CS((8 * fb->nr_cbufs) + (fb->zsbuf ? 8 : 0) + 4);
 188     for (i = 0; i < fb->nr_cbufs; i++) {
 189         tex = (struct r300_texture*)fb->cbufs[i]->texture;
 190         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 191         pixpitch = tex->stride / tex->tex.block.size;
 192
 193         OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
 194         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 195
 196         OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), pixpitch |
 197             r300_translate_colorformat(tex->tex.format));
 198
 199         OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i),
 200             r300_translate_out_fmt(fb->cbufs[i]->format));
 201     }
 202
 203     if (fb->zsbuf) {
 204         tex = (struct r300_texture*)fb->zsbuf->texture;
 205         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
 206         pixpitch = tex->stride / tex->tex.block.size;
 207
 208         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 209         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 210
 211         OUT_CS_REG(R300_ZB_FORMAT, r300_translate_zsformat(tex->tex.format));
 212
 213         OUT_CS_REG(R300_ZB_DEPTHPITCH, pixpitch);
 214     }
 215
 216     OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 217         R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 218         R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 219     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
 220         R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 221         R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 222     END_CS;
 223 }
 224
 225 void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs)
 226 {
 227     CS_LOCALS(r300);
 228
 229     BEGIN_CS(20);
 230     OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
 231     OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
 232     OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
 233     OUT_CS(rs->point_minmax);
 234     OUT_CS(rs->line_control);
 235     OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6);
 236     OUT_CS(rs->depth_scale_front);
 237     OUT_CS(rs->depth_offset_front);
 238     OUT_CS(rs->depth_scale_back);
 239     OUT_CS(rs->depth_offset_back);
 240     OUT_CS(rs->polygon_offset_enable);
 241     OUT_CS(rs->cull_mode);
 242     OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
 243     OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
 244     OUT_CS_REG(R300_GA_COLOR_CONTROL, rs->color_control);
 245     END_CS;
 246 }
 247
 248 void r300_emit_rs_block_state(struct r300_context* r300,
 249                               struct r300_rs_block* rs)
 250 {
 251     int i;
 252     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 253     CS_LOCALS(r300);
 254
 255     BEGIN_CS(21);
 256     if (r300screen->caps->is_r500) {
 257         OUT_CS_REG_SEQ(R500_RS_IP_0, 8);
 258     } else {
 259         OUT_CS_REG_SEQ(R300_RS_IP_0, 8);
 260     }
 261     for (i = 0; i < 8; i++) {
 262         OUT_CS(rs->ip[i]);
 263         /* debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); */
 264     }
 265
 266     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 267     OUT_CS(rs->count);
 268     OUT_CS(rs->inst_count);
 269
 270     if (r300screen->caps->is_r500) {
 271         OUT_CS_REG_SEQ(R500_RS_INST_0, 8);
 272     } else {
 273         OUT_CS_REG_SEQ(R300_RS_INST_0, 8);
 274     }
 275     for (i = 0; i < 8; i++) {
 276         OUT_CS(rs->inst[i]);
 277         /* debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); */
 278     }
 279
 280     /* debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count,
 281      *        rs->inst_count); */
 282
 283     END_CS;
 284 }
 285
 286 void r300_emit_sampler(struct r300_context* r300,
 287                        struct r300_sampler_state* sampler, unsigned offset)
 288 {
 289     CS_LOCALS(r300);
 290
 291     BEGIN_CS(6);
 292     OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), sampler->filter0);
 293     OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1);
 294     OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color);
 295     END_CS;
 296 }
 297
 298 void r300_emit_scissor_state(struct r300_context* r300,
 299                              struct r300_scissor_state* scissor)
 300 {
 301     CS_LOCALS(r300);
 302
 303     BEGIN_CS(3);
 304     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 305     OUT_CS(scissor->scissor_top_left);
 306     OUT_CS(scissor->scissor_bottom_right);
 307     END_CS;
 308 }
 309
 310 void r300_emit_texture(struct r300_context* r300,
 311                        struct r300_texture* tex, unsigned offset)
 312 {
 313     CS_LOCALS(r300);
 314
 315     BEGIN_CS(10);
 316     OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0);
 317     OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1);
 318     OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2);
 319     OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (offset * 4), 1);
 320     OUT_CS_RELOC(tex->buffer, 0,
 321             RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0);
 322     END_CS;
 323 }
 324
 325 void r300_emit_vertex_buffer(struct r300_context* r300)
 326 {
 327     CS_LOCALS(r300);
 328
 329     debug_printf("r300: Preparing vertex buffer %p for render, "
 330             "vertex size %d\n", r300->vbo,
 331             r300->vertex_info.vinfo.size);
 332     /* Set the pointer to our vertex buffer. The emitted values are this:
 333      * PACKET3 [3D_LOAD_VBPNTR]
 334      * COUNT   [1]
 335      * FORMAT  [size | stride << 8]
 336      * OFFSET  [offset into BO]
 337      * VBPNTR  [relocated BO]
 338      */
 339     BEGIN_CS(7);
 340     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 341     OUT_CS(1);
 342     OUT_CS(r300->vertex_info.vinfo.size |
 343             (r300->vertex_info.vinfo.size << 8));
 344     OUT_CS(r300->vbo_offset);
 345     OUT_CS_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0);
 346     END_CS;
 347 }
 348
 349 void r300_emit_vertex_format_state(struct r300_context* r300)
 350 {
 351     int i;
 352     CS_LOCALS(r300);
 353
 354     BEGIN_CS(26);
 355     OUT_CS_REG(R300_VAP_VTX_SIZE, r300->vertex_info.vinfo.size);
 356
 357     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 358     OUT_CS(r300->vertex_info.vinfo.hwfmt[0]);
 359     OUT_CS(r300->vertex_info.vinfo.hwfmt[1]);
 360     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 361     OUT_CS(r300->vertex_info.vinfo.hwfmt[2]);
 362     OUT_CS(r300->vertex_info.vinfo.hwfmt[3]);
 363     /* for (i = 0; i < 4; i++) {
 364      *    debug_printf("hwfmt%d: 0x%08x\n", i,
 365      *            r300->vertex_info.vinfo.hwfmt[i]);
 366      * } */
 367
 368     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8);
 369     for (i = 0; i < 8; i++) {
 370         OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]);
 371         /* debug_printf("prog_stream_cntl%d: 0x%08x\n", i,
 372          *        r300->vertex_info.vap_prog_stream_cntl[i]); */
 373     }
 374     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8);
 375     for (i = 0; i < 8; i++) {
 376         OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]);
 377         /* debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i,
 378          *        r300->vertex_info.vap_prog_stream_cntl_ext[i]); */
 379     }
 380     END_CS;
 381 }
 382
 383 void r300_emit_vertex_shader(struct r300_context* r300,
 384                              struct r300_vertex_shader* vs)
 385 {
 386     int i;
 387     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 388     struct r300_constant_buffer* constants =
 389         &r300->shader_constants[PIPE_SHADER_VERTEX];
 390     CS_LOCALS(r300);
 391
 392     if (!r300screen->caps->has_tcl) {
 393         debug_printf("r300: Implementation error: emit_vertex_shader called,"
 394                 " but has_tcl is FALSE!\n");
 395         return;
 396     }
 397
 398     if (constants->count) {
 399         BEGIN_CS(14 + (vs->instruction_count * 4) + (constants->count * 4));
 400     } else {
 401         BEGIN_CS(11 + (vs->instruction_count * 4));
 402     }
 403
 404     /* R300_VAP_PVS_CODE_CNTL_0
 405      * R300_VAP_PVS_CONST_CNTL
 406      * R300_VAP_PVS_CODE_CNTL_1
 407      * See the r5xx docs for instructions on how to use these.
 408      * XXX these could be optimized to select better values... */
 409     OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
 410     OUT_CS(R300_PVS_FIRST_INST(0) |
 411             R300_PVS_XYZW_VALID_INST(vs->instruction_count - 1) |
 412             R300_PVS_LAST_INST(vs->instruction_count - 1));
 413     OUT_CS(R300_PVS_MAX_CONST_ADDR(constants->count - 1));
 414     OUT_CS(vs->instruction_count - 1);
 415
 416     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 417     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4);
 418     for (i = 0; i < vs->instruction_count; i++) {
 419         OUT_CS(vs->instructions[i].inst0);
 420         OUT_CS(vs->instructions[i].inst1);
 421         OUT_CS(vs->instructions[i].inst2);
 422         OUT_CS(vs->instructions[i].inst3);
 423     }
 424
 425     if (constants->count) {
 426         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 427                 (r300screen->caps->is_r500 ?
 428                  R500_PVS_CONST_START : R300_PVS_CONST_START));
 429         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, constants->count * 4);
 430         for (i = 0; i < constants->count; i++) {
 431             OUT_CS_32F(constants->constants[i][0]);
 432             OUT_CS_32F(constants->constants[i][1]);
 433             OUT_CS_32F(constants->constants[i][2]);
 434             OUT_CS_32F(constants->constants[i][3]);
 435         }
 436     }
 437
 438     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
 439             R300_PVS_NUM_CNTLRS(5) |
 440             R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) |
 441             R300_PVS_VF_MAX_VTX_NUM(12));
 442     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 443     END_CS;
 444 }
 445
 446 void r300_emit_viewport_state(struct r300_context* r300,
 447                               struct r300_viewport_state* viewport)
 448 {
 449     CS_LOCALS(r300);
 450
 451     BEGIN_CS(9);
 452     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
 453     OUT_CS_32F(viewport->xscale);
 454     OUT_CS_32F(viewport->xoffset);
 455     OUT_CS_32F(viewport->yscale);
 456     OUT_CS_32F(viewport->yoffset);
 457     OUT_CS_32F(viewport->zscale);
 458     OUT_CS_32F(viewport->zoffset);
 459
 460     if (r300->rs_state->enable_vte) {
 461         OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
 462     } else {
 463         OUT_CS_REG(R300_VAP_VTE_CNTL, 0);
 464     }
 465     END_CS;
 466 }
 467
 468 void r300_flush_textures(struct r300_context* r300)
 469 {
 470     CS_LOCALS(r300);
 471
 472     BEGIN_CS(4);
 473     OUT_CS_REG(R300_TX_INVALTAGS, 0);
 474     OUT_CS_REG(R300_TX_ENABLE, (1 << r300->texture_count) - 1);
 475     END_CS;
 476 }
 477
 478 /* Emit all dirty state. */
 479 void r300_emit_dirty_state(struct r300_context* r300)
 480 {
 481     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 482     struct r300_texture* tex;
 483     int i, dirty_tex = 0;
 484     boolean invalid = FALSE;
 485
 486     if (!(r300->dirty_state)) {
 487         return;
 488     }
 489
 490     r300_update_derived_state(r300);
 491
 492     /* XXX check size */
 493 validate:
 494     /* Color buffers... */
 495     for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) {
 496         tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]->texture;
 497         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 498         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 499                     0, RADEON_GEM_DOMAIN_VRAM)) {
 500             r300->context.flush(&r300->context, 0, NULL);
 501             goto validate;
 502         }
 503     }
 504     /* ...depth buffer... */
 505     if (r300->framebuffer_state.zsbuf) {
 506         tex = (struct r300_texture*)r300->framebuffer_state.zsbuf->texture;
 507         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
 508         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 509                     0, RADEON_GEM_DOMAIN_VRAM)) {
 510             r300->context.flush(&r300->context, 0, NULL);
 511             goto validate;
 512         }
 513     }
 514     /* ...textures... */
 515     for (i = 0; i < r300->texture_count; i++) {
 516         tex = r300->textures[i];
 517         assert(tex && tex->buffer && "texture is marked, but NULL!");
 518         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 519                     RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) {
 520             r300->context.flush(&r300->context, 0, NULL);
 521             goto validate;
 522         }
 523     }
 524     /* ...and vertex buffer. */
 525     if (r300->vbo) {
 526         if (!r300->winsys->add_buffer(r300->winsys, r300->vbo,
 527                     RADEON_GEM_DOMAIN_GTT, 0)) {
 528             r300->context.flush(&r300->context, 0, NULL);
 529             goto validate;
 530         }
 531     } else {
 532         debug_printf("No VBO while emitting dirty state!\n");
 533     }
 534     if (r300->winsys->validate(r300->winsys)) {
 535         r300->context.flush(&r300->context, 0, NULL);
 536         if (invalid) {
 537             /* Well, hell. */
 538             exit(1);
 539         }
 540         invalid = TRUE;
 541         goto validate;
 542     }
 543
 544     if (r300->dirty_state & R300_NEW_BLEND) {
 545         r300_emit_blend_state(r300, r300->blend_state);
 546         r300->dirty_state &= ~R300_NEW_BLEND;
 547     }
 548
 549     if (r300->dirty_state & R300_NEW_BLEND_COLOR) {
 550         r300_emit_blend_color_state(r300, r300->blend_color_state);
 551         r300->dirty_state &= ~R300_NEW_BLEND_COLOR;
 552     }
 553
 554     if (r300->dirty_state & R300_NEW_CLIP) {
 555         r300_emit_clip_state(r300, &r300->clip_state);
 556         r300->dirty_state &= ~R300_NEW_CLIP;
 557     }
 558
 559     if (r300->dirty_state & R300_NEW_DSA) {
 560         r300_emit_dsa_state(r300, r300->dsa_state);
 561         r300->dirty_state &= ~R300_NEW_DSA;
 562     }
 563
 564     if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) {
 565         if (r300screen->caps->is_r500) {
 566             r500_emit_fragment_shader(r300,
 567                 (struct r500_fragment_shader*)r300->fs);
 568         } else {
 569             r300_emit_fragment_shader(r300,
 570                 (struct r300_fragment_shader*)r300->fs);
 571         }
 572         r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER;
 573     }
 574
 575     if (r300->dirty_state & R300_NEW_FRAMEBUFFERS) {
 576         r300_emit_fb_state(r300, &r300->framebuffer_state);
 577         r300->dirty_state &= ~R300_NEW_FRAMEBUFFERS;
 578     }
 579
 580     if (r300->dirty_state & R300_NEW_RASTERIZER) {
 581         r300_emit_rs_state(r300, r300->rs_state);
 582         r300->dirty_state &= ~R300_NEW_RASTERIZER;
 583     }
 584
 585     if (r300->dirty_state & R300_NEW_RS_BLOCK) {
 586         r300_emit_rs_block_state(r300, r300->rs_block);
 587         r300->dirty_state &= ~R300_NEW_RS_BLOCK;
 588     }
 589
 590     if (r300->dirty_state & R300_ANY_NEW_SAMPLERS) {
 591         for (i = 0; i < r300->sampler_count; i++) {
 592             if (r300->dirty_state & (R300_NEW_SAMPLER << i)) {
 593                 r300_emit_sampler(r300, r300->sampler_states[i], i);
 594                 r300->dirty_state &= ~(R300_NEW_SAMPLER << i);
 595                 dirty_tex++;
 596             }
 597         }
 598     }
 599
 600     if (r300->dirty_state & R300_NEW_SCISSOR) {
 601         r300_emit_scissor_state(r300, r300->scissor_state);
 602         r300->dirty_state &= ~R300_NEW_SCISSOR;
 603     }
 604
 605     if (r300->dirty_state & R300_ANY_NEW_TEXTURES) {
 606         for (i = 0; i < r300->texture_count; i++) {
 607             if (r300->dirty_state & (R300_NEW_TEXTURE << i)) {
 608                 r300_emit_texture(r300, r300->textures[i], i);
 609                 r300->dirty_state &= ~(R300_NEW_TEXTURE << i);
 610                 dirty_tex++;
 611             }
 612         }
 613     }
 614
 615     if (r300->dirty_state & R300_NEW_VIEWPORT) {
 616         r300_emit_viewport_state(r300, r300->viewport_state);
 617         r300->dirty_state &= ~R300_NEW_VIEWPORT;
 618     }
 619
 620     if (dirty_tex) {
 621         r300_flush_textures(r300);
 622     }
 623
 624     if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) {
 625         r300_emit_vertex_format_state(r300);
 626         r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT;
 627     }
 628
 629     /* Finally, emit the VBO. */
 630     r300_emit_vertex_buffer(r300);
 631
 632     r300->dirty_hw++;
 633 }