r300g: more reasonable MSPOS defaults in error path
[mesa.git] / src / gallium / drivers / r300 / r300_emit.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_emit: Functions for emitting state. */
25
26 #include "util/u_format.h"
27 #include "util/u_math.h"
28 #include "util/u_simple_list.h"
29
30 #include "r300_context.h"
31 #include "r300_cs.h"
32 #include "r300_emit.h"
33 #include "r300_fs.h"
34 #include "r300_screen.h"
35 #include "r300_screen_buffer.h"
36 #include "r300_vs.h"
37
38 void r300_emit_blend_state(struct r300_context* r300,
39 unsigned size, void* state)
40 {
41 struct r300_blend_state* blend = (struct r300_blend_state*)state;
42 struct pipe_framebuffer_state* fb =
43 (struct pipe_framebuffer_state*)r300->fb_state.state;
44 CS_LOCALS(r300);
45
46 if (fb->nr_cbufs) {
47 WRITE_CS_TABLE(blend->cb, size);
48 } else {
49 WRITE_CS_TABLE(blend->cb_no_readwrite, size);
50 }
51 }
52
53 void r300_emit_blend_color_state(struct r300_context* r300,
54 unsigned size, void* state)
55 {
56 struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
57 CS_LOCALS(r300);
58
59 WRITE_CS_TABLE(bc->cb, size);
60 }
61
62 void r300_emit_clip_state(struct r300_context* r300,
63 unsigned size, void* state)
64 {
65 struct r300_clip_state* clip = (struct r300_clip_state*)state;
66 CS_LOCALS(r300);
67
68 WRITE_CS_TABLE(clip->cb, size);
69 }
70
71 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
72 {
73 struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
74 struct pipe_framebuffer_state* fb =
75 (struct pipe_framebuffer_state*)r300->fb_state.state;
76 CS_LOCALS(r300);
77
78 if (fb->zsbuf) {
79 WRITE_CS_TABLE(&dsa->cb_begin, size);
80 } else {
81 WRITE_CS_TABLE(dsa->cb_no_readwrite, size);
82 }
83 }
84
85 static const float * get_rc_constant_state(
86 struct r300_context * r300,
87 struct rc_constant * constant)
88 {
89 struct r300_textures_state* texstate = r300->textures_state.state;
90 static float vec[4] = { 0.0, 0.0, 0.0, 1.0 };
91 struct pipe_resource *tex;
92
93 assert(constant->Type == RC_CONSTANT_STATE);
94
95 switch (constant->u.State[0]) {
96 /* Factor for converting rectangle coords to
97 * normalized coords. Should only show up on non-r500. */
98 case RC_STATE_R300_TEXRECT_FACTOR:
99 tex = texstate->sampler_views[constant->u.State[1]]->base.texture;
100 vec[0] = 1.0 / tex->width0;
101 vec[1] = 1.0 / tex->height0;
102 break;
103
104 case RC_STATE_R300_VIEWPORT_SCALE:
105 vec[0] = r300->viewport.scale[0];
106 vec[1] = r300->viewport.scale[1];
107 vec[2] = r300->viewport.scale[2];
108 break;
109
110 case RC_STATE_R300_VIEWPORT_OFFSET:
111 vec[0] = r300->viewport.translate[0];
112 vec[1] = r300->viewport.translate[1];
113 vec[2] = r300->viewport.translate[2];
114 break;
115
116 default:
117 fprintf(stderr, "r300: Implementation error: "
118 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
119 }
120
121 /* This should either be (0, 0, 0, 1), which should be a relatively safe
122 * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
123 * state factors. */
124 return vec;
125 }
126
127 /* Convert a normal single-precision float into the 7.16 format
128 * used by the R300 fragment shader.
129 */
130 uint32_t pack_float24(float f)
131 {
132 union {
133 float fl;
134 uint32_t u;
135 } u;
136 float mantissa;
137 int exponent;
138 uint32_t float24 = 0;
139
140 if (f == 0.0)
141 return 0;
142
143 u.fl = f;
144
145 mantissa = frexpf(f, &exponent);
146
147 /* Handle -ve */
148 if (mantissa < 0) {
149 float24 |= (1 << 23);
150 mantissa = mantissa * -1.0;
151 }
152 /* Handle exponent, bias of 63 */
153 exponent += 62;
154 float24 |= (exponent << 16);
155 /* Kill 7 LSB of mantissa */
156 float24 |= (u.u & 0x7FFFFF) >> 7;
157
158 return float24;
159 }
160
161 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
162 {
163 struct r300_fragment_shader *fs = r300_fs(r300);
164 CS_LOCALS(r300);
165
166 WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
167 }
168
169 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
170 {
171 struct r300_fragment_shader *fs = r300_fs(r300);
172 struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
173 unsigned count = fs->shader->externals_count * 4;
174 CS_LOCALS(r300);
175
176 if (count == 0)
177 return;
178
179 BEGIN_CS(size);
180 OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count);
181 OUT_CS_TABLE(buf->constants, count);
182 END_CS;
183 }
184
185 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
186 {
187 struct r300_fragment_shader *fs = r300_fs(r300);
188 struct rc_constant_list *constants = &fs->shader->code.constants;
189 unsigned i;
190 unsigned count = fs->shader->rc_state_count;
191 unsigned first = fs->shader->externals_count;
192 unsigned end = constants->Count;
193 uint32_t cdata[4];
194 unsigned j;
195 CS_LOCALS(r300);
196
197 if (count == 0)
198 return;
199
200 BEGIN_CS(size);
201 for(i = first; i < end; ++i) {
202 if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
203 const float *data =
204 get_rc_constant_state(r300, &constants->Constants[i]);
205
206 for (j = 0; j < 4; j++)
207 cdata[j] = pack_float24(data[j]);
208
209 OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
210 OUT_CS_TABLE(cdata, 4);
211 }
212 }
213 END_CS;
214 }
215
216 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
217 {
218 struct r300_fragment_shader *fs = r300_fs(r300);
219 CS_LOCALS(r300);
220
221 WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
222 }
223
224 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
225 {
226 struct r300_fragment_shader *fs = r300_fs(r300);
227 struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
228 unsigned count = fs->shader->externals_count * 4;
229 CS_LOCALS(r300);
230
231 if (count == 0)
232 return;
233
234 BEGIN_CS(size);
235 OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
236 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count);
237 OUT_CS_TABLE(buf->constants, count);
238 END_CS;
239 }
240
241 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
242 {
243 struct r300_fragment_shader *fs = r300_fs(r300);
244 struct rc_constant_list *constants = &fs->shader->code.constants;
245 unsigned i;
246 unsigned count = fs->shader->rc_state_count;
247 unsigned first = fs->shader->externals_count;
248 unsigned end = constants->Count;
249 CS_LOCALS(r300);
250
251 if (count == 0)
252 return;
253
254 BEGIN_CS(size);
255 for(i = first; i < end; ++i) {
256 if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
257 const float *data =
258 get_rc_constant_state(r300, &constants->Constants[i]);
259
260 OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
261 R500_GA_US_VECTOR_INDEX_TYPE_CONST |
262 (i & R500_GA_US_VECTOR_INDEX_MASK));
263 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
264 OUT_CS_TABLE(data, 4);
265 }
266 }
267 END_CS;
268 }
269
270 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
271 {
272 struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
273 struct r300_surface* surf;
274 unsigned i;
275 CS_LOCALS(r300);
276
277 BEGIN_CS(size);
278
279 /* Flush and free renderbuffer caches. */
280 OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
281 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
282 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
283 OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
284 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
285 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
286
287 /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
288 * what we usually want. */
289 if (r300->screen->caps.is_r500) {
290 OUT_CS_REG(R300_RB3D_CCTL,
291 R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE);
292 } else {
293 OUT_CS_REG(R300_RB3D_CCTL, 0);
294 }
295
296 /* Set up colorbuffers. */
297 for (i = 0; i < fb->nr_cbufs; i++) {
298 surf = r300_surface(fb->cbufs[i]);
299
300 OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
301 OUT_CS_RELOC(surf->buffer, surf->offset, 0, surf->domain, 0);
302
303 OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1);
304 OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain, 0);
305
306 OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), surf->format);
307 }
308 for (; i < 4; i++) {
309 OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), R300_US_OUT_FMT_UNUSED);
310 }
311
312 /* Set up a zbuffer. */
313 if (fb->zsbuf) {
314 surf = r300_surface(fb->zsbuf);
315
316 OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
317 OUT_CS_RELOC(surf->buffer, surf->offset, 0, surf->domain, 0);
318
319 OUT_CS_REG(R300_ZB_FORMAT, surf->format);
320
321 OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
322 OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain, 0);
323 }
324
325 OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
326 if (r300->screen->caps.is_r500) {
327 OUT_CS(0);
328 OUT_CS(((fb->width - 1) << R300_SCISSORS_X_SHIFT) |
329 ((fb->height - 1) << R300_SCISSORS_Y_SHIFT));
330 } else {
331 OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
332 (1440 << R300_SCISSORS_Y_SHIFT));
333 OUT_CS(((fb->width + 1440-1) << R300_SCISSORS_X_SHIFT) |
334 ((fb->height + 1440-1) << R300_SCISSORS_Y_SHIFT));
335 }
336 END_CS;
337 }
338
339 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
340 {
341 struct r300_query *query = r300->query_current;
342 CS_LOCALS(r300);
343
344 if (!query)
345 return;
346
347 BEGIN_CS(size);
348 if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
349 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
350 } else {
351 OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
352 }
353 OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
354 END_CS;
355 query->begin_emitted = TRUE;
356 query->flushed = FALSE;
357 }
358
359 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
360 struct r300_query *query)
361 {
362 struct r300_capabilities* caps = &r300->screen->caps;
363 struct r300_winsys_buffer *buf = r300->query_current->buffer;
364 CS_LOCALS(r300);
365
366 assert(caps->num_frag_pipes);
367
368 BEGIN_CS(6 * caps->num_frag_pipes + 2);
369 /* I'm not so sure I like this switch, but it's hard to be elegant
370 * when there's so many special cases...
371 *
372 * So here's the basic idea. For each pipe, enable writes to it only,
373 * then put out the relocation for ZPASS_ADDR, taking into account a
374 * 4-byte offset for each pipe. RV380 and older are special; they have
375 * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
376 * so there's a chipset cap for that. */
377 switch (caps->num_frag_pipes) {
378 case 4:
379 /* pipe 3 only */
380 OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
381 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
382 OUT_CS_RELOC(buf, (query->num_results + 3) * 4,
383 0, query->domain, 0);
384 case 3:
385 /* pipe 2 only */
386 OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
387 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
388 OUT_CS_RELOC(buf, (query->num_results + 2) * 4,
389 0, query->domain, 0);
390 case 2:
391 /* pipe 1 only */
392 /* As mentioned above, accomodate RV380 and older. */
393 OUT_CS_REG(R300_SU_REG_DEST,
394 1 << (caps->high_second_pipe ? 3 : 1));
395 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
396 OUT_CS_RELOC(buf, (query->num_results + 1) * 4,
397 0, query->domain, 0);
398 case 1:
399 /* pipe 0 only */
400 OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
401 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
402 OUT_CS_RELOC(buf, (query->num_results + 0) * 4,
403 0, query->domain, 0);
404 break;
405 default:
406 fprintf(stderr, "r300: Implementation error: Chipset reports %d"
407 " pixel pipes!\n", caps->num_frag_pipes);
408 abort();
409 }
410
411 /* And, finally, reset it to normal... */
412 OUT_CS_REG(R300_SU_REG_DEST, 0xF);
413 END_CS;
414 }
415
416 static void rv530_emit_query_end_single_z(struct r300_context *r300,
417 struct r300_query *query)
418 {
419 struct r300_winsys_buffer *buf = r300->query_current->buffer;
420 CS_LOCALS(r300);
421
422 BEGIN_CS(8);
423 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
424 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
425 OUT_CS_RELOC(buf, query->num_results * 4, 0, query->domain, 0);
426 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
427 END_CS;
428 }
429
430 static void rv530_emit_query_end_double_z(struct r300_context *r300,
431 struct r300_query *query)
432 {
433 struct r300_winsys_buffer *buf = r300->query_current->buffer;
434 CS_LOCALS(r300);
435
436 BEGIN_CS(14);
437 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
438 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
439 OUT_CS_RELOC(buf, (query->num_results + 0) * 4, 0, query->domain, 0);
440 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
441 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
442 OUT_CS_RELOC(buf, (query->num_results + 1) * 4, 0, query->domain, 0);
443 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
444 END_CS;
445 }
446
447 void r300_emit_query_end(struct r300_context* r300)
448 {
449 struct r300_capabilities *caps = &r300->screen->caps;
450 struct r300_query *query = r300->query_current;
451
452 if (!query)
453 return;
454
455 if (query->begin_emitted == FALSE)
456 return;
457
458 if (caps->family == CHIP_FAMILY_RV530) {
459 if (caps->num_z_pipes == 2)
460 rv530_emit_query_end_double_z(r300, query);
461 else
462 rv530_emit_query_end_single_z(r300, query);
463 } else
464 r300_emit_query_end_frag_pipes(r300, query);
465
466 query->begin_emitted = FALSE;
467 query->num_results += query->num_pipes;
468
469 /* XXX grab all the results and reset the counter. */
470 if (query->num_results >= query->buffer_size / 4 - 4) {
471 query->num_results = (query->buffer_size / 4) / 2;
472 fprintf(stderr, "r300: Rewinding OQBO...\n");
473 }
474 }
475
476 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
477 {
478 struct r300_rs_state* rs = state;
479 struct pipe_framebuffer_state* fb = r300->fb_state.state;
480 float scale, offset;
481 unsigned mspos0, mspos1, aa_config;
482 CS_LOCALS(r300);
483
484 BEGIN_CS(size);
485 OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
486
487 /* Multisampling. Depends on framebuffer sample count. */
488 if (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
489 if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
490 aa_config = R300_GB_AA_CONFIG_AA_ENABLE;
491 /* Subsample placement. These may not be optimal. */
492 switch (fb->cbufs[0]->texture->nr_samples) {
493 case 2:
494 aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2;
495 mspos0 = 0x33996633;
496 mspos1 = 0x6666663;
497 break;
498 case 3:
499 aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3;
500 mspos0 = 0x33936933;
501 mspos1 = 0x6666663;
502 break;
503 case 4:
504 aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4;
505 mspos0 = 0x33939933;
506 mspos1 = 0x3966663;
507 break;
508 case 6:
509 aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6;
510 mspos0 = 0x22a2aa22;
511 mspos1 = 0x2a65672;
512 break;
513 default:
514 debug_printf("r300: Bad number of multisamples!\n");
515 mspos0 = rs->multisample_position_0;
516 mspos1 = rs->multisample_position_1;
517 break;
518 }
519
520 OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
521 OUT_CS(mspos0);
522 OUT_CS(mspos1);
523
524 OUT_CS_REG(R300_GB_AA_CONFIG, aa_config);
525 } else {
526 OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
527 OUT_CS(rs->multisample_position_0);
528 OUT_CS(rs->multisample_position_1);
529
530 OUT_CS_REG(R300_GB_AA_CONFIG, rs->antialiasing_config);
531 }
532 }
533
534 OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
535 OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
536 OUT_CS(rs->point_minmax);
537 OUT_CS(rs->line_control);
538
539 if (rs->polygon_offset_enable) {
540 scale = rs->depth_scale * 12;
541 offset = rs->depth_offset;
542
543 switch (r300->zbuffer_bpp) {
544 case 16:
545 offset *= 4;
546 break;
547 case 24:
548 offset *= 2;
549 break;
550 }
551
552 OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
553 OUT_CS_32F(scale);
554 OUT_CS_32F(offset);
555 OUT_CS_32F(scale);
556 OUT_CS_32F(offset);
557 }
558
559 OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2);
560 OUT_CS(rs->polygon_offset_enable);
561 OUT_CS(rs->cull_mode);
562 OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
563 OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
564 OUT_CS_REG(R300_GA_POLY_MODE, rs->polygon_mode);
565 OUT_CS_REG(R300_SC_CLIP_RULE, rs->clip_rule);
566 OUT_CS_REG(R300_GB_ENABLE, rs->stuffing_enable);
567 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
568 OUT_CS_32F(rs->point_texcoord_left);
569 OUT_CS_32F(rs->point_texcoord_bottom);
570 OUT_CS_32F(rs->point_texcoord_right);
571 OUT_CS_32F(rs->point_texcoord_top);
572 END_CS;
573 }
574
575 void r300_emit_rs_block_state(struct r300_context* r300,
576 unsigned size, void* state)
577 {
578 struct r300_rs_block* rs = (struct r300_rs_block*)state;
579 unsigned i;
580 /* It's the same for both INST and IP tables */
581 unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
582 CS_LOCALS(r300);
583
584 if (SCREEN_DBG_ON(r300->screen, DBG_DRAW)) {
585 r500_dump_rs_block(rs);
586 }
587
588 DBG(r300, DBG_DRAW, "r300: RS emit:\n");
589
590 BEGIN_CS(size);
591 OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
592 OUT_CS(rs->vap_vtx_state_cntl);
593 OUT_CS(rs->vap_vsm_vtx_assm);
594 OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
595 OUT_CS(rs->vap_out_vtx_fmt[0]);
596 OUT_CS(rs->vap_out_vtx_fmt[1]);
597
598 if (r300->screen->caps.is_r500) {
599 OUT_CS_REG_SEQ(R500_RS_IP_0, count);
600 } else {
601 OUT_CS_REG_SEQ(R300_RS_IP_0, count);
602 }
603 OUT_CS_TABLE(rs->ip, count);
604 for (i = 0; i < count; i++) {
605 DBG(r300, DBG_DRAW, " : ip %d: 0x%08x\n", i, rs->ip[i]);
606 }
607
608 OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
609 OUT_CS(rs->count);
610 OUT_CS(rs->inst_count);
611
612 if (r300->screen->caps.is_r500) {
613 OUT_CS_REG_SEQ(R500_RS_INST_0, count);
614 } else {
615 OUT_CS_REG_SEQ(R300_RS_INST_0, count);
616 }
617 OUT_CS_TABLE(rs->inst, count);
618 for (i = 0; i < count; i++) {
619 DBG(r300, DBG_DRAW, " : inst %d: 0x%08x\n", i, rs->inst[i]);
620 }
621
622 DBG(r300, DBG_DRAW, " : count: 0x%08x inst_count: 0x%08x\n",
623 rs->count, rs->inst_count);
624
625 END_CS;
626 }
627
628 void r300_emit_scissor_state(struct r300_context* r300,
629 unsigned size, void* state)
630 {
631 struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
632 CS_LOCALS(r300);
633
634 BEGIN_CS(size);
635 OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
636 if (r300->screen->caps.is_r500) {
637 OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
638 (scissor->miny << R300_CLIPRECT_Y_SHIFT));
639 OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
640 ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
641 } else {
642 OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
643 ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
644 OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
645 ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
646 }
647 END_CS;
648 }
649
650 void r300_emit_textures_state(struct r300_context *r300,
651 unsigned size, void *state)
652 {
653 struct r300_textures_state *allstate = (struct r300_textures_state*)state;
654 struct r300_texture_sampler_state *texstate;
655 struct r300_texture *tex;
656 unsigned i;
657 CS_LOCALS(r300);
658
659 BEGIN_CS(size);
660 OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
661
662 for (i = 0; i < allstate->count; i++) {
663 if ((1 << i) & allstate->tx_enable) {
664 texstate = &allstate->regs[i];
665 tex = r300_texture(allstate->sampler_views[i]->base.texture);
666
667 OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
668 OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
669 OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
670 texstate->border_color);
671
672 OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
673 OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
674 OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
675
676 OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (i * 4), 1);
677 OUT_CS_TEX_RELOC(tex, texstate->format.tile_config, tex->domain,
678 0, 0);
679 }
680 }
681 END_CS;
682 }
683
684 void r300_emit_aos(struct r300_context* r300, int offset, boolean indexed)
685 {
686 struct pipe_vertex_buffer *vb1, *vb2, *vbuf = r300->vertex_buffer;
687 struct pipe_vertex_element *velem = r300->velems->velem;
688 struct r300_buffer *buf;
689 int i;
690 unsigned *hw_format_size = r300->velems->hw_format_size;
691 unsigned size1, size2, aos_count = r300->velems->count;
692 unsigned packet_size = (aos_count * 3 + 1) / 2;
693 CS_LOCALS(r300);
694
695 BEGIN_CS(2 + packet_size + aos_count * 2);
696 OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
697 OUT_CS(aos_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
698
699 for (i = 0; i < aos_count - 1; i += 2) {
700 vb1 = &vbuf[velem[i].vertex_buffer_index];
701 vb2 = &vbuf[velem[i+1].vertex_buffer_index];
702 size1 = hw_format_size[i];
703 size2 = hw_format_size[i+1];
704
705 OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
706 R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
707 OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
708 OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
709 }
710
711 if (aos_count & 1) {
712 vb1 = &vbuf[velem[i].vertex_buffer_index];
713 size1 = hw_format_size[i];
714
715 OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
716 OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
717 }
718
719 for (i = 0; i < aos_count; i++) {
720 buf = r300_buffer(vbuf[velem[i].vertex_buffer_index].buffer);
721 OUT_CS_BUF_RELOC_NO_OFFSET(&buf->b.b, buf->domain, 0, 0);
722 }
723 END_CS;
724 }
725
726 void r300_emit_aos_swtcl(struct r300_context *r300, boolean indexed)
727 {
728 CS_LOCALS(r300);
729
730 DBG(r300, DBG_DRAW, "r300: Preparing vertex buffer %p for render, "
731 "vertex size %d\n", r300->vbo,
732 r300->vertex_info.size);
733 /* Set the pointer to our vertex buffer. The emitted values are this:
734 * PACKET3 [3D_LOAD_VBPNTR]
735 * COUNT [1]
736 * FORMAT [size | stride << 8]
737 * OFFSET [offset into BO]
738 * VBPNTR [relocated BO]
739 */
740 BEGIN_CS(7);
741 OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
742 OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
743 OUT_CS(r300->vertex_info.size |
744 (r300->vertex_info.size << 8));
745 OUT_CS(r300->vbo_offset);
746 OUT_CS_BUF_RELOC(r300->vbo, 0, r300_buffer(r300->vbo)->domain, 0, 0);
747 END_CS;
748 }
749
750 void r300_emit_vertex_stream_state(struct r300_context* r300,
751 unsigned size, void* state)
752 {
753 struct r300_vertex_stream_state *streams =
754 (struct r300_vertex_stream_state*)state;
755 unsigned i;
756 CS_LOCALS(r300);
757
758 DBG(r300, DBG_DRAW, "r300: PSC emit:\n");
759
760 BEGIN_CS(size);
761 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
762 OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
763 for (i = 0; i < streams->count; i++) {
764 DBG(r300, DBG_DRAW, " : prog_stream_cntl%d: 0x%08x\n", i,
765 streams->vap_prog_stream_cntl[i]);
766 }
767 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
768 OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
769 for (i = 0; i < streams->count; i++) {
770 DBG(r300, DBG_DRAW, " : prog_stream_cntl_ext%d: 0x%08x\n", i,
771 streams->vap_prog_stream_cntl_ext[i]);
772 }
773 END_CS;
774 }
775
776 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
777 {
778 CS_LOCALS(r300);
779
780 BEGIN_CS(size);
781 OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
782 END_CS;
783 }
784
785 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
786 {
787 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
788 struct r300_vertex_program_code* code = &vs->code;
789 struct r300_screen* r300screen = r300->screen;
790 unsigned instruction_count = code->length / 4;
791 unsigned i;
792
793 unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
794 unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
795 unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
796 unsigned temp_count = MAX2(code->num_temporaries, 1);
797
798 unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
799 vtx_mem_size / output_count, 10);
800 unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 6);
801
802 unsigned imm_first = vs->externals_count;
803 unsigned imm_end = vs->code.constants.Count;
804 unsigned imm_count = vs->immediates_count;
805
806 CS_LOCALS(r300);
807
808 BEGIN_CS(size);
809 /* R300_VAP_PVS_CODE_CNTL_0
810 * R300_VAP_PVS_CONST_CNTL
811 * R300_VAP_PVS_CODE_CNTL_1
812 * See the r5xx docs for instructions on how to use these. */
813 OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
814 OUT_CS(R300_PVS_FIRST_INST(0) |
815 R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
816 R300_PVS_LAST_INST(instruction_count - 1));
817 OUT_CS(R300_PVS_MAX_CONST_ADDR(code->constants.Count - 1));
818 OUT_CS(instruction_count - 1);
819
820 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
821 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
822 OUT_CS_TABLE(code->body.d, code->length);
823
824 OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
825 R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
826 R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
827 R300_PVS_VF_MAX_VTX_NUM(12) |
828 (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
829
830 /* Emit immediates. */
831 if (imm_count) {
832 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
833 (r300->screen->caps.is_r500 ?
834 R500_PVS_CONST_START : R300_PVS_CONST_START) +
835 imm_first);
836 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
837 for (i = imm_first; i < imm_end; i++) {
838 const float *data = vs->code.constants.Constants[i].u.Immediate;
839 OUT_CS_TABLE(data, 4);
840 }
841 }
842 END_CS;
843 }
844
845 void r300_emit_vs_constants(struct r300_context* r300,
846 unsigned size, void *state)
847 {
848 unsigned count =
849 ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
850 struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
851 CS_LOCALS(r300);
852
853 if (!count)
854 return;
855
856 BEGIN_CS(size);
857 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
858 (r300->screen->caps.is_r500 ?
859 R500_PVS_CONST_START : R300_PVS_CONST_START));
860 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
861 OUT_CS_TABLE(buf->constants, count * 4);
862 END_CS;
863 }
864
865 void r300_emit_viewport_state(struct r300_context* r300,
866 unsigned size, void* state)
867 {
868 struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
869 CS_LOCALS(r300);
870
871 BEGIN_CS(size);
872 OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
873 OUT_CS_TABLE(&viewport->xscale, 6);
874 OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
875 END_CS;
876 }
877
878 void r300_emit_ztop_state(struct r300_context* r300,
879 unsigned size, void* state)
880 {
881 struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
882 CS_LOCALS(r300);
883
884 BEGIN_CS(size);
885 OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
886 END_CS;
887 }
888
889 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
890 {
891 CS_LOCALS(r300);
892
893 BEGIN_CS(size);
894 OUT_CS_REG(R300_TX_INVALTAGS, 0);
895 END_CS;
896 }
897
898 void r300_emit_buffer_validate(struct r300_context *r300,
899 boolean do_validate_vertex_buffers,
900 struct pipe_resource *index_buffer)
901 {
902 struct pipe_framebuffer_state* fb =
903 (struct pipe_framebuffer_state*)r300->fb_state.state;
904 struct r300_textures_state *texstate =
905 (struct r300_textures_state*)r300->textures_state.state;
906 struct r300_texture* tex;
907 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
908 struct pipe_vertex_element *velem = r300->velems->velem;
909 struct pipe_resource *pbuf;
910 unsigned i;
911 boolean invalid = FALSE;
912
913 /* upload buffers first */
914 if (r300->screen->caps.has_tcl && r300->any_user_vbs) {
915 r300_upload_user_buffers(r300);
916 r300->any_user_vbs = false;
917 }
918
919 /* Clean out BOs. */
920 r300->rws->reset_bos(r300->rws);
921
922 validate:
923 /* Color buffers... */
924 for (i = 0; i < fb->nr_cbufs; i++) {
925 tex = r300_texture(fb->cbufs[i]->texture);
926 assert(tex && tex->buffer && "cbuf is marked, but NULL!");
927 if (!r300_add_texture(r300->rws, tex, 0, tex->domain)) {
928 r300->context.flush(&r300->context, 0, NULL);
929 goto validate;
930 }
931 }
932 /* ...depth buffer... */
933 if (fb->zsbuf) {
934 tex = r300_texture(fb->zsbuf->texture);
935 assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
936 if (!r300_add_texture(r300->rws, tex,
937 0, tex->domain)) {
938 r300->context.flush(&r300->context, 0, NULL);
939 goto validate;
940 }
941 }
942 /* ...textures... */
943 for (i = 0; i < texstate->count; i++) {
944 if (!(texstate->tx_enable & (1 << i))) {
945 continue;
946 }
947
948 tex = r300_texture(texstate->sampler_views[i]->base.texture);
949 if (!r300_add_texture(r300->rws, tex, tex->domain, 0)) {
950 r300->context.flush(&r300->context, 0, NULL);
951 goto validate;
952 }
953 }
954 /* ...occlusion query buffer... */
955 if (r300->query_current) {
956 if (!r300->rws->add_buffer(r300->rws, r300->query_current->buffer,
957 0, r300->query_current->domain)) {
958 r300->context.flush(&r300->context, 0, NULL);
959 goto validate;
960 }
961 }
962 /* ...vertex buffer for SWTCL path... */
963 if (r300->vbo) {
964 if (!r300_add_buffer(r300->rws, r300->vbo,
965 r300_buffer(r300->vbo)->domain, 0)) {
966 r300->context.flush(&r300->context, 0, NULL);
967 goto validate;
968 }
969 }
970 /* ...vertex buffers for HWTCL path... */
971 if (do_validate_vertex_buffers) {
972 for (i = 0; i < r300->velems->count; i++) {
973 pbuf = vbuf[velem[i].vertex_buffer_index].buffer;
974
975 if (!r300_add_buffer(r300->rws, pbuf,
976 r300_buffer(pbuf)->domain, 0)) {
977 r300->context.flush(&r300->context, 0, NULL);
978 goto validate;
979 }
980 }
981 }
982 /* ...and index buffer for HWTCL path. */
983 if (index_buffer) {
984 if (!r300_add_buffer(r300->rws, index_buffer,
985 r300_buffer(index_buffer)->domain, 0)) {
986 r300->context.flush(&r300->context, 0, NULL);
987 goto validate;
988 }
989 }
990 if (!r300->rws->validate(r300->rws)) {
991 r300->context.flush(&r300->context, 0, NULL);
992 if (invalid) {
993 /* Well, hell. */
994 fprintf(stderr, "r300: Stuck in validation loop, gonna quit now.\n");
995 abort();
996 }
997 invalid = TRUE;
998 goto validate;
999 }
1000 }
1001
1002 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
1003 {
1004 struct r300_atom* atom;
1005 unsigned dwords = 0;
1006
1007 foreach(atom, &r300->atom_list) {
1008 if (atom->dirty) {
1009 dwords += atom->size;
1010 }
1011 }
1012
1013 /* let's reserve some more, just in case */
1014 dwords += 32;
1015
1016 return dwords;
1017 }
1018
1019 /* Emit all dirty state. */
1020 void r300_emit_dirty_state(struct r300_context* r300)
1021 {
1022 struct r300_atom* atom;
1023
1024 foreach(atom, &r300->atom_list) {
1025 if (atom->dirty) {
1026 atom->emit(r300, atom->size, atom->state);
1027 if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) {
1028 atom->counter++;
1029 }
1030 atom->dirty = FALSE;
1031 }
1032 }
1033
1034 r300->dirty_hw++;
1035 }