src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 /* r300_emit: Functions for emitting state. */
  25
  26 #include "util/u_format.h"
  27 #include "util/u_math.h"
  28 #include "util/u_mm.h"
  29
  30 #include "r300_context.h"
  31 #include "r300_cb.h"
  32 #include "r300_cs.h"
  33 #include "r300_emit.h"
  34 #include "r300_fs.h"
  35 #include "r300_screen.h"
  36 #include "r300_screen_buffer.h"
  37 #include "r300_vs.h"
  38
  39 void r300_emit_blend_state(struct r300_context* r300,
  40                            unsigned size, void* state)
  41 {
  42     struct r300_blend_state* blend = (struct r300_blend_state*)state;
  43     struct pipe_framebuffer_state* fb =
  44         (struct pipe_framebuffer_state*)r300->fb_state.state;
  45     CS_LOCALS(r300);
  46
  47     if (fb->nr_cbufs) {
  48         WRITE_CS_TABLE(blend->cb, size);
  49     } else {
  50         WRITE_CS_TABLE(blend->cb_no_readwrite, size);
  51     }
  52 }
  53
  54 void r300_emit_blend_color_state(struct r300_context* r300,
  55                                  unsigned size, void* state)
  56 {
  57     struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
  58     CS_LOCALS(r300);
  59
  60     WRITE_CS_TABLE(bc->cb, size);
  61 }
  62
  63 void r300_emit_clip_state(struct r300_context* r300,
  64                           unsigned size, void* state)
  65 {
  66     struct r300_clip_state* clip = (struct r300_clip_state*)state;
  67     CS_LOCALS(r300);
  68
  69     WRITE_CS_TABLE(clip->cb, size);
  70 }
  71
  72 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
  73 {
  74     struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
  75     struct pipe_framebuffer_state* fb =
  76         (struct pipe_framebuffer_state*)r300->fb_state.state;
  77     CS_LOCALS(r300);
  78
  79     if (fb->zsbuf) {
  80         WRITE_CS_TABLE(&dsa->cb_begin, size);
  81     } else {
  82         WRITE_CS_TABLE(dsa->cb_no_readwrite, size);
  83     }
  84 }
  85
  86 static void get_rc_constant_state(
  87     float vec[4],
  88     struct r300_context * r300,
  89     struct rc_constant * constant)
  90 {
  91     struct r300_textures_state* texstate = r300->textures_state.state;
  92     struct r300_resource *tex;
  93
  94     assert(constant->Type == RC_CONSTANT_STATE);
  95
  96     /* vec should either be (0, 0, 0, 1), which should be a relatively safe
  97      * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
  98      * state factors. */
  99
 100     switch (constant->u.State[0]) {
 101         /* Factor for converting rectangle coords to
 102          * normalized coords. Should only show up on non-r500. */
 103         case RC_STATE_R300_TEXRECT_FACTOR:
 104             tex = r300_resource(texstate->sampler_views[constant->u.State[1]]->base.texture);
 105             vec[0] = 1.0 / tex->tex.width0;
 106             vec[1] = 1.0 / tex->tex.height0;
 107             vec[2] = 0;
 108             vec[3] = 1;
 109             break;
 110
 111         case RC_STATE_R300_TEXSCALE_FACTOR:
 112             tex = r300_resource(texstate->sampler_views[constant->u.State[1]]->base.texture);
 113             /* Add a small number to the texture size to work around rounding errors in hw. */
 114             vec[0] = tex->b.b.b.width0  / (tex->tex.width0  + 0.001f);
 115             vec[1] = tex->b.b.b.height0 / (tex->tex.height0 + 0.001f);
 116             vec[2] = tex->b.b.b.depth0  / (tex->tex.depth0  + 0.001f);
 117             vec[3] = 1;
 118             break;
 119
 120         case RC_STATE_R300_VIEWPORT_SCALE:
 121             vec[0] = r300->viewport.scale[0];
 122             vec[1] = r300->viewport.scale[1];
 123             vec[2] = r300->viewport.scale[2];
 124             vec[3] = 1;
 125             break;
 126
 127         case RC_STATE_R300_VIEWPORT_OFFSET:
 128             vec[0] = r300->viewport.translate[0];
 129             vec[1] = r300->viewport.translate[1];
 130             vec[2] = r300->viewport.translate[2];
 131             vec[3] = 1;
 132             break;
 133
 134         default:
 135             fprintf(stderr, "r300: Implementation error: "
 136                 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
 137             vec[0] = 0;
 138             vec[1] = 0;
 139             vec[2] = 0;
 140             vec[3] = 1;
 141     }
 142 }
 143
 144 /* Convert a normal single-precision float into the 7.16 format
 145  * used by the R300 fragment shader.
 146  */
 147 uint32_t pack_float24(float f)
 148 {
 149     union {
 150         float fl;
 151         uint32_t u;
 152     } u;
 153     float mantissa;
 154     int exponent;
 155     uint32_t float24 = 0;
 156
 157     if (f == 0.0)
 158         return 0;
 159
 160     u.fl = f;
 161
 162     mantissa = frexpf(f, &exponent);
 163
 164     /* Handle -ve */
 165     if (mantissa < 0) {
 166         float24 |= (1 << 23);
 167         mantissa = mantissa * -1.0;
 168     }
 169     /* Handle exponent, bias of 63 */
 170     exponent += 62;
 171     float24 |= (exponent << 16);
 172     /* Kill 7 LSB of mantissa */
 173     float24 |= (u.u & 0x7FFFFF) >> 7;
 174
 175     return float24;
 176 }
 177
 178 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
 179 {
 180     struct r300_fragment_shader *fs = r300_fs(r300);
 181     CS_LOCALS(r300);
 182
 183     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 184 }
 185
 186 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 187 {
 188     struct r300_fragment_shader *fs = r300_fs(r300);
 189     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 190     unsigned count = fs->shader->externals_count;
 191     unsigned i, j;
 192     CS_LOCALS(r300);
 193
 194     if (count == 0)
 195         return;
 196
 197     BEGIN_CS(size);
 198     OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count * 4);
 199     if (buf->remap_table){
 200         for (i = 0; i < count; i++) {
 201             float *data = (float*)&buf->ptr[buf->remap_table[i]*4];
 202             for (j = 0; j < 4; j++)
 203                 OUT_CS(pack_float24(data[j]));
 204         }
 205     } else {
 206         for (i = 0; i < count; i++)
 207             for (j = 0; j < 4; j++)
 208                 OUT_CS(pack_float24(*(float*)&buf->ptr[i*4+j]));
 209     }
 210
 211     END_CS;
 212 }
 213
 214 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 215 {
 216     struct r300_fragment_shader *fs = r300_fs(r300);
 217     struct rc_constant_list *constants = &fs->shader->code.constants;
 218     unsigned i;
 219     unsigned count = fs->shader->rc_state_count;
 220     unsigned first = fs->shader->externals_count;
 221     unsigned end = constants->Count;
 222     unsigned j;
 223     CS_LOCALS(r300);
 224
 225     if (count == 0)
 226         return;
 227
 228     BEGIN_CS(size);
 229     for(i = first; i < end; ++i) {
 230         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 231             float data[4];
 232
 233             get_rc_constant_state(data, r300, &constants->Constants[i]);
 234
 235             OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
 236             for (j = 0; j < 4; j++)
 237                 OUT_CS(pack_float24(data[j]));
 238         }
 239     }
 240     END_CS;
 241 }
 242
 243 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
 244 {
 245     struct r300_fragment_shader *fs = r300_fs(r300);
 246     CS_LOCALS(r300);
 247
 248     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 249 }
 250
 251 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 252 {
 253     struct r300_fragment_shader *fs = r300_fs(r300);
 254     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 255     unsigned count = fs->shader->externals_count;
 256     CS_LOCALS(r300);
 257
 258     if (count == 0)
 259         return;
 260
 261     BEGIN_CS(size);
 262     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 263     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count * 4);
 264     if (buf->remap_table){
 265         for (unsigned i = 0; i < count; i++) {
 266             uint32_t *data = &buf->ptr[buf->remap_table[i]*4];
 267             OUT_CS_TABLE(data, 4);
 268         }
 269     } else {
 270         OUT_CS_TABLE(buf->ptr, count * 4);
 271     }
 272     END_CS;
 273 }
 274
 275 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 276 {
 277     struct r300_fragment_shader *fs = r300_fs(r300);
 278     struct rc_constant_list *constants = &fs->shader->code.constants;
 279     unsigned i;
 280     unsigned count = fs->shader->rc_state_count;
 281     unsigned first = fs->shader->externals_count;
 282     unsigned end = constants->Count;
 283     CS_LOCALS(r300);
 284
 285     if (count == 0)
 286         return;
 287
 288     BEGIN_CS(size);
 289     for(i = first; i < end; ++i) {
 290         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 291             float data[4];
 292
 293             get_rc_constant_state(data, r300, &constants->Constants[i]);
 294
 295             OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 296                        R500_GA_US_VECTOR_INDEX_TYPE_CONST |
 297                        (i & R500_GA_US_VECTOR_INDEX_MASK));
 298             OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
 299             OUT_CS_TABLE(data, 4);
 300         }
 301     }
 302     END_CS;
 303 }
 304
 305 void r300_emit_gpu_flush(struct r300_context *r300, unsigned size, void *state)
 306 {
 307     struct r300_gpu_flush *gpuflush = (struct r300_gpu_flush*)state;
 308     struct pipe_framebuffer_state* fb =
 309             (struct pipe_framebuffer_state*)r300->fb_state.state;
 310     uint32_t height = fb->height;
 311     uint32_t width = fb->width;
 312     CS_LOCALS(r300);
 313
 314     if (r300->cbzb_clear) {
 315         struct r300_surface *surf = r300_surface(fb->cbufs[0]);
 316
 317         height = surf->cbzb_height;
 318         width = surf->cbzb_width;
 319     }
 320
 321     DBG(r300, DBG_SCISSOR,
 322         "r300: Scissor width: %i, height: %i, CBZB clear: %s\n",
 323         width, height, r300->cbzb_clear ? "YES" : "NO");
 324
 325     BEGIN_CS(size);
 326
 327     /* Set up scissors.
 328      * By writing to the SC registers, SC & US assert idle. */
 329     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 330     if (r300->screen->caps.is_r500) {
 331         OUT_CS(0);
 332         OUT_CS(((width  - 1) << R300_SCISSORS_X_SHIFT) |
 333                ((height - 1) << R300_SCISSORS_Y_SHIFT));
 334     } else {
 335         OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
 336                (1440 << R300_SCISSORS_Y_SHIFT));
 337         OUT_CS(((width  + 1440-1) << R300_SCISSORS_X_SHIFT) |
 338                ((height + 1440-1) << R300_SCISSORS_Y_SHIFT));
 339     }
 340
 341     /* Flush CB & ZB caches and wait until the 3D engine is idle and clean. */
 342     OUT_CS_TABLE(gpuflush->cb_flush_clean, 6);
 343     END_CS;
 344 }
 345
 346 void r300_emit_aa_state(struct r300_context *r300, unsigned size, void *state)
 347 {
 348     struct r300_aa_state *aa = (struct r300_aa_state*)state;
 349     CS_LOCALS(r300);
 350
 351     BEGIN_CS(size);
 352     OUT_CS_REG(R300_GB_AA_CONFIG, aa->aa_config);
 353
 354     if (aa->dest) {
 355         OUT_CS_REG(R300_RB3D_AARESOLVE_OFFSET, aa->dest->offset);
 356         OUT_CS_RELOC(aa->dest);
 357         OUT_CS_REG(R300_RB3D_AARESOLVE_PITCH, aa->dest->pitch);
 358     }
 359
 360     OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, aa->aaresolve_ctl);
 361     END_CS;
 362 }
 363
 364 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
 365 {
 366     struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
 367     struct r300_surface* surf;
 368     unsigned i;
 369     boolean can_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
 370     uint32_t rb3d_cctl = 0;
 371
 372     CS_LOCALS(r300);
 373
 374     BEGIN_CS(size);
 375
 376     /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
 377      * what we usually want. */
 378     if (r300->screen->caps.is_r500) {
 379         rb3d_cctl = R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE;
 380     }
 381     if (fb->nr_cbufs &&
 382         r300_fragment_shader_writes_all(r300_fs(r300))) {
 383         rb3d_cctl |= R300_RB3D_CCTL_NUM_MULTIWRITES(fb->nr_cbufs);
 384     }
 385
 386     OUT_CS_REG(R300_RB3D_CCTL, rb3d_cctl);
 387
 388     /* Set up colorbuffers. */
 389     for (i = 0; i < fb->nr_cbufs; i++) {
 390         surf = r300_surface(fb->cbufs[i]);
 391
 392         OUT_CS_REG(R300_RB3D_COLOROFFSET0 + (4 * i), surf->offset);
 393         OUT_CS_RELOC(surf);
 394
 395         OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), surf->pitch);
 396         OUT_CS_RELOC(surf);
 397     }
 398
 399     /* Set up the ZB part of the CBZB clear. */
 400     if (r300->cbzb_clear) {
 401         surf = r300_surface(fb->cbufs[0]);
 402
 403         OUT_CS_REG(R300_ZB_FORMAT, surf->cbzb_format);
 404
 405         OUT_CS_REG(R300_ZB_DEPTHOFFSET, surf->cbzb_midpoint_offset);
 406         OUT_CS_RELOC(surf);
 407
 408         OUT_CS_REG(R300_ZB_DEPTHPITCH, surf->cbzb_pitch);
 409         OUT_CS_RELOC(surf);
 410
 411         DBG(r300, DBG_CBZB,
 412             "CBZB clearing cbuf %08x %08x\n", surf->cbzb_format,
 413             surf->cbzb_pitch);
 414     }
 415     /* Set up a zbuffer. */
 416     else if (fb->zsbuf) {
 417         surf = r300_surface(fb->zsbuf);
 418
 419         OUT_CS_REG(R300_ZB_FORMAT, surf->format);
 420
 421         OUT_CS_REG(R300_ZB_DEPTHOFFSET, surf->offset);
 422         OUT_CS_RELOC(surf);
 423
 424         OUT_CS_REG(R300_ZB_DEPTHPITCH, surf->pitch);
 425         OUT_CS_RELOC(surf);
 426
 427         if (can_hyperz) {
 428             /* HiZ RAM. */
 429             OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0);
 430             OUT_CS_REG(R300_ZB_HIZ_PITCH, surf->pitch_hiz);
 431             /* Z Mask RAM. (compressed zbuffer) */
 432             OUT_CS_REG(R300_ZB_ZMASK_OFFSET, 0);
 433             OUT_CS_REG(R300_ZB_ZMASK_PITCH, surf->pitch_zmask);
 434         }
 435     }
 436
 437     END_CS;
 438 }
 439
 440 void r300_emit_hyperz_state(struct r300_context *r300,
 441                             unsigned size, void *state)
 442 {
 443     struct r300_hyperz_state *z = state;
 444     CS_LOCALS(r300);
 445
 446     if (z->flush)
 447         WRITE_CS_TABLE(&z->cb_flush_begin, size);
 448     else
 449         WRITE_CS_TABLE(&z->cb_begin, size - 2);
 450 }
 451
 452 void r300_emit_hyperz_end(struct r300_context *r300)
 453 {
 454     struct r300_hyperz_state z =
 455             *(struct r300_hyperz_state*)r300->hyperz_state.state;
 456
 457     z.flush = 1;
 458     z.zb_bw_cntl = 0;
 459     z.zb_depthclearvalue = 0;
 460     z.sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 461     z.gb_z_peq_config = 0;
 462
 463     r300_emit_hyperz_state(r300, r300->hyperz_state.size, &z);
 464 }
 465
 466 void r300_emit_fb_state_pipelined(struct r300_context *r300,
 467                                   unsigned size, void *state)
 468 {
 469     struct pipe_framebuffer_state* fb =
 470             (struct pipe_framebuffer_state*)r300->fb_state.state;
 471     unsigned i, num_cbufs = fb->nr_cbufs;
 472     CS_LOCALS(r300);
 473
 474     /* If we use the multiwrite feature, the colorbuffers 2,3,4 must be
 475      * marked as UNUSED in the US block. */
 476     if (r300_fragment_shader_writes_all(r300_fs(r300))) {
 477         num_cbufs = MIN2(num_cbufs, 1);
 478     }
 479
 480     BEGIN_CS(size);
 481
 482     /* Colorbuffer format in the US block.
 483      * (must be written after unpipelined regs) */
 484     OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
 485     for (i = 0; i < num_cbufs; i++) {
 486         OUT_CS(r300_surface(fb->cbufs[i])->format);
 487     }
 488     for (; i < 4; i++) {
 489         OUT_CS(R300_US_OUT_FMT_UNUSED);
 490     }
 491
 492     /* Multisampling. Depends on framebuffer sample count.
 493      * These are pipelined regs and as such cannot be moved
 494      * to the AA state. */
 495     if (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
 496         unsigned mspos0 = 0x66666666;
 497         unsigned mspos1 = 0x6666666;
 498
 499         if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
 500             /* Subsample placement. These may not be optimal. */
 501             switch (fb->cbufs[0]->texture->nr_samples) {
 502                 case 2:
 503                     mspos0 = 0x33996633;
 504                     mspos1 = 0x6666663;
 505                     break;
 506                 case 3:
 507                     mspos0 = 0x33936933;
 508                     mspos1 = 0x6666663;
 509                     break;
 510                 case 4:
 511                     mspos0 = 0x33939933;
 512                     mspos1 = 0x3966663;
 513                     break;
 514                 case 6:
 515                     mspos0 = 0x22a2aa22;
 516                     mspos1 = 0x2a65672;
 517                     break;
 518                 default:
 519                     debug_printf("r300: Bad number of multisamples!\n");
 520             }
 521         }
 522
 523         OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
 524         OUT_CS(mspos0);
 525         OUT_CS(mspos1);
 526     }
 527     END_CS;
 528 }
 529
 530 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
 531 {
 532     struct r300_query *query = r300->query_current;
 533     CS_LOCALS(r300);
 534
 535     if (!query)
 536         return;
 537
 538     BEGIN_CS(size);
 539     if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
 540         OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 541     } else {
 542         OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
 543     }
 544     OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
 545     END_CS;
 546     query->begin_emitted = TRUE;
 547 }
 548
 549 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
 550                                            struct r300_query *query)
 551 {
 552     struct r300_capabilities* caps = &r300->screen->caps;
 553     CS_LOCALS(r300);
 554
 555     assert(caps->num_frag_pipes);
 556
 557     BEGIN_CS(6 * caps->num_frag_pipes + 2);
 558     /* I'm not so sure I like this switch, but it's hard to be elegant
 559      * when there's so many special cases...
 560      *
 561      * So here's the basic idea. For each pipe, enable writes to it only,
 562      * then put out the relocation for ZPASS_ADDR, taking into account a
 563      * 4-byte offset for each pipe. RV380 and older are special; they have
 564      * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
 565      * so there's a chipset cap for that. */
 566     switch (caps->num_frag_pipes) {
 567         case 4:
 568             /* pipe 3 only */
 569             OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
 570             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 3) * 4);
 571             OUT_CS_RELOC(r300->query_current);
 572         case 3:
 573             /* pipe 2 only */
 574             OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
 575             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 2) * 4);
 576             OUT_CS_RELOC(r300->query_current);
 577         case 2:
 578             /* pipe 1 only */
 579             /* As mentioned above, accomodate RV380 and older. */
 580             OUT_CS_REG(R300_SU_REG_DEST,
 581                     1 << (caps->high_second_pipe ? 3 : 1));
 582             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);
 583             OUT_CS_RELOC(r300->query_current);
 584         case 1:
 585             /* pipe 0 only */
 586             OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
 587             OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 0) * 4);
 588             OUT_CS_RELOC(r300->query_current);
 589             break;
 590         default:
 591             fprintf(stderr, "r300: Implementation error: Chipset reports %d"
 592                     " pixel pipes!\n", caps->num_frag_pipes);
 593             abort();
 594     }
 595
 596     /* And, finally, reset it to normal... */
 597     OUT_CS_REG(R300_SU_REG_DEST, 0xF);
 598     END_CS;
 599 }
 600
 601 static void rv530_emit_query_end_single_z(struct r300_context *r300,
 602                                           struct r300_query *query)
 603 {
 604     CS_LOCALS(r300);
 605
 606     BEGIN_CS(8);
 607     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 608     OUT_CS_REG(R300_ZB_ZPASS_ADDR, query->num_results * 4);
 609     OUT_CS_RELOC(r300->query_current);
 610     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 611     END_CS;
 612 }
 613
 614 static void rv530_emit_query_end_double_z(struct r300_context *r300,
 615                                           struct r300_query *query)
 616 {
 617     CS_LOCALS(r300);
 618
 619     BEGIN_CS(14);
 620     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 621     OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 0) * 4);
 622     OUT_CS_RELOC(r300->query_current);
 623     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
 624     OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);
 625     OUT_CS_RELOC(r300->query_current);
 626     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 627     END_CS;
 628 }
 629
 630 void r300_emit_query_end(struct r300_context* r300)
 631 {
 632     struct r300_capabilities *caps = &r300->screen->caps;
 633     struct r300_query *query = r300->query_current;
 634
 635     if (!query)
 636         return;
 637
 638     if (query->begin_emitted == FALSE)
 639         return;
 640
 641     if (caps->family == CHIP_FAMILY_RV530) {
 642         if (caps->num_z_pipes == 2)
 643             rv530_emit_query_end_double_z(r300, query);
 644         else
 645             rv530_emit_query_end_single_z(r300, query);
 646     } else
 647         r300_emit_query_end_frag_pipes(r300, query);
 648
 649     query->begin_emitted = FALSE;
 650     query->num_results += query->num_pipes;
 651
 652     /* XXX grab all the results and reset the counter. */
 653     if (query->num_results >= query->buffer_size / 4 - 4) {
 654         query->num_results = (query->buffer_size / 4) / 2;
 655         fprintf(stderr, "r300: Rewinding OQBO...\n");
 656     }
 657 }
 658
 659 void r300_emit_invariant_state(struct r300_context *r300,
 660                                unsigned size, void *state)
 661 {
 662     CS_LOCALS(r300);
 663     WRITE_CS_TABLE(state, size);
 664 }
 665
 666 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
 667 {
 668     struct r300_rs_state* rs = state;
 669     CS_LOCALS(r300);
 670
 671     BEGIN_CS(size);
 672     OUT_CS_TABLE(rs->cb_main, RS_STATE_MAIN_SIZE);
 673     if (rs->polygon_offset_enable) {
 674         if (r300->zbuffer_bpp == 16) {
 675             OUT_CS_TABLE(rs->cb_poly_offset_zb16, 5);
 676         } else {
 677             OUT_CS_TABLE(rs->cb_poly_offset_zb24, 5);
 678         }
 679     }
 680     END_CS;
 681 }
 682
 683 void r300_emit_rs_block_state(struct r300_context* r300,
 684                               unsigned size, void* state)
 685 {
 686     struct r300_rs_block* rs = (struct r300_rs_block*)state;
 687     unsigned i;
 688     /* It's the same for both INST and IP tables */
 689     unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
 690     CS_LOCALS(r300);
 691
 692     if (DBG_ON(r300, DBG_RS_BLOCK)) {
 693         r500_dump_rs_block(rs);
 694
 695         fprintf(stderr, "r300: RS emit:\n");
 696
 697         for (i = 0; i < count; i++)
 698             fprintf(stderr, "    : ip %d: 0x%08x\n", i, rs->ip[i]);
 699
 700         for (i = 0; i < count; i++)
 701             fprintf(stderr, "    : inst %d: 0x%08x\n", i, rs->inst[i]);
 702
 703         fprintf(stderr, "    : count: 0x%08x inst_count: 0x%08x\n",
 704             rs->count, rs->inst_count);
 705     }
 706
 707     BEGIN_CS(size);
 708     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 709     OUT_CS(rs->vap_vtx_state_cntl);
 710     OUT_CS(rs->vap_vsm_vtx_assm);
 711     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 712     OUT_CS(rs->vap_out_vtx_fmt[0]);
 713     OUT_CS(rs->vap_out_vtx_fmt[1]);
 714     OUT_CS_REG_SEQ(R300_GB_ENABLE, 1);
 715     OUT_CS(rs->gb_enable);
 716
 717     if (r300->screen->caps.is_r500) {
 718         OUT_CS_REG_SEQ(R500_RS_IP_0, count);
 719     } else {
 720         OUT_CS_REG_SEQ(R300_RS_IP_0, count);
 721     }
 722     OUT_CS_TABLE(rs->ip, count);
 723
 724     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 725     OUT_CS(rs->count);
 726     OUT_CS(rs->inst_count);
 727
 728     if (r300->screen->caps.is_r500) {
 729         OUT_CS_REG_SEQ(R500_RS_INST_0, count);
 730     } else {
 731         OUT_CS_REG_SEQ(R300_RS_INST_0, count);
 732     }
 733     OUT_CS_TABLE(rs->inst, count);
 734     END_CS;
 735 }
 736
 737 void r300_emit_scissor_state(struct r300_context* r300,
 738                              unsigned size, void* state)
 739 {
 740     struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
 741     CS_LOCALS(r300);
 742
 743     BEGIN_CS(size);
 744     OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
 745     if (r300->screen->caps.is_r500) {
 746         OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
 747                (scissor->miny << R300_CLIPRECT_Y_SHIFT));
 748         OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
 749                ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
 750     } else {
 751         OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
 752                ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
 753         OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
 754                ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
 755     }
 756     END_CS;
 757 }
 758
 759 void r300_emit_textures_state(struct r300_context *r300,
 760                               unsigned size, void *state)
 761 {
 762     struct r300_textures_state *allstate = (struct r300_textures_state*)state;
 763     struct r300_texture_sampler_state *texstate;
 764     struct r300_resource *tex;
 765     unsigned i;
 766     CS_LOCALS(r300);
 767
 768     BEGIN_CS(size);
 769     OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
 770
 771     for (i = 0; i < allstate->count; i++) {
 772         if ((1 << i) & allstate->tx_enable) {
 773             texstate = &allstate->regs[i];
 774             tex = r300_resource(allstate->sampler_views[i]->base.texture);
 775
 776             OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
 777             OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
 778             OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
 779                        texstate->border_color);
 780
 781             OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
 782             OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
 783             OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
 784
 785             OUT_CS_REG(R300_TX_OFFSET_0 + (i * 4), texstate->format.tile_config);
 786             OUT_CS_RELOC(tex);
 787         }
 788     }
 789     END_CS;
 790 }
 791
 792 void r300_emit_vertex_arrays(struct r300_context* r300, int offset, boolean indexed)
 793 {
 794     struct pipe_vertex_buffer *vbuf = r300->vbuf_mgr->vertex_buffer;
 795     struct pipe_resource **valid_vbuf = r300->vbuf_mgr->real_vertex_buffer;
 796     struct pipe_vertex_element *velem = r300->velems->velem;
 797     struct r300_resource *buf;
 798     int i;
 799     unsigned vertex_array_count = r300->velems->count;
 800     unsigned packet_size = (vertex_array_count * 3 + 1) / 2;
 801     struct pipe_vertex_buffer *vb1, *vb2;
 802     unsigned *hw_format_size;
 803     unsigned size1, size2;
 804     CS_LOCALS(r300);
 805
 806     BEGIN_CS(2 + packet_size + vertex_array_count * 2);
 807     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
 808     OUT_CS(vertex_array_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 809
 810     hw_format_size = r300->velems->format_size;
 811
 812     for (i = 0; i < vertex_array_count - 1; i += 2) {
 813         vb1 = &vbuf[velem[i].vertex_buffer_index];
 814         vb2 = &vbuf[velem[i+1].vertex_buffer_index];
 815         size1 = hw_format_size[i];
 816         size2 = hw_format_size[i+1];
 817
 818         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
 819                R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
 820         OUT_CS(vb1->buffer_offset + velem[i].src_offset   + offset * vb1->stride);
 821         OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
 822     }
 823
 824     if (vertex_array_count & 1) {
 825         vb1 = &vbuf[velem[i].vertex_buffer_index];
 826         size1 = hw_format_size[i];
 827
 828         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
 829         OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
 830     }
 831
 832     for (i = 0; i < vertex_array_count; i++) {
 833         buf = r300_resource(valid_vbuf[velem[i].vertex_buffer_index]);
 834         OUT_CS_RELOC(buf);
 835     }
 836     END_CS;
 837 }
 838
 839 void r300_emit_vertex_arrays_swtcl(struct r300_context *r300, boolean indexed)
 840 {
 841     CS_LOCALS(r300);
 842
 843     DBG(r300, DBG_SWTCL, "r300: Preparing vertex buffer %p for render, "
 844             "vertex size %d\n", r300->vbo,
 845             r300->vertex_info.size);
 846     /* Set the pointer to our vertex buffer. The emitted values are this:
 847      * PACKET3 [3D_LOAD_VBPNTR]
 848      * COUNT   [1]
 849      * FORMAT  [size | stride << 8]
 850      * OFFSET  [offset into BO]
 851      * VBPNTR  [relocated BO]
 852      */
 853     BEGIN_CS(7);
 854     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 855     OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 856     OUT_CS(r300->vertex_info.size |
 857             (r300->vertex_info.size << 8));
 858     OUT_CS(r300->draw_vbo_offset);
 859     OUT_CS(0);
 860     OUT_CS_RELOC(r300_resource(r300->vbo));
 861     END_CS;
 862 }
 863
 864 void r300_emit_vertex_stream_state(struct r300_context* r300,
 865                                    unsigned size, void* state)
 866 {
 867     struct r300_vertex_stream_state *streams =
 868         (struct r300_vertex_stream_state*)state;
 869     unsigned i;
 870     CS_LOCALS(r300);
 871
 872     if (DBG_ON(r300, DBG_PSC)) {
 873         fprintf(stderr, "r300: PSC emit:\n");
 874
 875         for (i = 0; i < streams->count; i++) {
 876             fprintf(stderr, "    : prog_stream_cntl%d: 0x%08x\n", i,
 877                    streams->vap_prog_stream_cntl[i]);
 878         }
 879
 880         for (i = 0; i < streams->count; i++) {
 881             fprintf(stderr, "    : prog_stream_cntl_ext%d: 0x%08x\n", i,
 882                    streams->vap_prog_stream_cntl_ext[i]);
 883         }
 884     }
 885
 886     BEGIN_CS(size);
 887     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
 888     OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
 889     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
 890     OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
 891     END_CS;
 892 }
 893
 894 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
 895 {
 896     CS_LOCALS(r300);
 897
 898     BEGIN_CS(size);
 899     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 900     END_CS;
 901 }
 902
 903 void r300_emit_vap_invariant_state(struct r300_context *r300,
 904                                    unsigned size, void *state)
 905 {
 906     CS_LOCALS(r300);
 907     WRITE_CS_TABLE(state, size);
 908 }
 909
 910 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
 911 {
 912     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
 913     struct r300_vertex_program_code* code = &vs->code;
 914     struct r300_screen* r300screen = r300->screen;
 915     unsigned instruction_count = code->length / 4;
 916
 917     unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
 918     unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
 919     unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
 920     unsigned temp_count = MAX2(code->num_temporaries, 1);
 921
 922     unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
 923                                   vtx_mem_size / output_count, 10);
 924     unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 5);
 925
 926     CS_LOCALS(r300);
 927
 928     BEGIN_CS(size);
 929
 930     /* R300_VAP_PVS_CODE_CNTL_0
 931      * R300_VAP_PVS_CONST_CNTL
 932      * R300_VAP_PVS_CODE_CNTL_1
 933      * See the r5xx docs for instructions on how to use these. */
 934     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) |
 935                R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
 936                R300_PVS_LAST_INST(instruction_count - 1));
 937     OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, instruction_count - 1);
 938
 939     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 940     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
 941     OUT_CS_TABLE(code->body.d, code->length);
 942
 943     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
 944             R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
 945             R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
 946             R300_PVS_VF_MAX_VTX_NUM(12) |
 947             (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
 948
 949     /* Emit flow control instructions. */
 950     if (code->num_fc_ops) {
 951
 952         OUT_CS_REG(R300_VAP_PVS_FLOW_CNTL_OPC, code->fc_ops);
 953         if (r300screen->caps.is_r500) {
 954             OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, code->num_fc_ops * 2);
 955             OUT_CS_TABLE(code->fc_op_addrs.r500, code->num_fc_ops * 2);
 956         } else {
 957             OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_ADDRS_0, code->num_fc_ops);
 958             OUT_CS_TABLE(code->fc_op_addrs.r300, code->num_fc_ops);
 959         }
 960         OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, code->num_fc_ops);
 961         OUT_CS_TABLE(code->fc_loop_index, code->num_fc_ops);
 962     }
 963
 964     END_CS;
 965 }
 966
 967 void r300_emit_vs_constants(struct r300_context* r300,
 968                             unsigned size, void *state)
 969 {
 970     unsigned count =
 971         ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
 972     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 973     struct r300_vertex_shader *vs = (struct r300_vertex_shader*)r300->vs_state.state;
 974     unsigned i;
 975     int imm_first = vs->externals_count;
 976     int imm_end = vs->code.constants.Count;
 977     int imm_count = vs->immediates_count;
 978     CS_LOCALS(r300);
 979
 980     BEGIN_CS(size);
 981     OUT_CS_REG(R300_VAP_PVS_CONST_CNTL,
 982                R300_PVS_CONST_BASE_OFFSET(buf->buffer_base) |
 983                R300_PVS_MAX_CONST_ADDR(MAX2(imm_end - 1, 0)));
 984     if (vs->externals_count) {
 985         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 986                    (r300->screen->caps.is_r500 ?
 987                    R500_PVS_CONST_START : R300_PVS_CONST_START) + buf->buffer_base);
 988         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
 989         if (buf->remap_table){
 990             for (i = 0; i < count; i++) {
 991                 uint32_t *data = &buf->ptr[buf->remap_table[i]*4];
 992                 OUT_CS_TABLE(data, 4);
 993             }
 994         } else {
 995             OUT_CS_TABLE(buf->ptr, count * 4);
 996         }
 997     }
 998
 999     /* Emit immediates. */
1000     if (imm_count) {
1001         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
1002                    (r300->screen->caps.is_r500 ?
1003                    R500_PVS_CONST_START : R300_PVS_CONST_START) +
1004                    buf->buffer_base + imm_first);
1005         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
1006         for (i = imm_first; i < imm_end; i++) {
1007             const float *data = vs->code.constants.Constants[i].u.Immediate;
1008             OUT_CS_TABLE(data, 4);
1009         }
1010     }
1011     END_CS;
1012 }
1013
1014 void r300_emit_viewport_state(struct r300_context* r300,
1015                               unsigned size, void* state)
1016 {
1017     struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
1018     CS_LOCALS(r300);
1019
1020     BEGIN_CS(size);
1021     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
1022     OUT_CS_TABLE(&viewport->xscale, 6);
1023     OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
1024     END_CS;
1025 }
1026
1027 void r300_emit_hiz_clear(struct r300_context *r300, unsigned size, void *state)
1028 {
1029     struct pipe_framebuffer_state *fb =
1030         (struct pipe_framebuffer_state*)r300->fb_state.state;
1031     struct r300_hyperz_state *z =
1032         (struct r300_hyperz_state*)r300->hyperz_state.state;
1033     struct r300_resource* tex;
1034     CS_LOCALS(r300);
1035
1036     tex = r300_resource(fb->zsbuf->texture);
1037
1038     BEGIN_CS(size);
1039     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_HIZ, 2);
1040     OUT_CS(0);
1041     OUT_CS(tex->tex.hiz_dwords[fb->zsbuf->u.tex.level]);
1042     OUT_CS(0xffffffff);
1043     END_CS;
1044
1045     z->current_func = -1;
1046
1047     /* Mark the current zbuffer's hiz ram as in use. */
1048     r300->hiz_in_use = TRUE;
1049     r300_mark_atom_dirty(r300, &r300->hyperz_state);
1050 }
1051
1052 void r300_emit_zmask_clear(struct r300_context *r300, unsigned size, void *state)
1053 {
1054     struct pipe_framebuffer_state *fb =
1055         (struct pipe_framebuffer_state*)r300->fb_state.state;
1056     struct r300_resource *tex;
1057     CS_LOCALS(r300);
1058
1059     tex = r300_resource(fb->zsbuf->texture);
1060
1061     BEGIN_CS(size);
1062     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_ZMASK, 2);
1063     OUT_CS(0);
1064     OUT_CS(tex->tex.zmask_dwords[fb->zsbuf->u.tex.level]);
1065     OUT_CS(0);
1066     END_CS;
1067
1068     /* Mark the current zbuffer's zmask as in use. */
1069     r300->zmask_in_use = TRUE;
1070     r300_mark_atom_dirty(r300, &r300->hyperz_state);
1071 }
1072
1073 void r300_emit_ztop_state(struct r300_context* r300,
1074                           unsigned size, void* state)
1075 {
1076     struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
1077     CS_LOCALS(r300);
1078
1079     BEGIN_CS(size);
1080     OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
1081     END_CS;
1082 }
1083
1084 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
1085 {
1086     CS_LOCALS(r300);
1087
1088     BEGIN_CS(size);
1089     OUT_CS_REG(R300_TX_INVALTAGS, 0);
1090     END_CS;
1091 }
1092
1093 boolean r300_emit_buffer_validate(struct r300_context *r300,
1094                                   boolean do_validate_vertex_buffers,
1095                                   struct pipe_resource *index_buffer)
1096 {
1097     struct pipe_framebuffer_state *fb =
1098         (struct pipe_framebuffer_state*)r300->fb_state.state;
1099     struct r300_textures_state *texstate =
1100         (struct r300_textures_state*)r300->textures_state.state;
1101     struct r300_resource *tex;
1102     unsigned i;
1103     boolean flushed = FALSE;
1104
1105 validate:
1106     if (r300->fb_state.dirty) {
1107         /* Color buffers... */
1108         for (i = 0; i < fb->nr_cbufs; i++) {
1109             tex = r300_resource(fb->cbufs[i]->texture);
1110             assert(tex && tex->buf && "cbuf is marked, but NULL!");
1111             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, 0,
1112                                     r300_surface(fb->cbufs[i])->domain);
1113         }
1114         /* ...depth buffer... */
1115         if (fb->zsbuf) {
1116             tex = r300_resource(fb->zsbuf->texture);
1117             assert(tex && tex->buf && "zsbuf is marked, but NULL!");
1118             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, 0,
1119                                     r300_surface(fb->zsbuf)->domain);
1120         }
1121     }
1122     if (r300->textures_state.dirty) {
1123         /* ...textures... */
1124         for (i = 0; i < texstate->count; i++) {
1125             if (!(texstate->tx_enable & (1 << i))) {
1126                 continue;
1127             }
1128
1129             tex = r300_resource(texstate->sampler_views[i]->base.texture);
1130             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, tex->domain, 0);
1131         }
1132     }
1133     /* ...occlusion query buffer... */
1134     if (r300->query_current)
1135         r300->rws->cs_add_reloc(r300->cs, r300->query_current->cs_buf,
1136                                 0, r300->query_current->domain);
1137     /* ...vertex buffer for SWTCL path... */
1138     if (r300->vbo)
1139         r300->rws->cs_add_reloc(r300->cs, r300_resource(r300->vbo)->cs_buf,
1140                                 r300_resource(r300->vbo)->domain, 0);
1141     /* ...vertex buffers for HWTCL path... */
1142     if (do_validate_vertex_buffers && r300->vertex_arrays_dirty) {
1143         struct pipe_resource **buf = r300->vbuf_mgr->real_vertex_buffer;
1144         struct pipe_resource **last = r300->vbuf_mgr->real_vertex_buffer +
1145                                       r300->vbuf_mgr->nr_real_vertex_buffers;
1146         for (; buf != last; buf++) {
1147             if (!*buf)
1148                 continue;
1149
1150             r300->rws->cs_add_reloc(r300->cs, r300_resource(*buf)->cs_buf,
1151                                     r300_resource(*buf)->domain, 0);
1152         }
1153     }
1154     /* ...and index buffer for HWTCL path. */
1155     if (index_buffer)
1156         r300->rws->cs_add_reloc(r300->cs, r300_resource(index_buffer)->cs_buf,
1157                                 r300_resource(index_buffer)->domain, 0);
1158
1159     /* Now do the validation. */
1160     if (!r300->rws->cs_validate(r300->cs)) {
1161         /* Ooops, an infinite loop, give up. */
1162         if (flushed)
1163             return FALSE;
1164
1165         r300->context.flush(&r300->context, 0, NULL);
1166         flushed = TRUE;
1167         goto validate;
1168     }
1169
1170     return TRUE;
1171 }
1172
1173 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
1174 {
1175     struct r300_atom* atom;
1176     unsigned dwords = 0;
1177
1178     foreach_dirty_atom(r300, atom) {
1179         if (atom->dirty) {
1180             dwords += atom->size;
1181         }
1182     }
1183
1184     /* let's reserve some more, just in case */
1185     dwords += 32;
1186
1187     return dwords;
1188 }
1189
1190 unsigned r300_get_num_cs_end_dwords(struct r300_context *r300)
1191 {
1192     unsigned dwords = 0;
1193
1194     /* Emitted in flush. */
1195     dwords += 26; /* emit_query_end */
1196     dwords += r300->hyperz_state.size + 2; /* emit_hyperz_end + zcache flush */
1197     if (r300->screen->caps.index_bias_supported)
1198         dwords += 2;
1199
1200     return dwords;
1201 }
1202
1203 /* Emit all dirty state. */
1204 void r300_emit_dirty_state(struct r300_context* r300)
1205 {
1206     struct r300_atom *atom;
1207
1208     foreach_dirty_atom(r300, atom) {
1209         if (atom->dirty) {
1210             atom->emit(r300, atom->size, atom->state);
1211             atom->dirty = FALSE;
1212         }
1213     }
1214
1215     r300->first_dirty = NULL;
1216     r300->last_dirty = NULL;
1217     r300->dirty_hw++;
1218 }