2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 /* r300_emit: Functions for emitting state. */
25 #include "r300_emit.h"
27 void r300_emit_blend_state(struct r300_context
* r300
,
28 struct r300_blend_state
* blend
)
32 OUT_CS_REG_SEQ(R300_RB3D_CBLEND
, 2);
33 OUT_CS(blend
->blend_control
);
34 OUT_CS(blend
->alpha_blend_control
);
35 OUT_CS_REG(R300_RB3D_ROPCNTL
, blend
->rop
);
36 OUT_CS_REG(R300_RB3D_DITHER_CTL
, blend
->dither
);
40 void r300_emit_blend_color_state(struct r300_context
* r300
,
41 struct r300_blend_color_state
* bc
)
43 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
46 if (r300screen
->caps
->is_r500
) {
48 OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR
, 2);
49 OUT_CS(bc
->blend_color_red_alpha
);
50 OUT_CS(bc
->blend_color_green_blue
);
54 OUT_CS_REG(R300_RB3D_BLEND_COLOR
, bc
->blend_color
);
59 void r300_emit_dsa_state(struct r300_context
* r300
,
60 struct r300_dsa_state
* dsa
)
62 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
65 BEGIN_CS(r300screen
->caps
->is_r500
? 8 : 8);
66 OUT_CS_REG(R300_FG_ALPHA_FUNC
, dsa
->alpha_function
);
67 /* XXX figure out the r300 counterpart for this */
68 if (r300screen
->caps
->is_r500
) {
69 /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */
71 OUT_CS_REG_SEQ(R300_ZB_CNTL
, 3);
72 OUT_CS(dsa
->z_buffer_control
);
73 OUT_CS(dsa
->z_stencil_control
);
74 OUT_CS(dsa
->stencil_ref_mask
);
75 OUT_CS_REG(R300_ZB_ZTOP
, dsa
->z_buffer_top
);
76 if (r300screen
->caps
->is_r500
) {
77 /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */
82 void r300_emit_fragment_shader(struct r300_context
* r300
,
83 struct r300_fragment_shader
* fs
)
90 OUT_CS_REG(R300_US_CONFIG
, MAX2(fs
->indirections
- 1, 0));
91 OUT_CS_REG(R300_US_PIXSIZE
, fs
->shader
.stack_size
);
92 /* XXX figure out exactly how big the sizes are on this reg */
93 OUT_CS_REG(R300_US_CODE_OFFSET
, 0x0);
94 /* XXX figure these ones out a bit better kthnx */
95 OUT_CS_REG(R300_US_CODE_ADDR_0
, 0x0);
96 OUT_CS_REG(R300_US_CODE_ADDR_1
, 0x0);
97 OUT_CS_REG(R300_US_CODE_ADDR_2
, 0x0);
98 OUT_CS_REG(R300_US_CODE_ADDR_3
, R300_RGBA_OUT
);
100 for (i
= 0; i
< fs
->alu_instruction_count
; i
++) {
101 OUT_CS_REG(R300_US_ALU_RGB_INST_0
+ (4 * i
),
102 fs
->instructions
[i
].alu_rgb_inst
);
103 OUT_CS_REG(R300_US_ALU_RGB_ADDR_0
+ (4 * i
),
104 fs
->instructions
[i
].alu_rgb_addr
);
105 OUT_CS_REG(R300_US_ALU_ALPHA_INST_0
+ (4 * i
),
106 fs
->instructions
[i
].alu_alpha_inst
);
107 OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0
+ (4 * i
),
108 fs
->instructions
[i
].alu_alpha_addr
);
114 void r500_emit_fragment_shader(struct r300_context
* r300
,
115 struct r500_fragment_shader
* fs
)
118 struct r300_constant_buffer
* constants
=
119 &r300
->shader_constants
[PIPE_SHADER_FRAGMENT
];
122 BEGIN_CS(9 + (fs
->instruction_count
* 6) + (constants
->count
? 3 : 0) +
123 (constants
->count
* 4));
124 OUT_CS_REG(R500_US_CONFIG
, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO
);
125 OUT_CS_REG(R500_US_PIXSIZE
, fs
->shader
.stack_size
);
126 OUT_CS_REG(R500_US_CODE_ADDR
, R500_US_CODE_START_ADDR(0) |
127 R500_US_CODE_END_ADDR(fs
->instruction_count
));
129 OUT_CS_REG(R500_GA_US_VECTOR_INDEX
, R500_GA_US_VECTOR_INDEX_TYPE_INSTR
);
130 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA
, fs
->instruction_count
* 6);
131 for (i
= 0; i
< fs
->instruction_count
; i
++) {
132 OUT_CS(fs
->instructions
[i
].inst0
);
133 OUT_CS(fs
->instructions
[i
].inst1
);
134 OUT_CS(fs
->instructions
[i
].inst2
);
135 OUT_CS(fs
->instructions
[i
].inst3
);
136 OUT_CS(fs
->instructions
[i
].inst4
);
137 OUT_CS(fs
->instructions
[i
].inst5
);
140 if (constants
->count
) {
141 OUT_CS_REG(R500_GA_US_VECTOR_INDEX
,
142 R500_GA_US_VECTOR_INDEX_TYPE_CONST
);
143 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA
, constants
->count
* 4);
144 for (i
= 0; i
< constants
->count
; i
++) {
145 OUT_CS_32F(constants
->constants
[i
][0]);
146 OUT_CS_32F(constants
->constants
[i
][1]);
147 OUT_CS_32F(constants
->constants
[i
][2]);
148 OUT_CS_32F(constants
->constants
[i
][3]);
155 /* Translate pipe_format into US_OUT_FMT. Note that formats are stored from
157 uint32_t translate_out_fmt(enum pipe_format format
)
160 case PIPE_FORMAT_A8R8G8B8_UNORM
:
161 return R300_US_OUT_FMT_C4_8
|
162 R300_C0_SEL_B
| R300_C1_SEL_G
|
163 R300_C2_SEL_R
| R300_C3_SEL_A
;
165 return R300_US_OUT_FMT_UNUSED
;
170 /* XXX add pitch, stride, clean up */
171 void r300_emit_fb_state(struct r300_context
* r300
,
172 struct pipe_framebuffer_state
* fb
)
175 struct r300_texture
* tex
;
178 BEGIN_CS((6 * fb
->nr_cbufs
) + (fb
->zsbuf
? 6 : 0) + 4);
179 for (i
= 0; i
< fb
->nr_cbufs
; i
++) {
180 tex
= (struct r300_texture
*)fb
->cbufs
[i
]->texture
;
181 OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0
+ (4 * i
), 1);
182 OUT_CS_RELOC(tex
->buffer
, 0, 0, RADEON_GEM_DOMAIN_VRAM
, 0);
184 OUT_CS_REG(R300_US_OUT_FMT_0
+ (4 * i
),
185 translate_out_fmt(fb
->cbufs
[i
]->format
));
189 tex
= (struct r300_texture
*)fb
->zsbuf
->texture
;
190 OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET
, 1);
191 OUT_CS_RELOC(tex
->buffer
, 0, 0, RADEON_GEM_DOMAIN_VRAM
, 0);
192 if (fb
->zsbuf
->format
== PIPE_FORMAT_Z24S8_UNORM
) {
193 OUT_CS_REG(R300_ZB_FORMAT
,
194 R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL
);
196 OUT_CS_REG(R300_ZB_FORMAT
, 0x0);
200 OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT
,
201 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS
|
202 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D
);
203 OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT
,
204 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE
|
205 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE
);
209 void r300_emit_rs_state(struct r300_context
* r300
, struct r300_rs_state
* rs
)
214 OUT_CS_REG(R300_VAP_CNTL_STATUS
, rs
->vap_control_status
);
215 OUT_CS_REG(R300_GA_POINT_SIZE
, rs
->point_size
);
216 OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX
, 2);
217 OUT_CS(rs
->point_minmax
);
218 OUT_CS(rs
->line_control
);
219 OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE
, 6);
220 OUT_CS(rs
->depth_scale_front
);
221 OUT_CS(rs
->depth_offset_front
);
222 OUT_CS(rs
->depth_scale_back
);
223 OUT_CS(rs
->depth_offset_back
);
224 OUT_CS(rs
->polygon_offset_enable
);
225 OUT_CS(rs
->cull_mode
);
226 OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG
, rs
->line_stipple_config
);
227 OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE
, rs
->line_stipple_value
);
228 OUT_CS_REG(R300_GA_COLOR_CONTROL
, rs
->color_control
);
232 void r300_emit_rs_block_state(struct r300_context
* r300
,
233 struct r300_rs_block
* rs
)
235 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
240 if (r300screen
->caps
->is_r500
) {
241 OUT_CS_REG_SEQ(R500_RS_IP_0
, 8);
243 OUT_CS_REG_SEQ(R300_RS_IP_0
, 8);
245 for (i
= 0; i
< 8; i
++) {
247 debug_printf("ip %d: 0x%08x\n", i
, rs
->ip
[i
]);
250 OUT_CS_REG_SEQ(R300_RS_COUNT
, 2);
252 OUT_CS(rs
->inst_count
);
254 if (r300screen
->caps
->is_r500
) {
255 OUT_CS_REG_SEQ(R500_RS_INST_0
, 8);
257 OUT_CS_REG_SEQ(R300_RS_INST_0
, 8);
259 for (i
= 0; i
< 8; i
++) {
261 debug_printf("inst %d: 0x%08x\n", i
, rs
->inst
[i
]);
264 debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs
->count
,
270 void r300_emit_sampler(struct r300_context
* r300
,
271 struct r300_sampler_state
* sampler
, unsigned offset
)
276 OUT_CS_REG(R300_TX_FILTER0_0
+ (offset
* 4), sampler
->filter0
);
277 OUT_CS_REG(R300_TX_FILTER1_0
+ (offset
* 4), sampler
->filter1
);
278 OUT_CS_REG(R300_TX_BORDER_COLOR_0
+ (offset
* 4), sampler
->border_color
);
282 void r300_emit_scissor_state(struct r300_context
* r300
,
283 struct r300_scissor_state
* scissor
)
288 OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL
, 2);
289 OUT_CS(scissor
->scissor_top_left
);
290 OUT_CS(scissor
->scissor_bottom_right
);
294 void r300_emit_texture(struct r300_context
* r300
,
295 struct r300_texture
* tex
, unsigned offset
)
300 OUT_CS_REG(R300_TX_FORMAT0_0
+ (offset
* 4), tex
->state
.format0
);
301 OUT_CS_REG(R300_TX_FORMAT1_0
+ (offset
* 4), tex
->state
.format1
);
302 OUT_CS_REG(R300_TX_FORMAT2_0
+ (offset
* 4), tex
->state
.format2
);
303 OUT_CS_REG_SEQ(R300_TX_OFFSET_0
+ (offset
* 4), 1);
304 OUT_CS_RELOC(tex
->buffer
, 0,
305 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0, 0);
309 void r300_emit_vertex_format_state(struct r300_context
* r300
)
315 OUT_CS_REG(R300_VAP_VTX_SIZE
, r300
->vertex_info
.vinfo
.size
);
317 OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL
, 2);
318 OUT_CS(r300
->vertex_info
.vinfo
.hwfmt
[0]);
319 OUT_CS(r300
->vertex_info
.vinfo
.hwfmt
[1]);
320 OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0
, 2);
321 OUT_CS(r300
->vertex_info
.vinfo
.hwfmt
[2]);
322 OUT_CS(r300
->vertex_info
.vinfo
.hwfmt
[3]);
323 for (i
= 0; i
< 4; i
++) {
324 debug_printf("hwfmt%d: 0x%08x\n", i
,
325 r300
->vertex_info
.vinfo
.hwfmt
[i
]);
328 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0
, 8);
329 for (i
= 0; i
< 8; i
++) {
330 OUT_CS(r300
->vertex_info
.vap_prog_stream_cntl
[i
]);
331 debug_printf("prog_stream_cntl%d: 0x%08x\n", i
,
332 r300
->vertex_info
.vap_prog_stream_cntl
[i
]);
334 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0
, 8);
335 for (i
= 0; i
< 8; i
++) {
336 OUT_CS(r300
->vertex_info
.vap_prog_stream_cntl_ext
[i
]);
337 debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i
,
338 r300
->vertex_info
.vap_prog_stream_cntl_ext
[i
]);
343 void r300_emit_viewport_state(struct r300_context
* r300
,
344 struct r300_viewport_state
* viewport
)
350 OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE
, 7);
351 OUT_CS_32F(viewport
->xscale
);
352 OUT_CS_32F(viewport
->xoffset
);
353 OUT_CS_32F(viewport
->yscale
);
354 OUT_CS_32F(viewport
->yoffset
);
355 OUT_CS_32F(viewport
->zscale
);
356 OUT_CS_32F(viewport
->zoffset
);
357 OUT_CS(viewport
->vte_control
);
361 static void r300_flush_textures(struct r300_context
* r300
)
366 OUT_CS_REG(R300_TX_INVALTAGS
, 0);
367 OUT_CS_REG(R300_TX_ENABLE
, (1 << r300
->texture_count
) - 1);
371 /* Emit all dirty state. */
372 void r300_emit_dirty_state(struct r300_context
* r300
)
374 struct r300_screen
* r300screen
= r300_screen(r300
->context
.screen
);
378 if (!(r300
->dirty_state
) && !(r300
->dirty_hw
)) {
382 r300_update_derived_state(r300
);
386 if (r300
->dirty_state
& R300_NEW_BLEND
) {
387 r300_emit_blend_state(r300
, r300
->blend_state
);
388 r300
->dirty_state
&= ~R300_NEW_BLEND
;
391 if (r300
->dirty_state
& R300_NEW_BLEND_COLOR
) {
392 r300_emit_blend_color_state(r300
, r300
->blend_color_state
);
393 r300
->dirty_state
&= ~R300_NEW_BLEND_COLOR
;
396 if (r300
->dirty_state
& R300_NEW_DSA
) {
397 r300_emit_dsa_state(r300
, r300
->dsa_state
);
398 r300
->dirty_state
&= ~R300_NEW_DSA
;
401 if (r300
->dirty_state
& R300_NEW_FRAGMENT_SHADER
) {
402 if (r300screen
->caps
->is_r500
) {
403 r500_emit_fragment_shader(r300
,
404 (struct r500_fragment_shader
*)r300
->fs
);
406 r300_emit_fragment_shader(r300
,
407 (struct r300_fragment_shader
*)r300
->fs
);
409 r300
->dirty_state
&= ~R300_NEW_FRAGMENT_SHADER
;
412 if (r300
->dirty_state
& R300_NEW_FRAMEBUFFERS
) {
413 r300_emit_fb_state(r300
, &r300
->framebuffer_state
);
414 r300
->dirty_state
&= ~R300_NEW_FRAMEBUFFERS
;
417 if (r300
->dirty_state
& R300_NEW_RASTERIZER
) {
418 r300_emit_rs_state(r300
, r300
->rs_state
);
419 r300
->dirty_state
&= ~R300_NEW_RASTERIZER
;
422 if (r300
->dirty_state
& R300_NEW_RS_BLOCK
) {
423 r300_emit_rs_block_state(r300
, r300
->rs_block
);
424 r300
->dirty_state
&= ~R300_NEW_RS_BLOCK
;
427 if (r300
->dirty_state
& R300_ANY_NEW_SAMPLERS
) {
428 for (i
= 0; i
< r300
->sampler_count
; i
++) {
429 if (r300
->dirty_state
& (R300_NEW_SAMPLER
<< i
)) {
430 r300_emit_sampler(r300
, r300
->sampler_states
[i
], i
);
431 r300
->dirty_state
&= ~(R300_NEW_SAMPLER
<< i
);
437 if (r300
->dirty_state
& R300_NEW_SCISSOR
) {
438 r300_emit_scissor_state(r300
, r300
->scissor_state
);
439 r300
->dirty_state
&= ~R300_NEW_SCISSOR
;
442 if (r300
->dirty_state
& R300_ANY_NEW_TEXTURES
) {
443 for (i
= 0; i
< r300
->texture_count
; i
++) {
444 if (r300
->dirty_state
& (R300_NEW_TEXTURE
<< i
)) {
445 r300_emit_texture(r300
, r300
->textures
[i
], i
);
446 r300
->dirty_state
&= ~(R300_NEW_TEXTURE
<< i
);
452 if (r300
->dirty_state
& R300_NEW_VIEWPORT
) {
453 r300_emit_viewport_state(r300
, r300
->viewport_state
);
454 r300
->dirty_state
&= ~R300_NEW_VIEWPORT
;
458 r300_flush_textures(r300
);
461 if (r300
->dirty_state
& R300_NEW_VERTEX_FORMAT
) {
462 r300_emit_vertex_format_state(r300
);
463 r300
->dirty_state
&= ~R300_NEW_VERTEX_FORMAT
;