src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 /* r300_emit: Functions for emitting state. */
  24
  25 #include "r300_emit.h"
  26
  27 #include "r300_fs.h"
  28 #include "r300_state_derived.h"
  29 #include "r300_vs.h"
  30
  31 void r300_emit_blend_state(struct r300_context* r300,
  32                            struct r300_blend_state* blend)
  33 {
  34     CS_LOCALS(r300);
  35     BEGIN_CS(7);
  36     OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2);
  37     OUT_CS(blend->blend_control);
  38     OUT_CS(blend->alpha_blend_control);
  39     OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop);
  40     OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither);
  41     END_CS;
  42 }
  43
  44 void r300_emit_blend_color_state(struct r300_context* r300,
  45                                  struct r300_blend_color_state* bc)
  46 {
  47     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  48     CS_LOCALS(r300);
  49
  50     if (r300screen->caps->is_r500) {
  51         BEGIN_CS(3);
  52         OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
  53         OUT_CS(bc->blend_color_red_alpha);
  54         OUT_CS(bc->blend_color_green_blue);
  55         END_CS;
  56     } else {
  57         BEGIN_CS(2);
  58         OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color);
  59         END_CS;
  60     }
  61 }
  62
  63 void r300_emit_clip_state(struct r300_context* r300,
  64                           struct pipe_clip_state* clip)
  65 {
  66     int i;
  67     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  68     CS_LOCALS(r300);
  69
  70     if (r300screen->caps->has_tcl) {
  71         BEGIN_CS(5 + (6 * 4));
  72         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
  73                 (r300screen->caps->is_r500 ?
  74                  R500_PVS_UCP_START : R300_PVS_UCP_START));
  75         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
  76         for (i = 0; i < 6; i++) {
  77             OUT_CS_32F(clip->ucp[i][0]);
  78             OUT_CS_32F(clip->ucp[i][1]);
  79             OUT_CS_32F(clip->ucp[i][2]);
  80             OUT_CS_32F(clip->ucp[i][3]);
  81         }
  82         OUT_CS_REG(R300_VAP_CLIP_CNTL, ((1 << clip->nr) - 1) |
  83                 R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
  84         END_CS;
  85     } else {
  86         BEGIN_CS(2);
  87         OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
  88         END_CS;
  89     }
  90
  91 }
  92
  93 void r300_emit_dsa_state(struct r300_context* r300,
  94                            struct r300_dsa_state* dsa)
  95 {
  96     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  97     CS_LOCALS(r300);
  98
  99     BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8);
 100     OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
 101     /* XXX figure out the r300 counterpart for this */
 102     if (r300screen->caps->is_r500) {
 103         /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */
 104     }
 105     OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
 106     OUT_CS(dsa->z_buffer_control);
 107     OUT_CS(dsa->z_stencil_control);
 108     OUT_CS(dsa->stencil_ref_mask);
 109     OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top);
 110     if (r300screen->caps->is_r500) {
 111         /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */
 112     }
 113     END_CS;
 114 }
 115
 116 static const float * get_shader_constant(
 117     struct r300_context * r300,
 118     struct rc_constant * constant,
 119     struct r300_constant_buffer * externals)
 120 {
 121     static const float zero[4] = { 0.0, 0.0, 0.0, 0.0 };
 122     switch(constant->Type) {
 123         case RC_CONSTANT_EXTERNAL:
 124             return externals->constants[constant->u.External];
 125
 126         case RC_CONSTANT_IMMEDIATE:
 127             return constant->u.Immediate;
 128
 129         default:
 130             debug_printf("r300: Implementation error: Unhandled constant type %i\n",
 131                 constant->Type);
 132             return zero;
 133     }
 134 }
 135
 136 /* Convert a normal single-precision float into the 7.16 format
 137  * used by the R300 fragment shader.
 138  */
 139 static uint32_t pack_float24(float f)
 140 {
 141     union {
 142         float fl;
 143         uint32_t u;
 144     } u;
 145     float mantissa;
 146     int exponent;
 147     uint32_t float24 = 0;
 148
 149     if (f == 0.0)
 150         return 0;
 151
 152     u.fl = f;
 153
 154     mantissa = frexpf(f, &exponent);
 155
 156     /* Handle -ve */
 157     if (mantissa < 0) {
 158         float24 |= (1 << 23);
 159         mantissa = mantissa * -1.0;
 160     }
 161     /* Handle exponent, bias of 63 */
 162     exponent += 62;
 163     float24 |= (exponent << 16);
 164     /* Kill 7 LSB of mantissa */
 165     float24 |= (u.u & 0x7FFFFF) >> 7;
 166
 167     return float24;
 168 }
 169
 170 void r300_emit_fragment_program_code(struct r300_context* r300,
 171                                      struct rX00_fragment_program_code* generic_code,
 172                                      struct r300_constant_buffer* externals)
 173 {
 174     struct r300_fragment_program_code * code = &generic_code->code.r300;
 175     struct rc_constant_list * constants = &generic_code->constants;
 176     int i;
 177     CS_LOCALS(r300);
 178
 179     BEGIN_CS(15 +
 180              code->alu.length * 4 +
 181              (code->tex.length ? (1 + code->tex.length) : 0) +
 182              (constants->Count ? (1 + constants->Count * 4) : 0));
 183
 184     OUT_CS_REG(R300_US_CONFIG, code->config);
 185     OUT_CS_REG(R300_US_PIXSIZE, code->pixsize);
 186     OUT_CS_REG(R300_US_CODE_OFFSET, code->code_offset);
 187
 188     OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4);
 189     for(i = 0; i < 4; ++i)
 190         OUT_CS(code->code_addr[i]);
 191
 192     OUT_CS_REG_SEQ(R300_US_ALU_RGB_INST_0, code->alu.length);
 193     for (i = 0; i < code->alu.length; i++)
 194         OUT_CS(code->alu.inst[i].rgb_inst);
 195
 196     OUT_CS_REG_SEQ(R300_US_ALU_RGB_ADDR_0, code->alu.length);
 197     for (i = 0; i < code->alu.length; i++)
 198         OUT_CS(code->alu.inst[i].rgb_addr);
 199
 200     OUT_CS_REG_SEQ(R300_US_ALU_ALPHA_INST_0, code->alu.length);
 201     for (i = 0; i < code->alu.length; i++)
 202         OUT_CS(code->alu.inst[i].alpha_inst);
 203
 204     OUT_CS_REG_SEQ(R300_US_ALU_ALPHA_ADDR_0, code->alu.length);
 205     for (i = 0; i < code->alu.length; i++)
 206         OUT_CS(code->alu.inst[i].alpha_addr);
 207
 208     if (code->tex.length) {
 209         OUT_CS_REG_SEQ(R300_US_TEX_INST_0, code->tex.length);
 210         for(i = 0; i < code->tex.length; ++i)
 211             OUT_CS(code->tex.inst[i]);
 212     }
 213
 214     if (constants->Count) {
 215         OUT_CS_ONE_REG(R300_PFS_PARAM_0_X, constants->Count * 4);
 216         for(i = 0; i < constants->Count; ++i) {
 217             const float * data = get_shader_constant(r300, &constants->Constants[i], externals);
 218             OUT_CS(pack_float24(data[0]));
 219             OUT_CS(pack_float24(data[1]));
 220             OUT_CS(pack_float24(data[2]));
 221             OUT_CS(pack_float24(data[3]));
 222         }
 223     }
 224
 225     END_CS;
 226 }
 227
 228 void r500_emit_fragment_program_code(struct r300_context* r300,
 229                                      struct rX00_fragment_program_code* generic_code,
 230                                      struct r300_constant_buffer* externals)
 231 {
 232     struct r500_fragment_program_code * code = &generic_code->code.r500;
 233     struct rc_constant_list * constants = &generic_code->constants;
 234     int i;
 235     CS_LOCALS(r300);
 236
 237     BEGIN_CS(13 +
 238              ((code->inst_end + 1) * 6) +
 239              (constants->Count ? (3 + (constants->Count * 4)) : 0));
 240     OUT_CS_REG(R500_US_CONFIG, 0);
 241     OUT_CS_REG(R500_US_PIXSIZE, code->max_temp_idx);
 242     OUT_CS_REG(R500_US_CODE_RANGE,
 243                R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(code->inst_end));
 244     OUT_CS_REG(R500_US_CODE_OFFSET, 0);
 245     OUT_CS_REG(R500_US_CODE_ADDR,
 246                R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(code->inst_end));
 247
 248     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
 249     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, (code->inst_end + 1) * 6);
 250     for (i = 0; i <= code->inst_end; i++) {
 251         OUT_CS(code->inst[i].inst0);
 252         OUT_CS(code->inst[i].inst1);
 253         OUT_CS(code->inst[i].inst2);
 254         OUT_CS(code->inst[i].inst3);
 255         OUT_CS(code->inst[i].inst4);
 256         OUT_CS(code->inst[i].inst5);
 257     }
 258
 259     if (constants->Count) {
 260         OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 261         OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->Count * 4);
 262         for (i = 0; i < constants->Count; i++) {
 263             const float * data = get_shader_constant(r300, &constants->Constants[i], externals);
 264             OUT_CS_32F(data[0]);
 265             OUT_CS_32F(data[1]);
 266             OUT_CS_32F(data[2]);
 267             OUT_CS_32F(data[3]);
 268         }
 269     }
 270
 271     END_CS;
 272 }
 273
 274 void r300_emit_fb_state(struct r300_context* r300,
 275                         struct pipe_framebuffer_state* fb)
 276 {
 277     struct r300_texture* tex;
 278     unsigned pixpitch;
 279     int i;
 280     CS_LOCALS(r300);
 281
 282     BEGIN_CS((10 * fb->nr_cbufs) + (fb->zsbuf ? 10 : 0) + 4);
 283     for (i = 0; i < fb->nr_cbufs; i++) {
 284         tex = (struct r300_texture*)fb->cbufs[i]->texture;
 285         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 286         pixpitch = r300_texture_get_stride(tex, 0) / tex->tex.block.size;
 287
 288         OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
 289         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 290
 291         OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1);
 292         OUT_CS_RELOC(tex->buffer, pixpitch |
 293                      r300_translate_colorformat(tex->tex.format), 0,
 294                      RADEON_GEM_DOMAIN_VRAM, 0);
 295
 296         OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i),
 297             r300_translate_out_fmt(fb->cbufs[i]->format));
 298     }
 299
 300     if (fb->zsbuf) {
 301         tex = (struct r300_texture*)fb->zsbuf->texture;
 302         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
 303         pixpitch = r300_texture_get_stride(tex, 0) / tex->tex.block.size;
 304
 305         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 306         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 307
 308         OUT_CS_REG(R300_ZB_FORMAT, r300_translate_zsformat(tex->tex.format));
 309
 310         OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
 311         OUT_CS_RELOC(tex->buffer, pixpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 312     }
 313
 314     OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 315         R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 316         R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 317     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
 318         R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 319         R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 320     END_CS;
 321 }
 322
 323 void r300_emit_query_begin(struct r300_context* r300,
 324                            struct r300_query* query)
 325 {
 326     CS_LOCALS(r300);
 327
 328     /* XXX This will almost certainly not return good results
 329      * for overlapping queries. */
 330     BEGIN_CS(2);
 331     OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
 332     END_CS;
 333 }
 334
 335 void r300_emit_query_end(struct r300_context* r300,
 336                          struct r300_query* query)
 337 {
 338     struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps;
 339     CS_LOCALS(r300);
 340
 341     if (!r300->winsys->add_buffer(r300->winsys, r300->oqbo,
 342                 0, RADEON_GEM_DOMAIN_GTT)) {
 343         debug_printf("r300: There wasn't room for the OQ buffer!?"
 344                 " Oh noes!\n");
 345     }
 346
 347     assert(caps->num_frag_pipes);
 348     BEGIN_CS(6 * caps->num_frag_pipes + 2);
 349     /* I'm not so sure I like this switch, but it's hard to be elegant
 350      * when there's so many special cases...
 351      *
 352      * So here's the basic idea. For each pipe, enable writes to it only,
 353      * then put out the relocation for ZPASS_ADDR, taking into account a
 354      * 4-byte offset for each pipe. RV380 and older are special; they have
 355      * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
 356      * so there's a chipset cap for that. */
 357     switch (caps->num_frag_pipes) {
 358         case 4:
 359             /* pipe 3 only */
 360             OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
 361             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 362             OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 3),
 363                     0, RADEON_GEM_DOMAIN_GTT, 0);
 364         case 3:
 365             /* pipe 2 only */
 366             OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
 367             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 368             OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 2),
 369                     0, RADEON_GEM_DOMAIN_GTT, 0);
 370         case 2:
 371             /* pipe 1 only */
 372             /* As mentioned above, accomodate RV380 and older. */
 373             OUT_CS_REG(R300_SU_REG_DEST,
 374                     1 << (caps->high_second_pipe ? 3 : 1));
 375             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 376             OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 1),
 377                     0, RADEON_GEM_DOMAIN_GTT, 0);
 378         case 1:
 379             /* pipe 0 only */
 380             OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
 381             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 382             OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 0),
 383                     0, RADEON_GEM_DOMAIN_GTT, 0);
 384             break;
 385         default:
 386             debug_printf("r300: Implementation error: Chipset reports %d"
 387                     " pixel pipes!\n", caps->num_frag_pipes);
 388             assert(0);
 389     }
 390
 391     /* And, finally, reset it to normal... */
 392     OUT_CS_REG(R300_SU_REG_DEST, 0xF);
 393     END_CS;
 394
 395 }
 396
 397 void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs)
 398 {
 399     CS_LOCALS(r300);
 400
 401     BEGIN_CS(20);
 402     OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
 403     OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
 404     OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
 405     OUT_CS(rs->point_minmax);
 406     OUT_CS(rs->line_control);
 407     OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6);
 408     OUT_CS(rs->depth_scale_front);
 409     OUT_CS(rs->depth_offset_front);
 410     OUT_CS(rs->depth_scale_back);
 411     OUT_CS(rs->depth_offset_back);
 412     OUT_CS(rs->polygon_offset_enable);
 413     OUT_CS(rs->cull_mode);
 414     OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
 415     OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
 416     OUT_CS_REG(R300_GA_COLOR_CONTROL, rs->color_control);
 417     END_CS;
 418 }
 419
 420 void r300_emit_rs_block_state(struct r300_context* r300,
 421                               struct r300_rs_block* rs)
 422 {
 423     int i;
 424     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 425     CS_LOCALS(r300);
 426
 427     BEGIN_CS(21);
 428     if (r300screen->caps->is_r500) {
 429         OUT_CS_REG_SEQ(R500_RS_IP_0, 8);
 430     } else {
 431         OUT_CS_REG_SEQ(R300_RS_IP_0, 8);
 432     }
 433     for (i = 0; i < 8; i++) {
 434         OUT_CS(rs->ip[i]);
 435         /* debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); */
 436     }
 437
 438     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 439     OUT_CS(rs->count);
 440     OUT_CS(rs->inst_count);
 441
 442     if (r300screen->caps->is_r500) {
 443         OUT_CS_REG_SEQ(R500_RS_INST_0, 8);
 444     } else {
 445         OUT_CS_REG_SEQ(R300_RS_INST_0, 8);
 446     }
 447     for (i = 0; i < 8; i++) {
 448         OUT_CS(rs->inst[i]);
 449         /* debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); */
 450     }
 451
 452     /* debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count,
 453      *        rs->inst_count); */
 454
 455     END_CS;
 456 }
 457
 458 void r300_emit_scissor_state(struct r300_context* r300,
 459                              struct r300_scissor_state* scissor)
 460 {
 461     CS_LOCALS(r300);
 462
 463     BEGIN_CS(3);
 464     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 465     OUT_CS(scissor->scissor_top_left);
 466     OUT_CS(scissor->scissor_bottom_right);
 467     END_CS;
 468 }
 469
 470 void r300_emit_texture(struct r300_context* r300,
 471                        struct r300_sampler_state* sampler,
 472                        struct r300_texture* tex,
 473                        unsigned offset)
 474 {
 475     CS_LOCALS(r300);
 476
 477     BEGIN_CS(16);
 478     OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), sampler->filter0);
 479     OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1);
 480     OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color);
 481
 482     OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0);
 483     OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1);
 484     OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2);
 485     OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (offset * 4), 1);
 486     OUT_CS_RELOC(tex->buffer, 0,
 487             RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0);
 488     END_CS;
 489 }
 490
 491 void r300_emit_vertex_buffer(struct r300_context* r300)
 492 {
 493     CS_LOCALS(r300);
 494
 495     DBG(r300, DBG_DRAW, "r300: Preparing vertex buffer %p for render, "
 496             "vertex size %d\n", r300->vbo,
 497             r300->vertex_info.vinfo.size);
 498     /* Set the pointer to our vertex buffer. The emitted values are this:
 499      * PACKET3 [3D_LOAD_VBPNTR]
 500      * COUNT   [1]
 501      * FORMAT  [size | stride << 8]
 502      * OFFSET  [offset into BO]
 503      * VBPNTR  [relocated BO]
 504      */
 505     BEGIN_CS(7);
 506     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 507     OUT_CS(1);
 508     OUT_CS(r300->vertex_info.vinfo.size |
 509             (r300->vertex_info.vinfo.size << 8));
 510     OUT_CS(r300->vbo_offset);
 511     OUT_CS_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0);
 512     END_CS;
 513 }
 514
 515 void r300_emit_vertex_format_state(struct r300_context* r300)
 516 {
 517     int i;
 518     CS_LOCALS(r300);
 519
 520     BEGIN_CS(26);
 521     OUT_CS_REG(R300_VAP_VTX_SIZE, r300->vertex_info.vinfo.size);
 522
 523     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 524     OUT_CS(r300->vertex_info.vinfo.hwfmt[0]);
 525     OUT_CS(r300->vertex_info.vinfo.hwfmt[1]);
 526     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 527     OUT_CS(r300->vertex_info.vinfo.hwfmt[2]);
 528     OUT_CS(r300->vertex_info.vinfo.hwfmt[3]);
 529     /* for (i = 0; i < 4; i++) {
 530      *    debug_printf("hwfmt%d: 0x%08x\n", i,
 531      *            r300->vertex_info.vinfo.hwfmt[i]);
 532      * } */
 533
 534     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8);
 535     for (i = 0; i < 8; i++) {
 536         OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]);
 537         /* debug_printf("prog_stream_cntl%d: 0x%08x\n", i,
 538          *        r300->vertex_info.vap_prog_stream_cntl[i]); */
 539     }
 540     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8);
 541     for (i = 0; i < 8; i++) {
 542         OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]);
 543         /* debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i,
 544          *        r300->vertex_info.vap_prog_stream_cntl_ext[i]); */
 545     }
 546     END_CS;
 547 }
 548
 549 void r300_emit_vertex_program_code(struct r300_context* r300,
 550                                    struct r300_vertex_program_code* code,
 551                                    struct r300_constant_buffer* constants)
 552 {
 553     int i;
 554     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 555     unsigned instruction_count = code->length / 4;
 556     CS_LOCALS(r300);
 557
 558     if (!r300screen->caps->has_tcl) {
 559         debug_printf("r300: Implementation error: emit_vertex_shader called,"
 560                 " but has_tcl is FALSE!\n");
 561         return;
 562     }
 563
 564     if (code->constants.Count) {
 565         BEGIN_CS(14 + code->length + (code->constants.Count * 4));
 566     } else {
 567         BEGIN_CS(11 + code->length);
 568     }
 569
 570     /* R300_VAP_PVS_CODE_CNTL_0
 571      * R300_VAP_PVS_CONST_CNTL
 572      * R300_VAP_PVS_CODE_CNTL_1
 573      * See the r5xx docs for instructions on how to use these.
 574      * XXX these could be optimized to select better values... */
 575     OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
 576     OUT_CS(R300_PVS_FIRST_INST(0) |
 577             R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
 578             R300_PVS_LAST_INST(instruction_count - 1));
 579     OUT_CS(R300_PVS_MAX_CONST_ADDR(code->constants.Count - 1));
 580     OUT_CS(instruction_count - 1);
 581
 582     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 583     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
 584     for (i = 0; i < code->length; i++)
 585         OUT_CS(code->body.d[i]);
 586
 587     if (code->constants.Count) {
 588         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 589                 (r300screen->caps->is_r500 ?
 590                  R500_PVS_CONST_START : R300_PVS_CONST_START));
 591         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->constants.Count * 4);
 592         for (i = 0; i < code->constants.Count; i++) {
 593             const float * data = get_shader_constant(r300, &code->constants.Constants[i], constants);
 594             OUT_CS_32F(data[0]);
 595             OUT_CS_32F(data[1]);
 596             OUT_CS_32F(data[2]);
 597             OUT_CS_32F(data[3]);
 598         }
 599     }
 600
 601     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
 602             R300_PVS_NUM_CNTLRS(5) |
 603             R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) |
 604             R300_PVS_VF_MAX_VTX_NUM(12));
 605     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 606     END_CS;
 607 }
 608
 609 void r300_emit_vertex_shader(struct r300_context* r300,
 610                              struct r300_vertex_shader* vs)
 611 {
 612     r300_emit_vertex_program_code(r300, &vs->code, &r300->shader_constants[PIPE_SHADER_VERTEX]);
 613 }
 614
 615 void r300_emit_viewport_state(struct r300_context* r300,
 616                               struct r300_viewport_state* viewport)
 617 {
 618     CS_LOCALS(r300);
 619
 620     BEGIN_CS(9);
 621     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
 622     OUT_CS_32F(viewport->xscale);
 623     OUT_CS_32F(viewport->xoffset);
 624     OUT_CS_32F(viewport->yscale);
 625     OUT_CS_32F(viewport->yoffset);
 626     OUT_CS_32F(viewport->zscale);
 627     OUT_CS_32F(viewport->zoffset);
 628
 629     if (r300->rs_state->enable_vte) {
 630         OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
 631     } else {
 632         OUT_CS_REG(R300_VAP_VTE_CNTL, 0);
 633     }
 634     END_CS;
 635 }
 636
 637 void r300_flush_textures(struct r300_context* r300)
 638 {
 639     CS_LOCALS(r300);
 640
 641     BEGIN_CS(4);
 642     OUT_CS_REG(R300_TX_INVALTAGS, 0);
 643     OUT_CS_REG(R300_TX_ENABLE, (1 << r300->texture_count) - 1);
 644     END_CS;
 645 }
 646
 647 /* Emit all dirty state. */
 648 void r300_emit_dirty_state(struct r300_context* r300)
 649 {
 650     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 651     struct r300_texture* tex;
 652     int i, dirty_tex = 0;
 653     boolean invalid = FALSE;
 654
 655     if (!(r300->dirty_state)) {
 656         return;
 657     }
 658
 659     r300_update_derived_state(r300);
 660
 661     /* XXX check size */
 662 validate:
 663     /* Color buffers... */
 664     for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) {
 665         tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]->texture;
 666         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 667         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 668                     0, RADEON_GEM_DOMAIN_VRAM)) {
 669             r300->context.flush(&r300->context, 0, NULL);
 670             goto validate;
 671         }
 672     }
 673     /* ...depth buffer... */
 674     if (r300->framebuffer_state.zsbuf) {
 675         tex = (struct r300_texture*)r300->framebuffer_state.zsbuf->texture;
 676         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
 677         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 678                     0, RADEON_GEM_DOMAIN_VRAM)) {
 679             r300->context.flush(&r300->context, 0, NULL);
 680             goto validate;
 681         }
 682     }
 683     /* ...textures... */
 684     for (i = 0; i < r300->texture_count; i++) {
 685         tex = r300->textures[i];
 686         assert(tex && tex->buffer && "texture is marked, but NULL!");
 687         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 688                     RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) {
 689             r300->context.flush(&r300->context, 0, NULL);
 690             goto validate;
 691         }
 692     }
 693     /* ...occlusion query buffer... */
 694     if (!r300->winsys->add_buffer(r300->winsys, r300->oqbo,
 695                 0, RADEON_GEM_DOMAIN_GTT)) {
 696         r300->context.flush(&r300->context, 0, NULL);
 697         goto validate;
 698     }
 699     /* ...and vertex buffer. */
 700     if (r300->vbo) {
 701         if (!r300->winsys->add_buffer(r300->winsys, r300->vbo,
 702                     RADEON_GEM_DOMAIN_GTT, 0)) {
 703             r300->context.flush(&r300->context, 0, NULL);
 704             goto validate;
 705         }
 706     } else {
 707         debug_printf("No VBO while emitting dirty state!\n");
 708     }
 709     if (!r300->winsys->validate(r300->winsys)) {
 710         r300->context.flush(&r300->context, 0, NULL);
 711         if (invalid) {
 712             /* Well, hell. */
 713             debug_printf("r300: Stuck in validation loop, gonna quit now.");
 714             exit(1);
 715         }
 716         invalid = TRUE;
 717         goto validate;
 718     }
 719
 720     if (r300->dirty_state & R300_NEW_BLEND) {
 721         r300_emit_blend_state(r300, r300->blend_state);
 722         r300->dirty_state &= ~R300_NEW_BLEND;
 723     }
 724
 725     if (r300->dirty_state & R300_NEW_BLEND_COLOR) {
 726         r300_emit_blend_color_state(r300, r300->blend_color_state);
 727         r300->dirty_state &= ~R300_NEW_BLEND_COLOR;
 728     }
 729
 730     if (r300->dirty_state & R300_NEW_CLIP) {
 731         r300_emit_clip_state(r300, &r300->clip_state);
 732         r300->dirty_state &= ~R300_NEW_CLIP;
 733     }
 734
 735     if (r300->dirty_state & R300_NEW_DSA) {
 736         r300_emit_dsa_state(r300, r300->dsa_state);
 737         r300->dirty_state &= ~R300_NEW_DSA;
 738     }
 739
 740     if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) {
 741         if (r300screen->caps->is_r500) {
 742             r500_emit_fragment_program_code(r300, &r300->fs->code, &r300->shader_constants[PIPE_SHADER_FRAGMENT]);
 743         } else {
 744             r300_emit_fragment_program_code(r300, &r300->fs->code, &r300->shader_constants[PIPE_SHADER_FRAGMENT]);
 745         }
 746         r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER;
 747     }
 748
 749     if (r300->dirty_state & R300_NEW_FRAMEBUFFERS) {
 750         r300_emit_fb_state(r300, &r300->framebuffer_state);
 751         r300->dirty_state &= ~R300_NEW_FRAMEBUFFERS;
 752     }
 753
 754     if (r300->dirty_state & R300_NEW_RASTERIZER) {
 755         r300_emit_rs_state(r300, r300->rs_state);
 756         r300->dirty_state &= ~R300_NEW_RASTERIZER;
 757     }
 758
 759     if (r300->dirty_state & R300_NEW_RS_BLOCK) {
 760         r300_emit_rs_block_state(r300, r300->rs_block);
 761         r300->dirty_state &= ~R300_NEW_RS_BLOCK;
 762     }
 763
 764     if (r300->dirty_state & R300_NEW_SCISSOR) {
 765         r300_emit_scissor_state(r300, r300->scissor_state);
 766         r300->dirty_state &= ~R300_NEW_SCISSOR;
 767     }
 768
 769     /* Samplers and textures are tracked separately but emitted together. */
 770     if (r300->dirty_state &
 771             (R300_ANY_NEW_SAMPLERS | R300_ANY_NEW_TEXTURES)) {
 772         for (i = 0; i < MIN2(r300->sampler_count, r300->texture_count); i++) {
 773             if (r300->dirty_state &
 774                     ((R300_NEW_SAMPLER << i) | (R300_NEW_TEXTURE << i))) {
 775                 r300_emit_texture(r300,
 776                         r300->sampler_states[i],
 777                         r300->textures[i],
 778                         i);
 779                 r300->dirty_state &=
 780                     ~((R300_NEW_SAMPLER << i) | (R300_NEW_TEXTURE << i));
 781                 dirty_tex++;
 782             }
 783         }
 784         r300->dirty_state &= ~(R300_ANY_NEW_SAMPLERS | R300_ANY_NEW_TEXTURES);
 785     }
 786
 787     if (r300->dirty_state & R300_NEW_VIEWPORT) {
 788         r300_emit_viewport_state(r300, r300->viewport_state);
 789         r300->dirty_state &= ~R300_NEW_VIEWPORT;
 790     }
 791
 792     if (dirty_tex) {
 793         r300_flush_textures(r300);
 794     }
 795
 796     if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) {
 797         r300_emit_vertex_format_state(r300);
 798         r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT;
 799     }
 800
 801     if (r300->dirty_state & R300_NEW_VERTEX_SHADER) {
 802         r300_emit_vertex_shader(r300, r300->vs);
 803         r300->dirty_state &= ~R300_NEW_VERTEX_SHADER;
 804     }
 805
 806     /* XXX
 807     assert(r300->dirty_state == 0);
 808     */
 809
 810     /* Finally, emit the VBO. */
 811     r300_emit_vertex_buffer(r300);
 812
 813     r300->dirty_hw++;
 814 }