src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 /* r300_emit: Functions for emitting state. */
  24
  25 #include "r300_emit.h"
  26
  27 void r300_emit_blend_state(struct r300_context* r300,
  28                            struct r300_blend_state* blend)
  29 {
  30     CS_LOCALS(r300);
  31     BEGIN_CS(7);
  32     OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2);
  33     OUT_CS(blend->blend_control);
  34     OUT_CS(blend->alpha_blend_control);
  35     OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop);
  36     OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither);
  37     END_CS;
  38 }
  39
  40 void r300_emit_blend_color_state(struct r300_context* r300,
  41                                  struct r300_blend_color_state* bc)
  42 {
  43     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  44     CS_LOCALS(r300);
  45
  46     if (r300screen->caps->is_r500) {
  47         BEGIN_CS(3);
  48         OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
  49         OUT_CS(bc->blend_color_red_alpha);
  50         OUT_CS(bc->blend_color_green_blue);
  51         END_CS;
  52     } else {
  53         BEGIN_CS(2);
  54         OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color);
  55         END_CS;
  56     }
  57 }
  58
  59 void r300_emit_clip_state(struct r300_context* r300,
  60                           struct pipe_clip_state* clip)
  61 {
  62     int i;
  63     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  64     CS_LOCALS(r300);
  65
  66     if (!r300screen->caps->has_tcl) {
  67         return;
  68     }
  69
  70     BEGIN_CS(5 + (6 * 4));
  71     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
  72             (r300screen->caps->is_r500 ?
  73              R500_PVS_UCP_START : R300_PVS_UCP_START));
  74     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
  75     for (i = 0; i < 6; i++) {
  76         OUT_CS_32F(clip->ucp[i][0]);
  77         OUT_CS_32F(clip->ucp[i][1]);
  78         OUT_CS_32F(clip->ucp[i][2]);
  79         OUT_CS_32F(clip->ucp[i][3]);
  80     }
  81
  82     OUT_CS_REG(R300_VAP_CLIP_CNTL, ((1 << clip->nr) - 1) |
  83             R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
  84     END_CS;
  85 }
  86
  87 void r300_emit_dsa_state(struct r300_context* r300,
  88                            struct r300_dsa_state* dsa)
  89 {
  90     struct r300_screen* r300screen = r300_screen(r300->context.screen);
  91     CS_LOCALS(r300);
  92
  93     BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8);
  94     OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
  95     /* XXX figure out the r300 counterpart for this */
  96     if (r300screen->caps->is_r500) {
  97         /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */
  98     }
  99     OUT_CS_REG_SEQ(R300_ZB_CNTL, 3);
 100     OUT_CS(dsa->z_buffer_control);
 101     OUT_CS(dsa->z_stencil_control);
 102     OUT_CS(dsa->stencil_ref_mask);
 103     OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top);
 104     if (r300screen->caps->is_r500) {
 105         /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */
 106     }
 107     END_CS;
 108 }
 109
 110 void r300_emit_fragment_shader(struct r300_context* r300,
 111                                struct r300_fragment_shader* fs)
 112 {
 113     int i;
 114     CS_LOCALS(r300);
 115
 116     BEGIN_CS(22);
 117
 118     OUT_CS_REG(R300_US_CONFIG, fs->indirections);
 119     OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size);
 120     /* XXX figure out exactly how big the sizes are on this reg */
 121     OUT_CS_REG(R300_US_CODE_OFFSET, 0x40);
 122     /* XXX figure these ones out a bit better kthnx */
 123     OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0);
 124     OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
 125     OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
 126     OUT_CS_REG(R300_US_CODE_ADDR_3, 0x40 | R300_RGBA_OUT);
 127
 128     for (i = 0; i < fs->alu_instruction_count; i++) {
 129         OUT_CS_REG(R300_US_ALU_RGB_INST_0 + (4 * i),
 130             fs->instructions[i].alu_rgb_inst);
 131         OUT_CS_REG(R300_US_ALU_RGB_ADDR_0 + (4 * i),
 132             fs->instructions[i].alu_rgb_addr);
 133         OUT_CS_REG(R300_US_ALU_ALPHA_INST_0 + (4 * i),
 134             fs->instructions[i].alu_alpha_inst);
 135         OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0 + (4 * i),
 136             fs->instructions[i].alu_alpha_addr);
 137     }
 138
 139     END_CS;
 140 }
 141
 142 void r500_emit_fragment_shader(struct r300_context* r300,
 143                                struct r500_fragment_shader* fs)
 144 {
 145     int i;
 146     struct r300_constant_buffer* constants =
 147         &r300->shader_constants[PIPE_SHADER_FRAGMENT];
 148     CS_LOCALS(r300);
 149
 150     BEGIN_CS(9 + (fs->instruction_count * 6) + (constants->count ? 3 : 0) +
 151             (constants->count * 4));
 152     OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
 153     OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size);
 154     OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
 155             R500_US_CODE_END_ADDR(fs->instruction_count));
 156
 157     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
 158     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, fs->instruction_count * 6);
 159     for (i = 0; i < fs->instruction_count; i++) {
 160         OUT_CS(fs->instructions[i].inst0);
 161         OUT_CS(fs->instructions[i].inst1);
 162         OUT_CS(fs->instructions[i].inst2);
 163         OUT_CS(fs->instructions[i].inst3);
 164         OUT_CS(fs->instructions[i].inst4);
 165         OUT_CS(fs->instructions[i].inst5);
 166     }
 167
 168     if (constants->count) {
 169         OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 170                 R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 171         OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->count * 4);
 172         for (i = 0; i < constants->count; i++) {
 173             OUT_CS_32F(constants->constants[i][0]);
 174             OUT_CS_32F(constants->constants[i][1]);
 175             OUT_CS_32F(constants->constants[i][2]);
 176             OUT_CS_32F(constants->constants[i][3]);
 177         }
 178     }
 179
 180     END_CS;
 181 }
 182
 183 void r300_emit_fb_state(struct r300_context* r300,
 184                         struct pipe_framebuffer_state* fb)
 185 {
 186     struct r300_texture* tex;
 187     unsigned pixpitch;
 188     int i;
 189     CS_LOCALS(r300);
 190
 191     BEGIN_CS((8 * fb->nr_cbufs) + (fb->zsbuf ? 8 : 0) + 4);
 192     for (i = 0; i < fb->nr_cbufs; i++) {
 193         tex = (struct r300_texture*)fb->cbufs[i]->texture;
 194         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 195         pixpitch = tex->stride / tex->tex.block.size;
 196
 197         OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
 198         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 199
 200         OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), pixpitch |
 201             r300_translate_colorformat(tex->tex.format));
 202
 203         OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i),
 204             r300_translate_out_fmt(fb->cbufs[i]->format));
 205     }
 206
 207     if (fb->zsbuf) {
 208         tex = (struct r300_texture*)fb->zsbuf->texture;
 209         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
 210         pixpitch = tex->stride / tex->tex.block.size;
 211
 212         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 213         OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
 214
 215         OUT_CS_REG(R300_ZB_FORMAT, r300_translate_zsformat(tex->tex.format));
 216
 217         OUT_CS_REG(R300_ZB_DEPTHPITCH, pixpitch);
 218     }
 219
 220     OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 221         R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 222         R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 223     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
 224         R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 225         R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 226     END_CS;
 227 }
 228
 229 void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs)
 230 {
 231     CS_LOCALS(r300);
 232
 233     BEGIN_CS(20);
 234     OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
 235     OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
 236     OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
 237     OUT_CS(rs->point_minmax);
 238     OUT_CS(rs->line_control);
 239     OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6);
 240     OUT_CS(rs->depth_scale_front);
 241     OUT_CS(rs->depth_offset_front);
 242     OUT_CS(rs->depth_scale_back);
 243     OUT_CS(rs->depth_offset_back);
 244     OUT_CS(rs->polygon_offset_enable);
 245     OUT_CS(rs->cull_mode);
 246     OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
 247     OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
 248     OUT_CS_REG(R300_GA_COLOR_CONTROL, rs->color_control);
 249     END_CS;
 250 }
 251
 252 void r300_emit_rs_block_state(struct r300_context* r300,
 253                               struct r300_rs_block* rs)
 254 {
 255     int i;
 256     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 257     CS_LOCALS(r300);
 258
 259     BEGIN_CS(21);
 260     if (r300screen->caps->is_r500) {
 261         OUT_CS_REG_SEQ(R500_RS_IP_0, 8);
 262     } else {
 263         OUT_CS_REG_SEQ(R300_RS_IP_0, 8);
 264     }
 265     for (i = 0; i < 8; i++) {
 266         OUT_CS(rs->ip[i]);
 267         /* debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); */
 268     }
 269
 270     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 271     OUT_CS(rs->count);
 272     OUT_CS(rs->inst_count);
 273
 274     if (r300screen->caps->is_r500) {
 275         OUT_CS_REG_SEQ(R500_RS_INST_0, 8);
 276     } else {
 277         OUT_CS_REG_SEQ(R300_RS_INST_0, 8);
 278     }
 279     for (i = 0; i < 8; i++) {
 280         OUT_CS(rs->inst[i]);
 281         /* debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); */
 282     }
 283
 284     /* debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count,
 285      *        rs->inst_count); */
 286
 287     END_CS;
 288 }
 289
 290 void r300_emit_sampler(struct r300_context* r300,
 291                        struct r300_sampler_state* sampler, unsigned offset)
 292 {
 293     CS_LOCALS(r300);
 294
 295     BEGIN_CS(6);
 296     OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), sampler->filter0);
 297     OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1);
 298     OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color);
 299     END_CS;
 300 }
 301
 302 void r300_emit_scissor_state(struct r300_context* r300,
 303                              struct r300_scissor_state* scissor)
 304 {
 305     CS_LOCALS(r300);
 306
 307     BEGIN_CS(3);
 308     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 309     OUT_CS(scissor->scissor_top_left);
 310     OUT_CS(scissor->scissor_bottom_right);
 311     END_CS;
 312 }
 313
 314 void r300_emit_texture(struct r300_context* r300,
 315                        struct r300_texture* tex, unsigned offset)
 316 {
 317     CS_LOCALS(r300);
 318
 319     BEGIN_CS(10);
 320     OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0);
 321     OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1);
 322     OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2);
 323     OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (offset * 4), 1);
 324     OUT_CS_RELOC(tex->buffer, 0,
 325             RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0);
 326     END_CS;
 327 }
 328
 329 void r300_emit_vertex_buffer(struct r300_context* r300)
 330 {
 331     CS_LOCALS(r300);
 332
 333     debug_printf("r300: Preparing vertex buffer %p for render, "
 334             "vertex size %d\n", r300->vbo,
 335             r300->vertex_info.vinfo.size);
 336     /* Set the pointer to our vertex buffer. The emitted values are this:
 337      * PACKET3 [3D_LOAD_VBPNTR]
 338      * COUNT   [1]
 339      * FORMAT  [size | stride << 8]
 340      * OFFSET  [offset into BO]
 341      * VBPNTR  [relocated BO]
 342      */
 343     BEGIN_CS(7);
 344     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 345     OUT_CS(1);
 346     OUT_CS(r300->vertex_info.vinfo.size |
 347             (r300->vertex_info.vinfo.size << 8));
 348     OUT_CS(r300->vbo_offset);
 349     OUT_CS_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0);
 350     END_CS;
 351 }
 352
 353 void r300_emit_vertex_format_state(struct r300_context* r300)
 354 {
 355     int i;
 356     CS_LOCALS(r300);
 357
 358     BEGIN_CS(26);
 359     OUT_CS_REG(R300_VAP_VTX_SIZE, r300->vertex_info.vinfo.size);
 360
 361     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 362     OUT_CS(r300->vertex_info.vinfo.hwfmt[0]);
 363     OUT_CS(r300->vertex_info.vinfo.hwfmt[1]);
 364     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 365     OUT_CS(r300->vertex_info.vinfo.hwfmt[2]);
 366     OUT_CS(r300->vertex_info.vinfo.hwfmt[3]);
 367     /* for (i = 0; i < 4; i++) {
 368      *    debug_printf("hwfmt%d: 0x%08x\n", i,
 369      *            r300->vertex_info.vinfo.hwfmt[i]);
 370      * } */
 371
 372     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8);
 373     for (i = 0; i < 8; i++) {
 374         OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]);
 375         /* debug_printf("prog_stream_cntl%d: 0x%08x\n", i,
 376          *        r300->vertex_info.vap_prog_stream_cntl[i]); */
 377     }
 378     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8);
 379     for (i = 0; i < 8; i++) {
 380         OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]);
 381         /* debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i,
 382          *        r300->vertex_info.vap_prog_stream_cntl_ext[i]); */
 383     }
 384     END_CS;
 385 }
 386
 387 void r300_emit_vertex_shader(struct r300_context* r300,
 388                              struct r300_vertex_shader* vs)
 389 {
 390     int i;
 391     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 392     struct r300_constant_buffer* constants =
 393         &r300->shader_constants[PIPE_SHADER_VERTEX];
 394     CS_LOCALS(r300);
 395
 396     if (!r300screen->caps->has_tcl) {
 397         debug_printf("r300: Implementation error: emit_vertex_shader called,"
 398                 " but has_tcl is FALSE!\n");
 399         return;
 400     }
 401
 402     if (constants->count) {
 403         BEGIN_CS(14 + (vs->instruction_count * 4) + (constants->count * 4));
 404     } else {
 405         BEGIN_CS(11 + (vs->instruction_count * 4));
 406     }
 407
 408     /* R300_VAP_PVS_CODE_CNTL_0
 409      * R300_VAP_PVS_CONST_CNTL
 410      * R300_VAP_PVS_CODE_CNTL_1
 411      * See the r5xx docs for instructions on how to use these.
 412      * XXX these could be optimized to select better values... */
 413     OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
 414     OUT_CS(R300_PVS_FIRST_INST(0) |
 415             R300_PVS_XYZW_VALID_INST(vs->instruction_count - 1) |
 416             R300_PVS_LAST_INST(vs->instruction_count - 1));
 417     OUT_CS(R300_PVS_MAX_CONST_ADDR(constants->count - 1));
 418     OUT_CS(vs->instruction_count - 1);
 419
 420     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 421     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4);
 422     for (i = 0; i < vs->instruction_count; i++) {
 423         OUT_CS(vs->instructions[i].inst0);
 424         OUT_CS(vs->instructions[i].inst1);
 425         OUT_CS(vs->instructions[i].inst2);
 426         OUT_CS(vs->instructions[i].inst3);
 427     }
 428
 429     if (constants->count) {
 430         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 431                 (r300screen->caps->is_r500 ?
 432                  R500_PVS_CONST_START : R300_PVS_CONST_START));
 433         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, constants->count * 4);
 434         for (i = 0; i < constants->count; i++) {
 435             OUT_CS_32F(constants->constants[i][0]);
 436             OUT_CS_32F(constants->constants[i][1]);
 437             OUT_CS_32F(constants->constants[i][2]);
 438             OUT_CS_32F(constants->constants[i][3]);
 439         }
 440     }
 441
 442     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
 443             R300_PVS_NUM_CNTLRS(5) |
 444             R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) |
 445             R300_PVS_VF_MAX_VTX_NUM(12));
 446     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 447     END_CS;
 448 }
 449
 450 void r300_emit_viewport_state(struct r300_context* r300,
 451                               struct r300_viewport_state* viewport)
 452 {
 453     CS_LOCALS(r300);
 454
 455     BEGIN_CS(9);
 456     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
 457     OUT_CS_32F(viewport->xscale);
 458     OUT_CS_32F(viewport->xoffset);
 459     OUT_CS_32F(viewport->yscale);
 460     OUT_CS_32F(viewport->yoffset);
 461     OUT_CS_32F(viewport->zscale);
 462     OUT_CS_32F(viewport->zoffset);
 463
 464     if (r300->rs_state->enable_vte) {
 465         OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
 466     } else {
 467         OUT_CS_REG(R300_VAP_VTE_CNTL, 0);
 468     }
 469     END_CS;
 470 }
 471
 472 void r300_flush_textures(struct r300_context* r300)
 473 {
 474     CS_LOCALS(r300);
 475
 476     BEGIN_CS(4);
 477     OUT_CS_REG(R300_TX_INVALTAGS, 0);
 478     OUT_CS_REG(R300_TX_ENABLE, (1 << r300->texture_count) - 1);
 479     END_CS;
 480 }
 481
 482 /* Emit all dirty state. */
 483 void r300_emit_dirty_state(struct r300_context* r300)
 484 {
 485     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 486     struct r300_texture* tex;
 487     int i, dirty_tex = 0;
 488     boolean invalid = FALSE;
 489
 490     if (!(r300->dirty_state)) {
 491         return;
 492     }
 493
 494     r300_update_derived_state(r300);
 495
 496     /* XXX check size */
 497 validate:
 498     /* Color buffers... */
 499     for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) {
 500         tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]->texture;
 501         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 502         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 503                     0, RADEON_GEM_DOMAIN_VRAM)) {
 504             r300->context.flush(&r300->context, 0, NULL);
 505             goto validate;
 506         }
 507     }
 508     /* ...depth buffer... */
 509     if (r300->framebuffer_state.zsbuf) {
 510         tex = (struct r300_texture*)r300->framebuffer_state.zsbuf->texture;
 511         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
 512         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 513                     0, RADEON_GEM_DOMAIN_VRAM)) {
 514             r300->context.flush(&r300->context, 0, NULL);
 515             goto validate;
 516         }
 517     }
 518     /* ...textures... */
 519     for (i = 0; i < r300->texture_count; i++) {
 520         tex = r300->textures[i];
 521         assert(tex && tex->buffer && "texture is marked, but NULL!");
 522         if (!r300->winsys->add_buffer(r300->winsys, tex->buffer,
 523                     RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) {
 524             r300->context.flush(&r300->context, 0, NULL);
 525             goto validate;
 526         }
 527     }
 528     /* ...and vertex buffer. */
 529     if (r300->vbo) {
 530         if (!r300->winsys->add_buffer(r300->winsys, r300->vbo,
 531                     RADEON_GEM_DOMAIN_GTT, 0)) {
 532             r300->context.flush(&r300->context, 0, NULL);
 533             goto validate;
 534         }
 535     } else {
 536         debug_printf("No VBO while emitting dirty state!\n");
 537     }
 538     if (r300->winsys->validate(r300->winsys)) {
 539         r300->context.flush(&r300->context, 0, NULL);
 540         if (invalid) {
 541             /* Well, hell. */
 542             exit(1);
 543         }
 544         invalid = TRUE;
 545         goto validate;
 546     }
 547
 548     if (r300->dirty_state & R300_NEW_BLEND) {
 549         r300_emit_blend_state(r300, r300->blend_state);
 550         r300->dirty_state &= ~R300_NEW_BLEND;
 551     }
 552
 553     if (r300->dirty_state & R300_NEW_BLEND_COLOR) {
 554         r300_emit_blend_color_state(r300, r300->blend_color_state);
 555         r300->dirty_state &= ~R300_NEW_BLEND_COLOR;
 556     }
 557
 558     if (r300->dirty_state & R300_NEW_CLIP) {
 559         r300_emit_clip_state(r300, &r300->clip_state);
 560         r300->dirty_state &= ~R300_NEW_CLIP;
 561     }
 562
 563     if (r300->dirty_state & R300_NEW_DSA) {
 564         r300_emit_dsa_state(r300, r300->dsa_state);
 565         r300->dirty_state &= ~R300_NEW_DSA;
 566     }
 567
 568     if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) {
 569         if (r300screen->caps->is_r500) {
 570             r500_emit_fragment_shader(r300,
 571                 (struct r500_fragment_shader*)r300->fs);
 572         } else {
 573             r300_emit_fragment_shader(r300,
 574                 (struct r300_fragment_shader*)r300->fs);
 575         }
 576         r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER;
 577     }
 578
 579     if (r300->dirty_state & R300_NEW_FRAMEBUFFERS) {
 580         r300_emit_fb_state(r300, &r300->framebuffer_state);
 581         r300->dirty_state &= ~R300_NEW_FRAMEBUFFERS;
 582     }
 583
 584     if (r300->dirty_state & R300_NEW_RASTERIZER) {
 585         r300_emit_rs_state(r300, r300->rs_state);
 586         r300->dirty_state &= ~R300_NEW_RASTERIZER;
 587     }
 588
 589     if (r300->dirty_state & R300_NEW_RS_BLOCK) {
 590         r300_emit_rs_block_state(r300, r300->rs_block);
 591         r300->dirty_state &= ~R300_NEW_RS_BLOCK;
 592     }
 593
 594     if (r300->dirty_state & R300_ANY_NEW_SAMPLERS) {
 595         for (i = 0; i < r300->sampler_count; i++) {
 596             if (r300->dirty_state & (R300_NEW_SAMPLER << i)) {
 597                 r300_emit_sampler(r300, r300->sampler_states[i], i);
 598                 r300->dirty_state &= ~(R300_NEW_SAMPLER << i);
 599                 dirty_tex++;
 600             }
 601         }
 602     }
 603
 604     if (r300->dirty_state & R300_NEW_SCISSOR) {
 605         r300_emit_scissor_state(r300, r300->scissor_state);
 606         r300->dirty_state &= ~R300_NEW_SCISSOR;
 607     }
 608
 609     if (r300->dirty_state & R300_ANY_NEW_TEXTURES) {
 610         for (i = 0; i < r300->texture_count; i++) {
 611             if (r300->dirty_state & (R300_NEW_TEXTURE << i)) {
 612                 r300_emit_texture(r300, r300->textures[i], i);
 613                 r300->dirty_state &= ~(R300_NEW_TEXTURE << i);
 614                 dirty_tex++;
 615             }
 616         }
 617     }
 618
 619     if (r300->dirty_state & R300_NEW_VIEWPORT) {
 620         r300_emit_viewport_state(r300, r300->viewport_state);
 621         r300->dirty_state &= ~R300_NEW_VIEWPORT;
 622     }
 623
 624     if (dirty_tex) {
 625         r300_flush_textures(r300);
 626     }
 627
 628     if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) {
 629         r300_emit_vertex_format_state(r300);
 630         r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT;
 631     }
 632
 633     /* Finally, emit the VBO. */
 634     r300_emit_vertex_buffer(r300);
 635
 636     r300->dirty_hw++;
 637 }