src/gallium/drivers/r300/r300_hyperz.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_mm.h"
  26 #include "r300_context.h"
  27 #include "r300_hyperz.h"
  28 #include "r300_reg.h"
  29 #include "r300_fs.h"
  30
  31 /*
  32   HiZ rules - taken from various docs
  33    1. HiZ only works on depth values
  34    2. Cannot HiZ if stencil fail or zfail is !KEEP
  35    3. on R300/400, HiZ is disabled if depth test is EQUAL
  36    4. comparison changes without clears usually mean disabling HiZ
  37 */
  38 /*****************************************************************************/
  39 /* The HyperZ setup                                                          */
  40 /*****************************************************************************/
  41
  42 static bool r300_get_sc_hz_max(struct r300_context *r300)
  43 {
  44     struct r300_dsa_state *dsa_state = r300->dsa_state.state;
  45     int func = dsa_state->z_stencil_control & 0x7;
  46     int ret = R300_SC_HYPERZ_MIN;
  47
  48     if (func >= 4 && func <= 7)
  49        ret = R300_SC_HYPERZ_MAX;
  50     return ret;
  51 }
  52
  53 static bool r300_zfunc_same_direction(int func1, int func2)
  54 {
  55     /* func1 is less/lessthan */
  56     if (func1 == 1 || func1 == 2)
  57         if (func2 == 3 || func2 == 4 || func2 == 5)
  58             return FALSE;
  59
  60     if (func2 == 1 || func2 == 2)
  61         if (func1 == 4 || func1 == 5)
  62             return FALSE;
  63     return TRUE;
  64 }
  65
  66 static int r300_get_hiz_min(struct r300_context *r300)
  67 {
  68     struct r300_dsa_state *dsa_state = r300->dsa_state.state;
  69     int func = dsa_state->z_stencil_control & 0x7;
  70     int ret = R300_HIZ_MIN;
  71
  72     if (func == 1 || func == 2)
  73        ret = R300_HIZ_MAX;
  74     return ret;
  75 }
  76
  77 static boolean r300_dsa_stencil_op_not_keep(struct pipe_stencil_state *s)
  78 {
  79     if (s->enabled && (s->fail_op != PIPE_STENCIL_OP_KEEP ||
  80                        s->zfail_op != PIPE_STENCIL_OP_KEEP))
  81         return TRUE;
  82     return FALSE;
  83 }
  84
  85 static boolean r300_can_hiz(struct r300_context *r300)
  86 {
  87     struct r300_dsa_state *dsa_state = r300->dsa_state.state;
  88     struct pipe_depth_stencil_alpha_state *dsa = &dsa_state->dsa;
  89     struct r300_screen* r300screen = r300->screen;
  90     struct r300_hyperz_state *z = r300->hyperz_state.state;
  91
  92     /* shader writes depth - no HiZ */
  93     if (r300_fragment_shader_writes_depth(r300_fs(r300))) /* (5) */
  94         return FALSE;
  95
  96     if (r300->query_current)
  97         return FALSE;
  98     /* if stencil fail/zfail op is not KEEP */
  99     if (r300_dsa_stencil_op_not_keep(&dsa->stencil[0]) ||
 100         r300_dsa_stencil_op_not_keep(&dsa->stencil[1]))
 101         return FALSE;
 102
 103     if (dsa->depth.enabled) {
 104         /* if depth func is EQUAL pre-r500 */
 105         if (dsa->depth.func == PIPE_FUNC_EQUAL && !r300screen->caps.is_r500)
 106             return FALSE;
 107         /* if depth func is NOTEQUAL */
 108         if (dsa->depth.func == PIPE_FUNC_NOTEQUAL)
 109             return FALSE;
 110     }
 111     /* depth comparison function - if just cleared save and return okay */
 112     if (z->current_func == -1) {
 113         int func = dsa_state->z_stencil_control & 0x7;
 114         if (func != 0 && func != 7)
 115             z->current_func = dsa_state->z_stencil_control & 0x7;
 116     } else {
 117         /* simple don't change */
 118         if (!r300_zfunc_same_direction(z->current_func, (dsa_state->z_stencil_control & 0x7))) {
 119             DBG(r300, DBG_HYPERZ, "z func changed direction - disabling hyper-z %d -> %d\n", z->current_func, dsa_state->z_stencil_control);
 120             return FALSE;
 121         }
 122     }
 123     return TRUE;
 124 }
 125
 126 static void r300_update_hyperz(struct r300_context* r300)
 127 {
 128     struct r300_hyperz_state *z =
 129         (struct r300_hyperz_state*)r300->hyperz_state.state;
 130
 131     z->gb_z_peq_config = 0;
 132     z->zb_bw_cntl = 0;
 133     z->sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 134     z->flush = 0;
 135
 136     if (r300->cbzb_clear) {
 137         z->zb_bw_cntl |= R300_ZB_CB_CLEAR_CACHE_LINE_WRITE_ONLY;
 138         return;
 139     }
 140
 141     /* Zbuffer compression. */
 142     if (r300->z_compression) {
 143         z->zb_bw_cntl |= R300_RD_COMP_ENABLE;
 144         if (r300->z_decomp_rd == false)
 145             z->zb_bw_cntl |= R300_WR_COMP_ENABLE;
 146        /* RV350 and up optimizations. */
 147        if (r300->z_compression == RV350_Z_COMPRESS_88)
 148            z->gb_z_peq_config |= R300_GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_8_8;
 149     }
 150
 151     /* Z fastfill. */
 152     if (r300->z_fastfill) {
 153         z->zb_bw_cntl |= R300_FAST_FILL_ENABLE; /*  | R300_FORCE_COMPRESSED_STENCIL_VALUE_ENABLE;*/
 154     }
 155
 156     if (r300->hiz_enable) {
 157         bool can_hiz = r300_can_hiz(r300);
 158         if (can_hiz) {
 159             z->zb_bw_cntl |= R300_HIZ_ENABLE;
 160             z->sc_hyperz |= R300_SC_HYPERZ_ENABLE;
 161             z->sc_hyperz |= r300_get_sc_hz_max(r300);
 162             z->zb_bw_cntl |= r300_get_hiz_min(r300);
 163         }
 164     }
 165
 166     if (r300->screen->caps.is_r500) {
 167         /* XXX Are these bits really available on RV350? */
 168         z->zb_bw_cntl |= R500_HIZ_FP_EXP_BITS_3;
 169         z->zb_bw_cntl |=
 170                 R500_HIZ_EQUAL_REJECT_ENABLE |
 171                 R500_PEQ_PACKING_ENABLE |
 172                 R500_COVERED_PTR_MASKING_ENABLE;
 173     }
 174 }
 175
 176 /*****************************************************************************/
 177 /* The ZTOP state                                                            */
 178 /*****************************************************************************/
 179
 180 static boolean r300_dsa_writes_stencil(
 181         struct pipe_stencil_state *s)
 182 {
 183     return s->enabled && s->writemask &&
 184            (s->fail_op  != PIPE_STENCIL_OP_KEEP ||
 185             s->zfail_op != PIPE_STENCIL_OP_KEEP ||
 186             s->zpass_op != PIPE_STENCIL_OP_KEEP);
 187 }
 188
 189 static boolean r300_dsa_writes_depth_stencil(
 190         struct pipe_depth_stencil_alpha_state *dsa)
 191 {
 192     /* We are interested only in the cases when a depth or stencil value
 193      * can be changed. */
 194
 195     if (dsa->depth.enabled && dsa->depth.writemask &&
 196         dsa->depth.func != PIPE_FUNC_NEVER)
 197         return TRUE;
 198
 199     if (r300_dsa_writes_stencil(&dsa->stencil[0]) ||
 200         r300_dsa_writes_stencil(&dsa->stencil[1]))
 201         return TRUE;
 202
 203     return FALSE;
 204 }
 205
 206 static boolean r300_dsa_alpha_test_enabled(
 207         struct pipe_depth_stencil_alpha_state *dsa)
 208 {
 209     /* We are interested only in the cases when alpha testing can kill
 210      * a fragment. */
 211
 212     return dsa->alpha.enabled && dsa->alpha.func != PIPE_FUNC_ALWAYS;
 213 }
 214
 215 static void r300_update_ztop(struct r300_context* r300)
 216 {
 217     struct r300_ztop_state* ztop_state =
 218         (struct r300_ztop_state*)r300->ztop_state.state;
 219     uint32_t old_ztop = ztop_state->z_buffer_top;
 220
 221     /* This is important enough that I felt it warranted a comment.
 222      *
 223      * According to the docs, these are the conditions where ZTOP must be
 224      * disabled:
 225      * 1) Alpha testing enabled
 226      * 2) Texture kill instructions in fragment shader
 227      * 3) Chroma key culling enabled
 228      * 4) W-buffering enabled
 229      *
 230      * The docs claim that for the first three cases, if no ZS writes happen,
 231      * then ZTOP can be used.
 232      *
 233      * (3) will never apply since we do not support chroma-keyed operations.
 234      * (4) will need to be re-examined (and this comment updated) if/when
 235      * Hyper-Z becomes supported.
 236      *
 237      * Additionally, the following conditions require disabled ZTOP:
 238      * 5) Depth writes in fragment shader
 239      * 6) Outstanding occlusion queries
 240      *
 241      * This register causes stalls all the way from SC to CB when changed,
 242      * but it is buffered on-chip so it does not hurt to write it if it has
 243      * not changed.
 244      *
 245      * ~C.
 246      */
 247
 248     /* ZS writes */
 249     if (r300_dsa_writes_depth_stencil(r300->dsa_state.state) &&
 250            (r300_dsa_alpha_test_enabled(r300->dsa_state.state) ||  /* (1) */
 251             r300_fs(r300)->shader->info.uses_kill)) {              /* (2) */
 252         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 253     } else if (r300_fragment_shader_writes_depth(r300_fs(r300))) { /* (5) */
 254         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 255     } else if (r300->query_current) {                              /* (6) */
 256         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 257     } else {
 258         ztop_state->z_buffer_top = R300_ZTOP_ENABLE;
 259     }
 260     if (ztop_state->z_buffer_top != old_ztop)
 261         r300->ztop_state.dirty = TRUE;
 262 }
 263
 264 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 265
 266 static void r300_update_hiz_clear(struct r300_context *r300)
 267 {
 268     struct pipe_framebuffer_state *fb =
 269         (struct pipe_framebuffer_state*)r300->fb_state.state;
 270     uint32_t height;
 271
 272     height = ALIGN_DIVUP(fb->zsbuf->height, 4);
 273     r300->hiz_clear.size = height * 4;
 274 }
 275
 276 static void r300_update_zmask_clear(struct r300_context *r300)
 277 {
 278     struct pipe_framebuffer_state *fb =
 279         (struct pipe_framebuffer_state*)r300->fb_state.state;
 280     uint32_t height;
 281     int mult;
 282
 283     if (r300->z_compression == RV350_Z_COMPRESS_88)
 284         mult = 8;
 285     else
 286         mult = 4;
 287
 288     height = ALIGN_DIVUP(fb->zsbuf->height, mult);
 289
 290     r300->zmask_clear.size = height * 4;
 291 }
 292
 293 void r300_update_hyperz_state(struct r300_context* r300)
 294 {
 295     r300_update_ztop(r300);
 296     if (r300->hyperz_state.dirty) {
 297         r300_update_hyperz(r300);
 298     }
 299
 300     if (r300->hiz_clear.dirty) {
 301        r300_update_hiz_clear(r300);
 302     }
 303     if (r300->zmask_clear.dirty) {
 304        r300_update_zmask_clear(r300);
 305     }
 306 }
 307
 308 void r300_hiz_alloc_block(struct r300_context *r300, struct r300_surface *surf)
 309 {
 310     struct r300_texture *tex;
 311     uint32_t zsize, ndw;
 312     int level = surf->base.level;
 313
 314     tex = r300_texture(surf->base.texture);
 315
 316     if (tex->hiz_mem[level])
 317         return;
 318
 319     zsize = tex->desc.layer_size_in_bytes[level];
 320     zsize /= util_format_get_blocksize(tex->desc.b.b.format);
 321     ndw = ALIGN_DIVUP(zsize, 64);
 322
 323     tex->hiz_mem[level] = u_mmAllocMem(r300->hiz_mm, ndw, 0, 0);
 324     return;
 325 }
 326
 327 void r300_zmask_alloc_block(struct r300_context *r300, struct r300_surface *surf, int compress)
 328 {
 329     int bsize = 256;
 330     uint32_t zsize, ndw;
 331     int level = surf->base.level;
 332     struct r300_texture *tex;
 333
 334     tex = r300_texture(surf->base.texture);
 335
 336     if (tex->zmask_mem[level])
 337         return;
 338
 339     zsize = tex->desc.layer_size_in_bytes[level];
 340     zsize /= util_format_get_blocksize(tex->desc.b.b.format);
 341
 342     /* each zmask dword represents 16 4x4 blocks - which is 256 pixels
 343        or 16 8x8 depending on the gb peq flag = 1024 pixels */
 344     if (compress == RV350_Z_COMPRESS_88)
 345         bsize = 1024;
 346
 347     ndw = ALIGN_DIVUP(zsize, bsize);
 348     tex->zmask_mem[level] = u_mmAllocMem(r300->zmask_mm, ndw, 0, 0);
 349     return;
 350 }
 351
 352 void r300_hyperz_init_mm(struct r300_context *r300)
 353 {
 354     struct r300_screen* r300screen = r300->screen;
 355     int frag_pipes = r300screen->caps.num_frag_pipes;
 356
 357     if (r300screen->caps.hiz_ram)
 358       r300->hiz_mm = u_mmInit(0, r300screen->caps.hiz_ram * frag_pipes);
 359
 360     r300->zmask_mm = u_mmInit(0, r300screen->caps.zmask_ram * frag_pipes);
 361 }
 362
 363 void r300_hyperz_destroy_mm(struct r300_context *r300)
 364 {
 365     struct r300_screen* r300screen = r300->screen;
 366
 367     if (r300screen->caps.hiz_ram)
 368       u_mmDestroy(r300->hiz_mm);
 369
 370     u_mmDestroy(r300->zmask_mm);
 371 }