src/gallium/drivers/r300/r300_hyperz.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "r300_context.h"
  25 #include "r300_hyperz.h"
  26 #include "r300_reg.h"
  27 #include "r300_fs.h"
  28 #include "r300_winsys.h"
  29
  30 #include "util/u_format.h"
  31 #include "util/u_mm.h"
  32
  33 /*
  34   HiZ rules - taken from various docs
  35    1. HiZ only works on depth values
  36    2. Cannot HiZ if stencil fail or zfail is !KEEP
  37    3. on R300/400, HiZ is disabled if depth test is EQUAL
  38    4. comparison changes without clears usually mean disabling HiZ
  39 */
  40 /*****************************************************************************/
  41 /* The HyperZ setup                                                          */
  42 /*****************************************************************************/
  43
  44 static bool r300_get_sc_hz_max(struct r300_context *r300)
  45 {
  46     struct r300_dsa_state *dsa_state = r300->dsa_state.state;
  47     int func = dsa_state->z_stencil_control & 0x7;
  48     int ret = R300_SC_HYPERZ_MIN;
  49
  50     if (func >= 4 && func <= 7)
  51        ret = R300_SC_HYPERZ_MAX;
  52     return ret;
  53 }
  54
  55 static bool r300_zfunc_same_direction(int func1, int func2)
  56 {
  57     /* func1 is less/lessthan */
  58     if (func1 == 1 || func1 == 2)
  59         if (func2 == 3 || func2 == 4 || func2 == 5)
  60             return FALSE;
  61
  62     if (func2 == 1 || func2 == 2)
  63         if (func1 == 4 || func1 == 5)
  64             return FALSE;
  65     return TRUE;
  66 }
  67
  68 static int r300_get_hiz_min(struct r300_context *r300)
  69 {
  70     struct r300_dsa_state *dsa_state = r300->dsa_state.state;
  71     int func = dsa_state->z_stencil_control & 0x7;
  72     int ret = R300_HIZ_MIN;
  73
  74     if (func == 1 || func == 2)
  75        ret = R300_HIZ_MAX;
  76     return ret;
  77 }
  78
  79 static boolean r300_dsa_stencil_op_not_keep(struct pipe_stencil_state *s)
  80 {
  81     if (s->enabled && (s->fail_op != PIPE_STENCIL_OP_KEEP ||
  82                        s->zfail_op != PIPE_STENCIL_OP_KEEP))
  83         return TRUE;
  84     return FALSE;
  85 }
  86
  87 static boolean r300_can_hiz(struct r300_context *r300)
  88 {
  89     struct r300_dsa_state *dsa_state = r300->dsa_state.state;
  90     struct pipe_depth_stencil_alpha_state *dsa = &dsa_state->dsa;
  91     struct r300_screen* r300screen = r300->screen;
  92     struct r300_hyperz_state *z = r300->hyperz_state.state;
  93
  94     /* shader writes depth - no HiZ */
  95     if (r300_fragment_shader_writes_depth(r300_fs(r300))) /* (5) */
  96         return FALSE;
  97
  98     if (r300->query_current)
  99         return FALSE;
 100     /* if stencil fail/zfail op is not KEEP */
 101     if (r300_dsa_stencil_op_not_keep(&dsa->stencil[0]) ||
 102         r300_dsa_stencil_op_not_keep(&dsa->stencil[1]))
 103         return FALSE;
 104
 105     if (dsa->depth.enabled) {
 106         /* if depth func is EQUAL pre-r500 */
 107         if (dsa->depth.func == PIPE_FUNC_EQUAL && !r300screen->caps.is_r500)
 108             return FALSE;
 109         /* if depth func is NOTEQUAL */
 110         if (dsa->depth.func == PIPE_FUNC_NOTEQUAL)
 111             return FALSE;
 112     }
 113     /* depth comparison function - if just cleared save and return okay */
 114     if (z->current_func == -1) {
 115         int func = dsa_state->z_stencil_control & 0x7;
 116         if (func != 0 && func != 7)
 117             z->current_func = dsa_state->z_stencil_control & 0x7;
 118     } else {
 119         /* simple don't change */
 120         if (!r300_zfunc_same_direction(z->current_func, (dsa_state->z_stencil_control & 0x7))) {
 121             DBG(r300, DBG_HYPERZ, "z func changed direction - disabling hyper-z %d -> %d\n", z->current_func, dsa_state->z_stencil_control);
 122             return FALSE;
 123         }
 124     }
 125     return TRUE;
 126 }
 127
 128 static void r300_update_hyperz(struct r300_context* r300)
 129 {
 130     struct r300_hyperz_state *z =
 131         (struct r300_hyperz_state*)r300->hyperz_state.state;
 132
 133     z->gb_z_peq_config = 0;
 134     z->zb_bw_cntl = 0;
 135     z->sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 136     z->flush = 0;
 137
 138     if (r300->cbzb_clear) {
 139         z->zb_bw_cntl |= R300_ZB_CB_CLEAR_CACHE_LINE_WRITE_ONLY;
 140         return;
 141     }
 142
 143     if (!r300->rws->get_value(r300->rws, R300_CAN_HYPERZ))
 144         return;
 145
 146     /* Zbuffer compression. */
 147     if (r300->z_compression) {
 148         z->zb_bw_cntl |= R300_RD_COMP_ENABLE;
 149         if (r300->z_decomp_rd == false)
 150             z->zb_bw_cntl |= R300_WR_COMP_ENABLE;
 151        /* RV350 and up optimizations. */
 152        if (r300->z_compression == RV350_Z_COMPRESS_88)
 153            z->gb_z_peq_config |= R300_GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_8_8;
 154     }
 155
 156     /* Z fastfill. */
 157     if (r300->z_fastfill) {
 158         z->zb_bw_cntl |= R300_FAST_FILL_ENABLE; /*  | R300_FORCE_COMPRESSED_STENCIL_VALUE_ENABLE;*/
 159     }
 160
 161     if (r300->hiz_enable) {
 162         bool can_hiz = r300_can_hiz(r300);
 163         if (can_hiz) {
 164             z->zb_bw_cntl |= R300_HIZ_ENABLE;
 165             z->sc_hyperz |= R300_SC_HYPERZ_ENABLE;
 166             z->sc_hyperz |= r300_get_sc_hz_max(r300);
 167             z->zb_bw_cntl |= r300_get_hiz_min(r300);
 168         }
 169     }
 170
 171     if (r300->screen->caps.is_r500) {
 172         /* XXX Are these bits really available on RV350? */
 173         z->zb_bw_cntl |= R500_HIZ_FP_EXP_BITS_3;
 174         z->zb_bw_cntl |=
 175                 R500_HIZ_EQUAL_REJECT_ENABLE |
 176                 R500_PEQ_PACKING_ENABLE |
 177                 R500_COVERED_PTR_MASKING_ENABLE;
 178     }
 179 }
 180
 181 /*****************************************************************************/
 182 /* The ZTOP state                                                            */
 183 /*****************************************************************************/
 184
 185 static boolean r300_dsa_writes_stencil(
 186         struct pipe_stencil_state *s)
 187 {
 188     return s->enabled && s->writemask &&
 189            (s->fail_op  != PIPE_STENCIL_OP_KEEP ||
 190             s->zfail_op != PIPE_STENCIL_OP_KEEP ||
 191             s->zpass_op != PIPE_STENCIL_OP_KEEP);
 192 }
 193
 194 static boolean r300_dsa_writes_depth_stencil(
 195         struct pipe_depth_stencil_alpha_state *dsa)
 196 {
 197     /* We are interested only in the cases when a depth or stencil value
 198      * can be changed. */
 199
 200     if (dsa->depth.enabled && dsa->depth.writemask &&
 201         dsa->depth.func != PIPE_FUNC_NEVER)
 202         return TRUE;
 203
 204     if (r300_dsa_writes_stencil(&dsa->stencil[0]) ||
 205         r300_dsa_writes_stencil(&dsa->stencil[1]))
 206         return TRUE;
 207
 208     return FALSE;
 209 }
 210
 211 static boolean r300_dsa_alpha_test_enabled(
 212         struct pipe_depth_stencil_alpha_state *dsa)
 213 {
 214     /* We are interested only in the cases when alpha testing can kill
 215      * a fragment. */
 216
 217     return dsa->alpha.enabled && dsa->alpha.func != PIPE_FUNC_ALWAYS;
 218 }
 219
 220 static void r300_update_ztop(struct r300_context* r300)
 221 {
 222     struct r300_ztop_state* ztop_state =
 223         (struct r300_ztop_state*)r300->ztop_state.state;
 224     uint32_t old_ztop = ztop_state->z_buffer_top;
 225
 226     /* This is important enough that I felt it warranted a comment.
 227      *
 228      * According to the docs, these are the conditions where ZTOP must be
 229      * disabled:
 230      * 1) Alpha testing enabled
 231      * 2) Texture kill instructions in fragment shader
 232      * 3) Chroma key culling enabled
 233      * 4) W-buffering enabled
 234      *
 235      * The docs claim that for the first three cases, if no ZS writes happen,
 236      * then ZTOP can be used.
 237      *
 238      * (3) will never apply since we do not support chroma-keyed operations.
 239      * (4) will need to be re-examined (and this comment updated) if/when
 240      * Hyper-Z becomes supported.
 241      *
 242      * Additionally, the following conditions require disabled ZTOP:
 243      * 5) Depth writes in fragment shader
 244      * 6) Outstanding occlusion queries
 245      *
 246      * This register causes stalls all the way from SC to CB when changed,
 247      * but it is buffered on-chip so it does not hurt to write it if it has
 248      * not changed.
 249      *
 250      * ~C.
 251      */
 252
 253     /* ZS writes */
 254     if (r300_dsa_writes_depth_stencil(r300->dsa_state.state) &&
 255            (r300_dsa_alpha_test_enabled(r300->dsa_state.state) ||  /* (1) */
 256             r300_fs(r300)->shader->info.uses_kill)) {              /* (2) */
 257         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 258     } else if (r300_fragment_shader_writes_depth(r300_fs(r300))) { /* (5) */
 259         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 260     } else if (r300->query_current) {                              /* (6) */
 261         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 262     } else {
 263         ztop_state->z_buffer_top = R300_ZTOP_ENABLE;
 264     }
 265     if (ztop_state->z_buffer_top != old_ztop)
 266         r300->ztop_state.dirty = TRUE;
 267 }
 268
 269 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 270
 271 static void r300_update_hiz_clear(struct r300_context *r300)
 272 {
 273     struct pipe_framebuffer_state *fb =
 274         (struct pipe_framebuffer_state*)r300->fb_state.state;
 275     uint32_t height;
 276
 277     height = ALIGN_DIVUP(fb->zsbuf->height, 4);
 278     r300->hiz_clear.size = height * 4;
 279 }
 280
 281 static void r300_update_zmask_clear(struct r300_context *r300)
 282 {
 283     struct pipe_framebuffer_state *fb =
 284         (struct pipe_framebuffer_state*)r300->fb_state.state;
 285     uint32_t height;
 286     int mult;
 287
 288     if (r300->z_compression == RV350_Z_COMPRESS_88)
 289         mult = 8;
 290     else
 291         mult = 4;
 292
 293     height = ALIGN_DIVUP(fb->zsbuf->height, mult);
 294
 295     r300->zmask_clear.size = height * 4;
 296 }
 297
 298 void r300_update_hyperz_state(struct r300_context* r300)
 299 {
 300     r300_update_ztop(r300);
 301     if (r300->hyperz_state.dirty) {
 302         r300_update_hyperz(r300);
 303     }
 304
 305     if (r300->hiz_clear.dirty) {
 306        r300_update_hiz_clear(r300);
 307     }
 308     if (r300->zmask_clear.dirty) {
 309        r300_update_zmask_clear(r300);
 310     }
 311 }
 312
 313 void r300_hiz_alloc_block(struct r300_context *r300, struct r300_surface *surf)
 314 {
 315     struct r300_texture *tex;
 316     uint32_t zsize, ndw;
 317     int level = surf->base.level;
 318
 319     tex = r300_texture(surf->base.texture);
 320
 321     if (tex->hiz_mem[level])
 322         return;
 323
 324     zsize = tex->desc.layer_size_in_bytes[level];
 325     zsize /= util_format_get_blocksize(tex->desc.b.b.format);
 326     ndw = ALIGN_DIVUP(zsize, 64);
 327
 328     tex->hiz_mem[level] = u_mmAllocMem(r300->hiz_mm, ndw, 0, 0);
 329     return;
 330 }
 331
 332 void r300_zmask_alloc_block(struct r300_context *r300, struct r300_surface *surf, int compress)
 333 {
 334     int bsize = 256;
 335     uint32_t zsize, ndw;
 336     int level = surf->base.level;
 337     struct r300_texture *tex;
 338
 339     tex = r300_texture(surf->base.texture);
 340
 341     if (tex->zmask_mem[level])
 342         return;
 343
 344     zsize = tex->desc.layer_size_in_bytes[level];
 345     zsize /= util_format_get_blocksize(tex->desc.b.b.format);
 346
 347     /* each zmask dword represents 16 4x4 blocks - which is 256 pixels
 348        or 16 8x8 depending on the gb peq flag = 1024 pixels */
 349     if (compress == RV350_Z_COMPRESS_88)
 350         bsize = 1024;
 351
 352     ndw = ALIGN_DIVUP(zsize, bsize);
 353     tex->zmask_mem[level] = u_mmAllocMem(r300->zmask_mm, ndw, 0, 0);
 354     return;
 355 }
 356
 357 void r300_hyperz_init_mm(struct r300_context *r300)
 358 {
 359     struct r300_screen* r300screen = r300->screen;
 360     int frag_pipes = r300screen->caps.num_frag_pipes;
 361
 362     if (r300screen->caps.hiz_ram)
 363       r300->hiz_mm = u_mmInit(0, r300screen->caps.hiz_ram * frag_pipes);
 364
 365     r300->zmask_mm = u_mmInit(0, r300screen->caps.zmask_ram * frag_pipes);
 366 }
 367
 368 void r300_hyperz_destroy_mm(struct r300_context *r300)
 369 {
 370     struct r300_screen* r300screen = r300->screen;
 371
 372     if (r300screen->caps.hiz_ram)
 373       u_mmDestroy(r300->hiz_mm);
 374
 375     u_mmDestroy(r300->zmask_mm);
 376 }