src/gallium/drivers/r300/r300_hyperz.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_mm.h"
  26 #include "r300_context.h"
  27 #include "r300_hyperz.h"
  28 #include "r300_reg.h"
  29 #include "r300_fs.h"
  30 #include "r300_emit.h"
  31 #include "r300_texture.h"
  32
  33 /*
  34   HiZ rules - taken from various docs
  35    1. HiZ only works on depth values
  36    2. Cannot HiZ if stencil fail or zfail is !KEEP
  37    3. on R300/400, HiZ is disabled if depth test is EQUAL
  38    4. comparison changes without clears usually mean disabling HiZ
  39 */
  40 /*****************************************************************************/
  41 /* The HyperZ setup                                                          */
  42 /*****************************************************************************/
  43
  44 static bool r300_get_sc_hz_max(struct r300_context *r300)
  45 {
  46     struct r300_dsa_state *dsa_state = r300->dsa_state.state;
  47     int func = dsa_state->z_stencil_control & 0x7;
  48     int ret = R300_SC_HYPERZ_MIN;
  49
  50     if (func >= 4 && func <= 7)
  51        ret = R300_SC_HYPERZ_MAX;
  52     return ret;
  53 }
  54
  55 static bool r300_zfunc_same_direction(int func1, int func2)
  56 {
  57     /* func1 is less/lessthan */
  58     if (func1 == 1 || func1 == 2)
  59         if (func2 == 3 || func2 == 4 || func2 == 5)
  60             return FALSE;
  61
  62     if (func2 == 1 || func2 == 2)
  63         if (func1 == 4 || func1 == 5)
  64             return FALSE;
  65     return TRUE;
  66 }
  67
  68 static int r300_get_hiz_min(struct r300_context *r300)
  69 {
  70     struct r300_dsa_state *dsa_state = r300->dsa_state.state;
  71     int func = dsa_state->z_stencil_control & 0x7;
  72     int ret = R300_HIZ_MIN;
  73
  74     if (func == 1 || func == 2)
  75        ret = R300_HIZ_MAX;
  76     return ret;
  77 }
  78
  79 static boolean r300_dsa_stencil_op_not_keep(struct pipe_stencil_state *s)
  80 {
  81     if (s->enabled && (s->fail_op != PIPE_STENCIL_OP_KEEP ||
  82                        s->zfail_op != PIPE_STENCIL_OP_KEEP))
  83         return TRUE;
  84     return FALSE;
  85 }
  86
  87 static boolean r300_can_hiz(struct r300_context *r300)
  88 {
  89     struct r300_dsa_state *dsa_state = r300->dsa_state.state;
  90     struct pipe_depth_stencil_alpha_state *dsa = &dsa_state->dsa;
  91     struct r300_screen* r300screen = r300->screen;
  92     struct r300_hyperz_state *z = r300->hyperz_state.state;
  93
  94     /* shader writes depth - no HiZ */
  95     if (r300_fragment_shader_writes_depth(r300_fs(r300))) /* (5) */
  96         return FALSE;
  97
  98     if (r300->query_current)
  99         return FALSE;
 100     /* if stencil fail/zfail op is not KEEP */
 101     if (r300_dsa_stencil_op_not_keep(&dsa->stencil[0]) ||
 102         r300_dsa_stencil_op_not_keep(&dsa->stencil[1]))
 103         return FALSE;
 104
 105     if (dsa->depth.enabled) {
 106         /* if depth func is EQUAL pre-r500 */
 107         if (dsa->depth.func == PIPE_FUNC_EQUAL && !r300screen->caps.is_r500)
 108             return FALSE;
 109         /* if depth func is NOTEQUAL */
 110         if (dsa->depth.func == PIPE_FUNC_NOTEQUAL)
 111             return FALSE;
 112     }
 113     /* depth comparison function - if just cleared save and return okay */
 114     if (z->current_func == -1) {
 115         int func = dsa_state->z_stencil_control & 0x7;
 116         if (func != 0 && func != 7)
 117             z->current_func = dsa_state->z_stencil_control & 0x7;
 118     } else {
 119         /* simple don't change */
 120         if (!r300_zfunc_same_direction(z->current_func, (dsa_state->z_stencil_control & 0x7))) {
 121             DBG(r300, DBG_HYPERZ, "z func changed direction - disabling hyper-z %d -> %d\n", z->current_func, dsa_state->z_stencil_control);
 122             return FALSE;
 123         }
 124     }
 125     return TRUE;
 126 }
 127
 128 static void r300_update_hyperz(struct r300_context* r300)
 129 {
 130     struct r300_hyperz_state *z =
 131         (struct r300_hyperz_state*)r300->hyperz_state.state;
 132
 133     z->gb_z_peq_config = 0;
 134     z->zb_bw_cntl = 0;
 135     z->sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 136     z->flush = 0;
 137
 138     if (r300->cbzb_clear) {
 139         z->zb_bw_cntl |= R300_ZB_CB_CLEAR_CACHE_LINE_WRITE_ONLY;
 140         return;
 141     }
 142
 143     /* Zbuffer compression. */
 144     if (r300->z_compression) {
 145         z->zb_bw_cntl |= R300_RD_COMP_ENABLE;
 146         if (r300->z_decomp_rd == false)
 147             z->zb_bw_cntl |= R300_WR_COMP_ENABLE;
 148        /* RV350 and up optimizations. */
 149        if (r300->z_compression == RV350_Z_COMPRESS_88)
 150            z->gb_z_peq_config |= R300_GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_8_8;
 151     }
 152
 153     /* Z fastfill. */
 154     if (r300->z_fastfill) {
 155         z->zb_bw_cntl |= R300_FAST_FILL_ENABLE; /*  | R300_FORCE_COMPRESSED_STENCIL_VALUE_ENABLE;*/
 156     }
 157
 158     if (r300->hiz_enable) {
 159         bool can_hiz = r300_can_hiz(r300);
 160         if (can_hiz) {
 161             z->zb_bw_cntl |= R300_HIZ_ENABLE;
 162             z->sc_hyperz |= R300_SC_HYPERZ_ENABLE;
 163             z->sc_hyperz |= r300_get_sc_hz_max(r300);
 164             z->zb_bw_cntl |= r300_get_hiz_min(r300);
 165         }
 166     }
 167
 168     if (r300->screen->caps.is_r500) {
 169         /* XXX Are these bits really available on RV350? */
 170         z->zb_bw_cntl |= R500_HIZ_FP_EXP_BITS_3;
 171         z->zb_bw_cntl |=
 172                 R500_HIZ_EQUAL_REJECT_ENABLE |
 173                 R500_PEQ_PACKING_ENABLE |
 174                 R500_COVERED_PTR_MASKING_ENABLE;
 175     }
 176 }
 177
 178 /*****************************************************************************/
 179 /* The ZTOP state                                                            */
 180 /*****************************************************************************/
 181
 182 static boolean r300_dsa_writes_stencil(
 183         struct pipe_stencil_state *s)
 184 {
 185     return s->enabled && s->writemask &&
 186            (s->fail_op  != PIPE_STENCIL_OP_KEEP ||
 187             s->zfail_op != PIPE_STENCIL_OP_KEEP ||
 188             s->zpass_op != PIPE_STENCIL_OP_KEEP);
 189 }
 190
 191 static boolean r300_dsa_writes_depth_stencil(
 192         struct pipe_depth_stencil_alpha_state *dsa)
 193 {
 194     /* We are interested only in the cases when a depth or stencil value
 195      * can be changed. */
 196
 197     if (dsa->depth.enabled && dsa->depth.writemask &&
 198         dsa->depth.func != PIPE_FUNC_NEVER)
 199         return TRUE;
 200
 201     if (r300_dsa_writes_stencil(&dsa->stencil[0]) ||
 202         r300_dsa_writes_stencil(&dsa->stencil[1]))
 203         return TRUE;
 204
 205     return FALSE;
 206 }
 207
 208 static boolean r300_dsa_alpha_test_enabled(
 209         struct pipe_depth_stencil_alpha_state *dsa)
 210 {
 211     /* We are interested only in the cases when alpha testing can kill
 212      * a fragment. */
 213
 214     return dsa->alpha.enabled && dsa->alpha.func != PIPE_FUNC_ALWAYS;
 215 }
 216
 217 static void r300_update_ztop(struct r300_context* r300)
 218 {
 219     struct r300_ztop_state* ztop_state =
 220         (struct r300_ztop_state*)r300->ztop_state.state;
 221     uint32_t old_ztop = ztop_state->z_buffer_top;
 222
 223     /* This is important enough that I felt it warranted a comment.
 224      *
 225      * According to the docs, these are the conditions where ZTOP must be
 226      * disabled:
 227      * 1) Alpha testing enabled
 228      * 2) Texture kill instructions in fragment shader
 229      * 3) Chroma key culling enabled
 230      * 4) W-buffering enabled
 231      *
 232      * The docs claim that for the first three cases, if no ZS writes happen,
 233      * then ZTOP can be used.
 234      *
 235      * (3) will never apply since we do not support chroma-keyed operations.
 236      * (4) will need to be re-examined (and this comment updated) if/when
 237      * Hyper-Z becomes supported.
 238      *
 239      * Additionally, the following conditions require disabled ZTOP:
 240      * 5) Depth writes in fragment shader
 241      * 6) Outstanding occlusion queries
 242      *
 243      * This register causes stalls all the way from SC to CB when changed,
 244      * but it is buffered on-chip so it does not hurt to write it if it has
 245      * not changed.
 246      *
 247      * ~C.
 248      */
 249
 250     /* ZS writes */
 251     if (r300_dsa_writes_depth_stencil(r300->dsa_state.state) &&
 252            (r300_dsa_alpha_test_enabled(r300->dsa_state.state) ||  /* (1) */
 253             r300_fs(r300)->shader->info.uses_kill)) {              /* (2) */
 254         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 255     } else if (r300_fragment_shader_writes_depth(r300_fs(r300))) { /* (5) */
 256         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 257     } else if (r300->query_current) {                              /* (6) */
 258         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 259     } else {
 260         ztop_state->z_buffer_top = R300_ZTOP_ENABLE;
 261     }
 262     if (ztop_state->z_buffer_top != old_ztop)
 263         r300->ztop_state.dirty = TRUE;
 264 }
 265
 266 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 267
 268 static void r300_update_hiz_clear(struct r300_context *r300)
 269 {
 270     struct pipe_framebuffer_state *fb =
 271         (struct pipe_framebuffer_state*)r300->fb_state.state;
 272     uint32_t height;
 273
 274     height = ALIGN_DIVUP(fb->zsbuf->height, 4);
 275     r300->hiz_clear.size = height * 4;
 276 }
 277
 278 static void r300_update_zmask_clear(struct r300_context *r300)
 279 {
 280     struct pipe_framebuffer_state *fb =
 281         (struct pipe_framebuffer_state*)r300->fb_state.state;
 282     uint32_t height;
 283     int mult;
 284
 285     if (r300->z_compression == RV350_Z_COMPRESS_88)
 286         mult = 8;
 287     else
 288         mult = 4;
 289
 290     height = ALIGN_DIVUP(fb->zsbuf->height, mult);
 291
 292     r300->zmask_clear.size = height * 4;
 293 }
 294
 295 void r300_update_hyperz_state(struct r300_context* r300)
 296 {
 297     r300_update_ztop(r300);
 298     if (r300->hyperz_state.dirty) {
 299         r300_update_hyperz(r300);
 300     }
 301
 302     if (r300->hiz_clear.dirty) {
 303        r300_update_hiz_clear(r300);
 304     }
 305     if (r300->zmask_clear.dirty) {
 306        r300_update_zmask_clear(r300);
 307     }
 308 }
 309
 310 void r300_hiz_alloc_block(struct r300_context *r300, struct r300_surface *surf)
 311 {
 312     struct r300_texture *tex;
 313     uint32_t zsize, ndw;
 314     int level = surf->base.level;
 315
 316     tex = r300_texture(surf->base.texture);
 317
 318     if (tex->hiz_mem[level])
 319         return;
 320
 321     zsize = tex->desc.layer_size_in_bytes[level];
 322     zsize /= util_format_get_blocksize(tex->desc.b.b.format);
 323     ndw = ALIGN_DIVUP(zsize, 64);
 324
 325     tex->hiz_mem[level] = u_mmAllocMem(r300->hiz_mm, ndw, 0, 0);
 326     return;
 327 }
 328
 329 void r300_zmask_alloc_block(struct r300_context *r300, struct r300_surface *surf, int compress)
 330 {
 331     int bsize = 256;
 332     uint32_t zsize, ndw;
 333     int level = surf->base.level;
 334     struct r300_texture *tex;
 335
 336     tex = r300_texture(surf->base.texture);
 337
 338     if (tex->zmask_mem[level])
 339         return;
 340
 341     zsize = tex->desc.layer_size_in_bytes[level];
 342     zsize /= util_format_get_blocksize(tex->desc.b.b.format);
 343
 344     /* each zmask dword represents 16 4x4 blocks - which is 256 pixels
 345        or 16 8x8 depending on the gb peq flag = 1024 pixels */
 346     if (compress == RV350_Z_COMPRESS_88)
 347         bsize = 1024;
 348
 349     ndw = ALIGN_DIVUP(zsize, bsize);
 350     tex->zmask_mem[level] = u_mmAllocMem(r300->zmask_mm, ndw, 0, 0);
 351     return;
 352 }
 353
 354 void r300_hyperz_init_mm(struct r300_context *r300)
 355 {
 356     struct r300_screen* r300screen = r300->screen;
 357     int frag_pipes = r300screen->caps.num_frag_pipes;
 358
 359     if (r300screen->caps.hiz_ram)
 360       r300->hiz_mm = u_mmInit(0, r300screen->caps.hiz_ram * frag_pipes);
 361
 362     r300->zmask_mm = u_mmInit(0, r300screen->caps.zmask_ram * frag_pipes);
 363 }
 364
 365 void r300_hyperz_destroy_mm(struct r300_context *r300)
 366 {
 367     struct r300_screen* r300screen = r300->screen;
 368
 369     if (r300screen->caps.hiz_ram)
 370       u_mmDestroy(r300->hiz_mm);
 371
 372     u_mmDestroy(r300->zmask_mm);
 373 }