projects / mesa.git / blob
? search:


44da7aa3777abac65ffaa7f438ae5f475a70bf85
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "util/u_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_upload_mgr.h"
34 #include "util/u_prim.h"
35
36 #include "r300_cs.h"
37 #include "r300_context.h"
38 #include "r300_screen_buffer.h"
39 #include "r300_emit.h"
40 #include "r300_reg.h"
41 #include "r300_render.h"
42 #include "r300_state_derived.h"
43
44 /* XXX The DRM rejects VAP_ALT_NUM_VERTICES.. */
45 //#define ENABLE_ALT_NUM_VERTS
46
47 uint32_t r300_translate_primitive(unsigned prim)
48 {
49 switch (prim) {
50 case PIPE_PRIM_POINTS:
51 return R300_VAP_VF_CNTL__PRIM_POINTS;
52 case PIPE_PRIM_LINES:
53 return R300_VAP_VF_CNTL__PRIM_LINES;
54 case PIPE_PRIM_LINE_LOOP:
55 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
56 case PIPE_PRIM_LINE_STRIP:
57 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
58 case PIPE_PRIM_TRIANGLES:
59 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
60 case PIPE_PRIM_TRIANGLE_STRIP:
61 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
62 case PIPE_PRIM_TRIANGLE_FAN:
63 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
64 case PIPE_PRIM_QUADS:
65 return R300_VAP_VF_CNTL__PRIM_QUADS;
66 case PIPE_PRIM_QUAD_STRIP:
67 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
68 case PIPE_PRIM_POLYGON:
69 return R300_VAP_VF_CNTL__PRIM_POLYGON;
70 default:
71 return 0;
72 }
73 }
74
75 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
76 unsigned mode)
77 {
78 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
79 uint32_t color_control = rs->color_control;
80
81 /* By default (see r300_state.c:r300_create_rs_state) color_control is
82 * initialized to provoking the first vertex.
83 *
84 * Triangle fans must be reduced to the second vertex, not the first, in
85 * Gallium flatshade-first mode, as per the GL spec.
86 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
87 *
88 * Quads never provoke correctly in flatshade-first mode. The first
89 * vertex is never considered as provoking, so only the second, third,
90 * and fourth vertices can be selected, and both "third" and "last" modes
91 * select the fourth vertex. This is probably due to D3D lacking quads.
92 *
93 * Similarly, polygons reduce to the first, not the last, vertex, when in
94 * "last" mode, and all other modes start from the second vertex.
95 *
96 * ~ C.
97 */
98
99 if (rs->rs.flatshade_first) {
100 switch (mode) {
101 case PIPE_PRIM_TRIANGLE_FAN:
102 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
103 break;
104 case PIPE_PRIM_QUADS:
105 case PIPE_PRIM_QUAD_STRIP:
106 case PIPE_PRIM_POLYGON:
107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
108 break;
109 default:
110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
111 break;
112 }
113 } else {
114 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
115 }
116
117 return color_control;
118 }
119
120 /* Check if the requested number of dwords is available in the CS and
121 * if not, flush. Return TRUE if the flush occured. */
122 static boolean r300_reserve_cs_space(struct r300_context *r300,
123 unsigned dwords)
124 {
125 if (!r300->rws->check_cs(r300->rws, dwords)) {
126 r300->context.flush(&r300->context, 0, NULL);
127 return TRUE;
128 }
129 return FALSE;
130 }
131
132 static boolean immd_is_good_idea(struct r300_context *r300,
133 unsigned count)
134 {
135 struct pipe_vertex_element* velem;
136 struct pipe_vertex_buffer* vbuf;
137 boolean checked[PIPE_MAX_ATTRIBS] = {0};
138 unsigned vertex_element_count = r300->velems->count;
139 unsigned i, vbi;
140
141 if (count > 10) {
142 return FALSE;
143 }
144
145 /* We shouldn't map buffers referenced by CS, busy buffers,
146 * and ones placed in VRAM. */
147 /* XXX Check for VRAM buffers. */
148 for (i = 0; i < vertex_element_count; i++) {
149 velem = &r300->velems->velem[i];
150 vbi = velem->vertex_buffer_index;
151
152 if (!checked[vbi]) {
153 vbuf = &r300->vertex_buffer[vbi];
154
155 if (r300->context.is_resource_referenced(&r300->context,
156 vbuf->buffer,
157 0, 0)) {
158 /* It's a very bad idea to map it... */
159 return FALSE;
160 }
161 checked[vbi] = TRUE;
162 }
163 }
164 return TRUE;
165 }
166
167 /*****************************************************************************
168 * The emission of draw packets for r500. Older GPUs may use these functions *
169 * after resolving fallback issues (e.g. stencil ref two-sided). *
170 ****************************************************************************/
171
172 void r500_emit_draw_arrays_immediate(struct r300_context *r300,
173 unsigned mode,
174 unsigned start,
175 unsigned count)
176 {
177 struct pipe_vertex_element* velem;
178 struct pipe_vertex_buffer* vbuf;
179 unsigned vertex_element_count = r300->velems->count;
180 unsigned i, v, vbi, dw, elem_offset, dwords;
181
182 /* Size of the vertex, in dwords. */
183 unsigned vertex_size = 0;
184
185 /* Offsets of the attribute, in dwords, from the start of the vertex. */
186 unsigned offset[PIPE_MAX_ATTRIBS];
187
188 /* Size of the vertex element, in dwords. */
189 unsigned size[PIPE_MAX_ATTRIBS];
190
191 /* Stride to the same attrib in the next vertex in the vertex buffer,
192 * in dwords. */
193 unsigned stride[PIPE_MAX_ATTRIBS] = {0};
194
195 /* Mapped vertex buffers. */
196 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
197 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {NULL};
198
199 CS_LOCALS(r300);
200
201 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
202 for (i = 0; i < vertex_element_count; i++) {
203 velem = &r300->velems->velem[i];
204 offset[i] = velem->src_offset / 4;
205 size[i] = util_format_get_blocksize(velem->src_format) / 4;
206 vertex_size += size[i];
207 vbi = velem->vertex_buffer_index;
208
209 /* Map the buffer. */
210 if (!map[vbi]) {
211 vbuf = &r300->vertex_buffer[vbi];
212 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context,
213 vbuf->buffer,
214 PIPE_TRANSFER_READ,
215 &transfer[vbi]);
216 map[vbi] += vbuf->buffer_offset / 4;
217 stride[vbi] = vbuf->stride / 4;
218 }
219 }
220
221 dwords = 9 + count * vertex_size;
222
223 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
224 r300_emit_buffer_validate(r300, FALSE, NULL);
225 r300_emit_dirty_state(r300);
226
227 BEGIN_CS(dwords);
228 OUT_CS_REG(R300_GA_COLOR_CONTROL,
229 r300_provoking_vertex_fixes(r300, mode));
230 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
231 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
232 OUT_CS(count - 1);
233 OUT_CS(0);
234 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
235 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
236 r300_translate_primitive(mode));
237
238 /* Emit vertices. */
239 for (v = 0; v < count; v++) {
240 for (i = 0; i < vertex_element_count; i++) {
241 velem = &r300->velems->velem[i];
242 vbi = velem->vertex_buffer_index;
243 elem_offset = offset[i] + stride[vbi] * (v + start);
244
245 for (dw = 0; dw < size[i]; dw++) {
246 OUT_CS(map[vbi][elem_offset + dw]);
247 }
248 }
249 }
250 END_CS;
251
252 /* Unmap buffers. */
253 for (i = 0; i < vertex_element_count; i++) {
254 vbi = r300->velems->velem[i].vertex_buffer_index;
255
256 if (map[vbi]) {
257 vbuf = &r300->vertex_buffer[vbi];
258 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]);
259 map[vbi] = NULL;
260 }
261 }
262 }
263
264 void r500_emit_draw_arrays(struct r300_context *r300,
265 unsigned mode,
266 unsigned count)
267 {
268 #if defined(ENABLE_ALT_NUM_VERTS)
269 boolean alt_num_verts = count > 65535;
270 #else
271 boolean alt_num_verts = FALSE;
272 #endif
273 CS_LOCALS(r300);
274
275 if (alt_num_verts) {
276 assert(count < (1 << 24));
277 BEGIN_CS(9);
278 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
279 } else {
280 BEGIN_CS(7);
281 }
282 OUT_CS_REG(R300_GA_COLOR_CONTROL,
283 r300_provoking_vertex_fixes(r300, mode));
284 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
285 OUT_CS(count - 1);
286 OUT_CS(0);
287 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
288 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
289 r300_translate_primitive(mode) |
290 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
291 END_CS;
292 }
293
294 void r500_emit_draw_elements(struct r300_context *r300,
295 struct pipe_resource* indexBuffer,
296 unsigned indexSize,
297 unsigned minIndex,
298 unsigned maxIndex,
299 unsigned mode,
300 unsigned start,
301 unsigned count)
302 {
303 uint32_t count_dwords;
304 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
305 #if defined(ENABLE_ALT_NUM_VERTS)
306 boolean alt_num_verts = count > 65535;
307 #else
308 boolean alt_num_verts = FALSE;
309 #endif
310 CS_LOCALS(r300);
311
312 assert(count < (1 << 24));
313
314 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
315
316 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
317 count, minIndex, maxIndex);
318
319 if (alt_num_verts) {
320 BEGIN_CS(15);
321 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
322 } else {
323 BEGIN_CS(13);
324 }
325 OUT_CS_REG(R300_GA_COLOR_CONTROL,
326 r300_provoking_vertex_fixes(r300, mode));
327 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
328 OUT_CS(maxIndex);
329 OUT_CS(minIndex);
330 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
331 if (indexSize == 4) {
332 count_dwords = count;
333 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
334 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
335 r300_translate_primitive(mode) |
336 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
337 } else {
338 count_dwords = (count + 1) / 2;
339 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
340 r300_translate_primitive(mode) |
341 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
342 }
343
344 /* INDX_BUFFER is a truly special packet3.
345 * Unlike most other packet3, where the offset is after the count,
346 * the order is reversed, so the relocation ends up carrying the
347 * size of the indexbuf instead of the offset.
348 */
349 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
350 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
351 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
352 OUT_CS(offset_dwords << 2);
353 OUT_CS_BUF_RELOC(indexBuffer, count_dwords,
354 RADEON_GEM_DOMAIN_GTT, 0, 0);
355
356 END_CS;
357 }
358
359 /*****************************************************************************
360 * The emission of draw packets for r300 which take care of the two-sided *
361 * stencil ref fallback and call r500's functions. *
362 ****************************************************************************/
363
364 /* Set drawing for front faces. */
365 static void r300_begin_stencil_ref_fallback(struct r300_context *r300)
366 {
367 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
368 CS_LOCALS(r300);
369
370 BEGIN_CS(2);
371 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK);
372 END_CS;
373 }
374
375 /* Set drawing for back faces. */
376 static void r300_switch_stencil_ref_side(struct r300_context *r300)
377 {
378 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
379 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
380 CS_LOCALS(r300);
381
382 BEGIN_CS(4);
383 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT);
384 OUT_CS_REG(R300_ZB_STENCILREFMASK,
385 dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]);
386 END_CS;
387 }
388
389 /* Restore the original state. */
390 static void r300_end_stencil_ref_fallback(struct r300_context *r300)
391 {
392 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
393 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
394 CS_LOCALS(r300);
395
396 BEGIN_CS(4);
397 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode);
398 OUT_CS_REG(R300_ZB_STENCILREFMASK,
399 dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]);
400 END_CS;
401 }
402
403 void r300_emit_draw_arrays_immediate(struct r300_context *r300,
404 unsigned mode,
405 unsigned start,
406 unsigned count)
407 {
408 if (!r300->stencil_ref_bf_fallback) {
409 r500_emit_draw_arrays_immediate(r300, mode, start, count);
410 } else {
411 r300_begin_stencil_ref_fallback(r300);
412 r500_emit_draw_arrays_immediate(r300, mode, start, count);
413 r300_switch_stencil_ref_side(r300);
414 r500_emit_draw_arrays_immediate(r300, mode, start, count);
415 r300_end_stencil_ref_fallback(r300);
416 }
417 }
418
419 void r300_emit_draw_arrays(struct r300_context *r300,
420 unsigned mode,
421 unsigned count)
422 {
423 if (!r300->stencil_ref_bf_fallback) {
424 r500_emit_draw_arrays(r300, mode, count);
425 } else {
426 r300_begin_stencil_ref_fallback(r300);
427 r500_emit_draw_arrays(r300, mode, count);
428 r300_switch_stencil_ref_side(r300);
429 r500_emit_draw_arrays(r300, mode, count);
430 r300_end_stencil_ref_fallback(r300);
431 }
432 }
433
434 void r300_emit_draw_elements(struct r300_context *r300,
435 struct pipe_resource* indexBuffer,
436 unsigned indexSize,
437 unsigned minIndex,
438 unsigned maxIndex,
439 unsigned mode,
440 unsigned start,
441 unsigned count)
442 {
443 if (!r300->stencil_ref_bf_fallback) {
444 r500_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
445 maxIndex, mode, start, count);
446 } else {
447 r300_begin_stencil_ref_fallback(r300);
448 r500_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
449 maxIndex, mode, start, count);
450 r300_switch_stencil_ref_side(r300);
451 r500_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
452 maxIndex, mode, start, count);
453 r300_end_stencil_ref_fallback(r300);
454 }
455 }
456
457 static void r300_shorten_ubyte_elts(struct r300_context* r300,
458 struct pipe_resource** elts,
459 unsigned start,
460 unsigned count)
461 {
462 struct pipe_context* context = &r300->context;
463 struct pipe_screen* screen = r300->context.screen;
464 struct pipe_resource* new_elts;
465 unsigned char *in_map;
466 unsigned short *out_map;
467 struct pipe_transfer *src_transfer, *dst_transfer;
468 unsigned i;
469
470 new_elts = pipe_buffer_create(screen,
471 PIPE_BIND_INDEX_BUFFER,
472 2 * count);
473
474 in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer);
475 out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer);
476
477 in_map += start;
478
479 for (i = 0; i < count; i++) {
480 *out_map = (unsigned short)*in_map;
481 in_map++;
482 out_map++;
483 }
484
485 pipe_buffer_unmap(context, *elts, src_transfer);
486 pipe_buffer_unmap(context, new_elts, dst_transfer);
487
488 *elts = new_elts;
489 }
490
491 static void r300_align_ushort_elts(struct r300_context *r300,
492 struct pipe_resource **elts,
493 unsigned start, unsigned count)
494 {
495 struct pipe_context* context = &r300->context;
496 struct pipe_transfer *in_transfer = NULL;
497 struct pipe_transfer *out_transfer = NULL;
498 struct pipe_resource* new_elts;
499 unsigned short *in_map;
500 unsigned short *out_map;
501
502 new_elts = pipe_buffer_create(context->screen,
503 PIPE_BIND_INDEX_BUFFER,
504 2 * count);
505
506 in_map = pipe_buffer_map(context, *elts,
507 PIPE_TRANSFER_READ, &in_transfer);
508 out_map = pipe_buffer_map(context, new_elts,
509 PIPE_TRANSFER_WRITE, &out_transfer);
510
511 memcpy(out_map, in_map+start, 2 * count);
512
513 pipe_buffer_unmap(context, *elts, in_transfer);
514 pipe_buffer_unmap(context, new_elts, out_transfer);
515
516 *elts = new_elts;
517 }
518
519 /* This is the fast-path drawing & emission for HW TCL. */
520 void r300_draw_range_elements(struct pipe_context* pipe,
521 struct pipe_resource* indexBuffer,
522 unsigned indexSize,
523 unsigned minIndex,
524 unsigned maxIndex,
525 unsigned mode,
526 unsigned start,
527 unsigned count)
528 {
529 struct r300_context* r300 = r300_context(pipe);
530 struct pipe_resource* orgIndexBuffer = indexBuffer;
531 #if defined(ENABLE_ALT_NUM_VERTS)
532 boolean alt_num_verts = r300->screen->caps.is_r500 &&
533 count > 65536;
534 #else
535 boolean alt_num_verts = FALSE;
536 #endif
537 unsigned short_count;
538
539 if (r300->skip_rendering) {
540 return;
541 }
542
543 if (!u_trim_pipe_prim(mode, &count)) {
544 return;
545 }
546
547 if (indexSize == 1) {
548 r300_shorten_ubyte_elts(r300, &indexBuffer, start, count);
549 indexSize = 2;
550 start = 0;
551 } else if (indexSize == 2 && start % 2 != 0) {
552 r300_align_ushort_elts(r300, &indexBuffer, start, count);
553 start = 0;
554 }
555
556 r300_update_derived_state(r300);
557
558 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count);
559
560 /* 128 dwords for emit_aos and emit_draw_elements */
561 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
562 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
563 r300_emit_dirty_state(r300);
564 r300_emit_aos(r300, 0);
565
566 u_upload_flush(r300->upload_vb);
567 u_upload_flush(r300->upload_ib);
568 if (alt_num_verts || count <= 65535) {
569 r300->emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
570 maxIndex, mode, start, count);
571 } else {
572 do {
573 short_count = MIN2(count, 65534);
574 r300->emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
575 maxIndex, mode, start, short_count);
576
577 start += short_count;
578 count -= short_count;
579
580 /* 16 spare dwords are enough for emit_draw_elements. */
581 if (count && r300_reserve_cs_space(r300, 16)) {
582 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
583 r300_emit_dirty_state(r300);
584 r300_emit_aos(r300, 0);
585 }
586 } while (count);
587 }
588
589 if (indexBuffer != orgIndexBuffer) {
590 pipe_resource_reference( &indexBuffer, NULL );
591 }
592 }
593
594 /* Simple helpers for context setup. Should probably be moved to util. */
595 void r300_draw_elements(struct pipe_context* pipe,
596 struct pipe_resource* indexBuffer,
597 unsigned indexSize, unsigned mode,
598 unsigned start, unsigned count)
599 {
600 struct r300_context *r300 = r300_context(pipe);
601
602 pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0,
603 r300->vertex_buffer_max_index,
604 mode, start, count);
605 }
606
607 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
608 unsigned start, unsigned count)
609 {
610 struct r300_context* r300 = r300_context(pipe);
611 #if defined(ENABLE_ALT_NUM_VERTS)
612 boolean alt_num_verts = r300->screen->caps.is_r500 &&
613 count > 65536;
614 #else
615 boolean alt_num_verts = FALSE;
616 #endif
617 unsigned short_count;
618
619 if (r300->skip_rendering) {
620 return;
621 }
622
623 if (!u_trim_pipe_prim(mode, &count)) {
624 return;
625 }
626
627 r300_update_derived_state(r300);
628
629 if (immd_is_good_idea(r300, count)) {
630 r300->emit_draw_arrays_immediate(r300, mode, start, count);
631 } else {
632 /* Make sure there are at least 128 spare dwords in the command buffer.
633 * (most of it being consumed by emit_aos) */
634 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
635 r300_emit_buffer_validate(r300, TRUE, NULL);
636 r300_emit_dirty_state(r300);
637
638 if (alt_num_verts || count <= 65535) {
639 r300_emit_aos(r300, start);
640 r300->emit_draw_arrays(r300, mode, count);
641 } else {
642 do {
643 short_count = MIN2(count, 65535);
644 r300_emit_aos(r300, start);
645 r300->emit_draw_arrays(r300, mode, short_count);
646
647 start += short_count;
648 count -= short_count;
649
650 /* Again, we emit both AOS and draw_arrays so there should be
651 * at least 128 spare dwords. */
652 if (count && r300_reserve_cs_space(r300, 128)) {
653 r300_emit_buffer_validate(r300, TRUE, NULL);
654 r300_emit_dirty_state(r300);
655 }
656 } while (count);
657 }
658 u_upload_flush(r300->upload_vb);
659 }
660 }
661
662 /****************************************************************************
663 * The rest of this file is for SW TCL rendering only. Please be polite and *
664 * keep these functions separated so that they are easier to locate. ~C. *
665 ***************************************************************************/
666
667 /* SW TCL arrays, using Draw. */
668 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
669 unsigned mode,
670 unsigned start,
671 unsigned count)
672 {
673 struct r300_context* r300 = r300_context(pipe);
674 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
675 int i;
676
677 if (r300->skip_rendering) {
678 return;
679 }
680
681 if (!u_trim_pipe_prim(mode, &count)) {
682 return;
683 }
684
685 for (i = 0; i < r300->vertex_buffer_count; i++) {
686 void* buf = pipe_buffer_map(pipe,
687 r300->vertex_buffer[i].buffer,
688 PIPE_TRANSFER_READ,
689 &vb_transfer[i]);
690 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
691 }
692
693 draw_set_mapped_element_buffer(r300->draw, 0, NULL);
694
695 draw_arrays(r300->draw, mode, start, count);
696
697 for (i = 0; i < r300->vertex_buffer_count; i++) {
698 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
699 vb_transfer[i]);
700 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
701 }
702 }
703
704 /* SW TCL elements, using Draw. */
705 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
706 struct pipe_resource* indexBuffer,
707 unsigned indexSize,
708 unsigned minIndex,
709 unsigned maxIndex,
710 unsigned mode,
711 unsigned start,
712 unsigned count)
713 {
714 struct r300_context* r300 = r300_context(pipe);
715 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
716 struct pipe_transfer *ib_transfer;
717 int i;
718 void* indices;
719
720 if (r300->skip_rendering) {
721 return;
722 }
723
724 if (!u_trim_pipe_prim(mode, &count)) {
725 return;
726 }
727
728 for (i = 0; i < r300->vertex_buffer_count; i++) {
729 void* buf = pipe_buffer_map(pipe,
730 r300->vertex_buffer[i].buffer,
731 PIPE_TRANSFER_READ,
732 &vb_transfer[i]);
733 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
734 }
735
736 indices = pipe_buffer_map(pipe, indexBuffer,
737 PIPE_TRANSFER_READ, &ib_transfer);
738 draw_set_mapped_element_buffer_range(r300->draw, indexSize,
739 minIndex, maxIndex, indices);
740
741 draw_arrays(r300->draw, mode, start, count);
742
743 for (i = 0; i < r300->vertex_buffer_count; i++) {
744 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
745 vb_transfer[i]);
746 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
747 }
748
749 pipe_buffer_unmap(pipe, indexBuffer,
750 ib_transfer);
751 draw_set_mapped_element_buffer_range(r300->draw, 0, start,
752 start + count - 1, NULL);
753 }
754
755 /* Object for rendering using Draw. */
756 struct r300_render {
757 /* Parent class */
758 struct vbuf_render base;
759
760 /* Pipe context */
761 struct r300_context* r300;
762
763 /* Vertex information */
764 size_t vertex_size;
765 unsigned prim;
766 unsigned hwprim;
767
768 /* VBO */
769 struct pipe_resource* vbo;
770 size_t vbo_size;
771 size_t vbo_offset;
772 size_t vbo_max_used;
773 void * vbo_ptr;
774
775 struct pipe_transfer *vbo_transfer;
776 };
777
778 static INLINE struct r300_render*
779 r300_render(struct vbuf_render* render)
780 {
781 return (struct r300_render*)render;
782 }
783
784 static const struct vertex_info*
785 r300_render_get_vertex_info(struct vbuf_render* render)
786 {
787 struct r300_render* r300render = r300_render(render);
788 struct r300_context* r300 = r300render->r300;
789
790 r300_update_derived_state(r300);
791
792 return &r300->vertex_info;
793 }
794
795 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
796 ushort vertex_size,
797 ushort count)
798 {
799 struct r300_render* r300render = r300_render(render);
800 struct r300_context* r300 = r300render->r300;
801 struct pipe_screen* screen = r300->context.screen;
802 size_t size = (size_t)vertex_size * (size_t)count;
803
804 if (size + r300render->vbo_offset > r300render->vbo_size)
805 {
806 pipe_resource_reference(&r300->vbo, NULL);
807 r300render->vbo = pipe_buffer_create(screen,
808 PIPE_BIND_VERTEX_BUFFER,
809 R300_MAX_DRAW_VBO_SIZE);
810 r300render->vbo_offset = 0;
811 r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE;
812 }
813
814 r300render->vertex_size = vertex_size;
815 r300->vbo = r300render->vbo;
816 r300->vbo_offset = r300render->vbo_offset;
817
818 return (r300render->vbo) ? TRUE : FALSE;
819 }
820
821 static void* r300_render_map_vertices(struct vbuf_render* render)
822 {
823 struct r300_render* r300render = r300_render(render);
824
825 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
826 r300render->vbo,
827 PIPE_TRANSFER_WRITE,
828 &r300render->vbo_transfer);
829
830 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
831 }
832
833 static void r300_render_unmap_vertices(struct vbuf_render* render,
834 ushort min,
835 ushort max)
836 {
837 struct r300_render* r300render = r300_render(render);
838 struct pipe_context* context = &r300render->r300->context;
839 CS_LOCALS(r300render->r300);
840 BEGIN_CS(2);
841 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
842 END_CS;
843
844 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
845 r300render->vertex_size * (max + 1));
846 pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer);
847 }
848
849 static void r300_render_release_vertices(struct vbuf_render* render)
850 {
851 struct r300_render* r300render = r300_render(render);
852
853 r300render->vbo_offset += r300render->vbo_max_used;
854 r300render->vbo_max_used = 0;
855 }
856
857 static boolean r300_render_set_primitive(struct vbuf_render* render,
858 unsigned prim)
859 {
860 struct r300_render* r300render = r300_render(render);
861
862 r300render->prim = prim;
863 r300render->hwprim = r300_translate_primitive(prim);
864
865 return TRUE;
866 }
867
868 static void r500_render_draw_arrays(struct vbuf_render* render,
869 unsigned start,
870 unsigned count)
871 {
872 struct r300_render* r300render = r300_render(render);
873 struct r300_context* r300 = r300render->r300;
874
875 CS_LOCALS(r300);
876
877 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2);
878 r300_emit_buffer_validate(r300, FALSE, NULL);
879 r300_emit_dirty_state(r300);
880
881 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
882
883 BEGIN_CS(2);
884 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
885 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
886 r300render->hwprim);
887 END_CS;
888 }
889
890 static void r500_render_draw(struct vbuf_render* render,
891 const ushort* indices,
892 uint count)
893 {
894 struct r300_render* r300render = r300_render(render);
895 struct r300_context* r300 = r300render->r300;
896 int i;
897 unsigned dwords = 2 + (count+1)/2;
898
899 CS_LOCALS(r300);
900
901 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
902 r300_emit_buffer_validate(r300, FALSE, NULL);
903 r300_emit_dirty_state(r300);
904
905 BEGIN_CS(dwords);
906 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
907 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
908 r300render->hwprim);
909 for (i = 0; i < count-1; i += 2) {
910 OUT_CS(indices[i+1] << 16 | indices[i]);
911 }
912 if (count % 2) {
913 OUT_CS(indices[count-1]);
914 }
915 END_CS;
916 }
917
918 static void r300_render_draw_arrays(struct vbuf_render* render,
919 unsigned start,
920 unsigned count)
921 {
922 struct r300_context* r300 = r300_render(render)->r300;
923
924 if (!r300->stencil_ref_bf_fallback) {
925 r500_render_draw_arrays(render, start, count);
926 } else {
927 r300_begin_stencil_ref_fallback(r300);
928 r500_render_draw_arrays(render, start, count);
929 r300_switch_stencil_ref_side(r300);
930 r500_render_draw_arrays(render, start, count);
931 r300_end_stencil_ref_fallback(r300);
932 }
933 }
934
935 static void r300_render_draw(struct vbuf_render* render,
936 const ushort* indices,
937 uint count)
938 {
939 struct r300_context* r300 = r300_render(render)->r300;
940
941 if (!r300->stencil_ref_bf_fallback) {
942 r500_render_draw(render, indices, count);
943 } else {
944 r300_begin_stencil_ref_fallback(r300);
945 r500_render_draw(render, indices, count);
946 r300_switch_stencil_ref_side(r300);
947 r500_render_draw(render, indices, count);
948 r300_end_stencil_ref_fallback(r300);
949 }
950 }
951
952 static void r300_render_destroy(struct vbuf_render* render)
953 {
954 FREE(render);
955 }
956
957 static struct vbuf_render* r300_render_create(struct r300_context* r300)
958 {
959 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
960
961 r300render->r300 = r300;
962
963 /* XXX find real numbers plz */
964 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
965 r300render->base.max_indices = 16 * 1024;
966
967 r300render->base.get_vertex_info = r300_render_get_vertex_info;
968 r300render->base.allocate_vertices = r300_render_allocate_vertices;
969 r300render->base.map_vertices = r300_render_map_vertices;
970 r300render->base.unmap_vertices = r300_render_unmap_vertices;
971 r300render->base.set_primitive = r300_render_set_primitive;
972 if (r300->screen->caps.is_r500) {
973 r300render->base.draw = r500_render_draw;
974 r300render->base.draw_arrays = r500_render_draw_arrays;
975 } else {
976 r300render->base.draw = r300_render_draw;
977 r300render->base.draw_arrays = r300_render_draw_arrays;
978 }
979 r300render->base.release_vertices = r300_render_release_vertices;
980 r300render->base.destroy = r300_render_destroy;
981
982 r300render->vbo = NULL;
983 r300render->vbo_size = 0;
984 r300render->vbo_offset = 0;
985
986 return &r300render->base;
987 }
988
989 struct draw_stage* r300_draw_stage(struct r300_context* r300)
990 {
991 struct vbuf_render* render;
992 struct draw_stage* stage;
993
994 render = r300_render_create(r300);
995
996 if (!render) {
997 return NULL;
998 }
999
1000 stage = draw_vbuf_stage(r300->draw, render);
1001
1002 if (!stage) {
1003 render->destroy(render);
1004 return NULL;
1005 }
1006
1007 draw_set_render(r300->draw, render);
1008
1009 return stage;
1010 }