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[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_render: Vertex and index buffer primitive emission. Contains both
25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
26
27 #include "draw/draw_context.h"
28 #include "draw/draw_vbuf.h"
29
30 #include "util/u_inlines.h"
31
32 #include "util/u_format.h"
33 #include "util/u_memory.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36
37 #include "r300_cs.h"
38 #include "r300_context.h"
39 #include "r300_screen_buffer.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42
43 #include <limits.h>
44
45 #define IMMD_DWORDS 32
46
47 static uint32_t r300_translate_primitive(unsigned prim)
48 {
49 static const int prim_conv[] = {
50 R300_VAP_VF_CNTL__PRIM_POINTS,
51 R300_VAP_VF_CNTL__PRIM_LINES,
52 R300_VAP_VF_CNTL__PRIM_LINE_LOOP,
53 R300_VAP_VF_CNTL__PRIM_LINE_STRIP,
54 R300_VAP_VF_CNTL__PRIM_TRIANGLES,
55 R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP,
56 R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN,
57 R300_VAP_VF_CNTL__PRIM_QUADS,
58 R300_VAP_VF_CNTL__PRIM_QUAD_STRIP,
59 R300_VAP_VF_CNTL__PRIM_POLYGON,
60 -1,
61 -1,
62 -1,
63 -1
64 };
65 unsigned hwprim = prim_conv[prim];
66
67 assert(hwprim != -1);
68 return hwprim;
69 }
70
71 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
72 unsigned mode)
73 {
74 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
75 uint32_t color_control = rs->color_control;
76
77 /* By default (see r300_state.c:r300_create_rs_state) color_control is
78 * initialized to provoking the first vertex.
79 *
80 * Triangle fans must be reduced to the second vertex, not the first, in
81 * Gallium flatshade-first mode, as per the GL spec.
82 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
83 *
84 * Quads never provoke correctly in flatshade-first mode. The first
85 * vertex is never considered as provoking, so only the second, third,
86 * and fourth vertices can be selected, and both "third" and "last" modes
87 * select the fourth vertex. This is probably due to D3D lacking quads.
88 *
89 * Similarly, polygons reduce to the first, not the last, vertex, when in
90 * "last" mode, and all other modes start from the second vertex.
91 *
92 * ~ C.
93 */
94
95 if (rs->rs.flatshade_first) {
96 switch (mode) {
97 case PIPE_PRIM_TRIANGLE_FAN:
98 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
99 break;
100 case PIPE_PRIM_QUADS:
101 case PIPE_PRIM_QUAD_STRIP:
102 case PIPE_PRIM_POLYGON:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
104 break;
105 default:
106 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
107 break;
108 }
109 } else {
110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
111 }
112
113 return color_control;
114 }
115
116 void r500_emit_index_bias(struct r300_context *r300, int index_bias)
117 {
118 CS_LOCALS(r300);
119
120 BEGIN_CS(2);
121 OUT_CS_REG(R500_VAP_INDEX_OFFSET,
122 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));
123 END_CS;
124 }
125
126 static void r300_emit_draw_init(struct r300_context *r300, unsigned mode,
127 unsigned min_index, unsigned max_index)
128 {
129 CS_LOCALS(r300);
130
131 BEGIN_CS(5);
132 OUT_CS_REG(R300_GA_COLOR_CONTROL,
133 r300_provoking_vertex_fixes(r300, mode));
134 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
135 OUT_CS(max_index);
136 OUT_CS(min_index);
137 END_CS;
138 }
139
140 /* This function splits the index bias value into two parts:
141 * - buffer_offset: the value that can be safely added to buffer offsets
142 * in r300_emit_vertex_arrays (it must yield a positive offset when added to
143 * a vertex buffer offset)
144 * - index_offset: the value that must be manually subtracted from indices
145 * in an index buffer to achieve negative offsets. */
146 static void r300_split_index_bias(struct r300_context *r300, int index_bias,
147 int *buffer_offset, int *index_offset)
148 {
149 struct pipe_vertex_buffer *vb, *vbufs = r300->vbuf_mgr->vertex_buffer;
150 struct pipe_vertex_element *velem = r300->velems->velem;
151 unsigned i, size;
152 int max_neg_bias;
153
154 if (index_bias < 0) {
155 /* See how large index bias we may subtract. We must be careful
156 * here because negative buffer offsets are not allowed
157 * by the DRM API. */
158 max_neg_bias = INT_MAX;
159 for (i = 0; i < r300->velems->count; i++) {
160 vb = &vbufs[velem[i].vertex_buffer_index];
161 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride;
162 max_neg_bias = MIN2(max_neg_bias, size);
163 }
164
165 /* Now set the minimum allowed value. */
166 *buffer_offset = MAX2(-max_neg_bias, index_bias);
167 } else {
168 /* A positive index bias is OK. */
169 *buffer_offset = index_bias;
170 }
171
172 *index_offset = index_bias - *buffer_offset;
173 }
174
175 enum r300_prepare_flags {
176 PREP_EMIT_STATES = (1 << 0), /* call emit_dirty_state and friends? */
177 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */
178 PREP_EMIT_AOS = (1 << 2), /* call emit_vertex_arrays? */
179 PREP_EMIT_AOS_SWTCL = (1 << 3), /* call emit_vertex_arrays_swtcl? */
180 PREP_INDEXED = (1 << 4) /* is this draw_elements? */
181 };
182
183 /**
184 * Check if the requested number of dwords is available in the CS and
185 * if not, flush.
186 * \param r300 The context.
187 * \param flags See r300_prepare_flags.
188 * \param cs_dwords The number of dwords to reserve in CS.
189 * \return TRUE if the CS was flushed
190 */
191 static boolean r300_reserve_cs_dwords(struct r300_context *r300,
192 enum r300_prepare_flags flags,
193 unsigned cs_dwords)
194 {
195 boolean flushed = FALSE;
196 boolean first_draw = flags & PREP_EMIT_STATES;
197 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS;
198 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL;
199
200 /* Add dirty state, index offset, and AOS. */
201 if (first_draw) {
202 cs_dwords += r300_get_num_dirty_dwords(r300);
203
204 if (r300->screen->caps.is_r500)
205 cs_dwords += 2; /* emit_index_offset */
206
207 if (emit_vertex_arrays)
208 cs_dwords += 55; /* emit_vertex_arrays */
209
210 if (emit_vertex_arrays_swtcl)
211 cs_dwords += 7; /* emit_vertex_arrays_swtcl */
212 }
213
214 cs_dwords += r300_get_num_cs_end_dwords(r300);
215
216 /* Reserve requested CS space. */
217 if (cs_dwords > (RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw)) {
218 r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL);
219 flushed = TRUE;
220 }
221
222 return flushed;
223 }
224
225 /**
226 * Validate buffers and emit dirty state.
227 * \param r300 The context.
228 * \param flags See r300_prepare_flags.
229 * \param index_buffer The index buffer to validate. The parameter may be NULL.
230 * \param buffer_offset The offset passed to emit_vertex_arrays.
231 * \param index_bias The index bias to emit.
232 * \param instance_id Index of instance to render
233 * \return TRUE if rendering should be skipped
234 */
235 static boolean r300_emit_states(struct r300_context *r300,
236 enum r300_prepare_flags flags,
237 struct pipe_resource *index_buffer,
238 int buffer_offset,
239 int index_bias, int instance_id)
240 {
241 boolean first_draw = flags & PREP_EMIT_STATES;
242 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS;
243 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL;
244 boolean indexed = flags & PREP_INDEXED;
245 boolean validate_vbos = flags & PREP_VALIDATE_VBOS;
246
247 /* Validate buffers and emit dirty state if needed. */
248 if (first_draw) {
249 if (!r300_emit_buffer_validate(r300, validate_vbos,
250 index_buffer)) {
251 fprintf(stderr, "r300: CS space validation failed. "
252 "(not enough memory?) Skipping rendering.\n");
253 return FALSE;
254 }
255
256 r300_emit_dirty_state(r300);
257 if (r300->screen->caps.is_r500) {
258 if (r300->screen->caps.has_tcl)
259 r500_emit_index_bias(r300, index_bias);
260 else
261 r500_emit_index_bias(r300, 0);
262 }
263
264 if (emit_vertex_arrays &&
265 (r300->vertex_arrays_dirty ||
266 r300->vertex_arrays_indexed != indexed ||
267 r300->vertex_arrays_offset != buffer_offset ||
268 r300->vertex_arrays_instance_id != instance_id)) {
269 r300_emit_vertex_arrays(r300, buffer_offset, indexed, instance_id);
270
271 r300->vertex_arrays_dirty = FALSE;
272 r300->vertex_arrays_indexed = indexed;
273 r300->vertex_arrays_offset = buffer_offset;
274 r300->vertex_arrays_instance_id = instance_id;
275 }
276
277 if (emit_vertex_arrays_swtcl)
278 r300_emit_vertex_arrays_swtcl(r300, indexed);
279 }
280
281 return TRUE;
282 }
283
284 /**
285 * Check if the requested number of dwords is available in the CS and
286 * if not, flush. Then validate buffers and emit dirty state.
287 * \param r300 The context.
288 * \param flags See r300_prepare_flags.
289 * \param index_buffer The index buffer to validate. The parameter may be NULL.
290 * \param cs_dwords The number of dwords to reserve in CS.
291 * \param buffer_offset The offset passed to emit_vertex_arrays.
292 * \param index_bias The index bias to emit.
293 * \param instance_id The instance to render.
294 * \return TRUE if rendering should be skipped
295 */
296 static boolean r300_prepare_for_rendering(struct r300_context *r300,
297 enum r300_prepare_flags flags,
298 struct pipe_resource *index_buffer,
299 unsigned cs_dwords,
300 int buffer_offset,
301 int index_bias,
302 int instance_id)
303 {
304 /* Make sure there is enough space in the command stream and emit states. */
305 if (r300_reserve_cs_dwords(r300, flags, cs_dwords))
306 flags |= PREP_EMIT_STATES;
307
308 return r300_emit_states(r300, flags, index_buffer, buffer_offset,
309 index_bias, instance_id);
310 }
311
312 static boolean immd_is_good_idea(struct r300_context *r300,
313 unsigned count)
314 {
315 struct pipe_vertex_element* velem;
316 struct pipe_resource *buf;
317 boolean checked[PIPE_MAX_ATTRIBS] = {0};
318 unsigned vertex_element_count = r300->velems->count;
319 unsigned i, vbi;
320
321 if (DBG_ON(r300, DBG_NO_IMMD)) {
322 return FALSE;
323 }
324
325 if (r300->draw) {
326 return FALSE;
327 }
328
329 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) {
330 return FALSE;
331 }
332
333 /* We shouldn't map buffers referenced by CS, busy buffers,
334 * and ones placed in VRAM. */
335 for (i = 0; i < vertex_element_count; i++) {
336 velem = &r300->velems->velem[i];
337 vbi = velem->vertex_buffer_index;
338
339 if (!checked[vbi]) {
340 buf = r300->vbuf_mgr->real_vertex_buffer[vbi];
341
342 if ((r300_resource(buf)->domain != RADEON_DOMAIN_GTT)) {
343 return FALSE;
344 }
345
346 checked[vbi] = TRUE;
347 }
348 }
349 return TRUE;
350 }
351
352 /*****************************************************************************
353 * The HWTCL draw functions. *
354 ****************************************************************************/
355
356 static void r300_draw_arrays_immediate(struct r300_context *r300,
357 const struct pipe_draw_info *info)
358 {
359 struct pipe_vertex_element* velem;
360 struct pipe_vertex_buffer* vbuf;
361 unsigned vertex_element_count = r300->velems->count;
362 unsigned i, v, vbi;
363
364 /* Size of the vertex, in dwords. */
365 unsigned vertex_size = r300->velems->vertex_size_dwords;
366
367 /* The number of dwords for this draw operation. */
368 unsigned dwords = 4 + info->count * vertex_size;
369
370 /* Size of the vertex element, in dwords. */
371 unsigned size[PIPE_MAX_ATTRIBS];
372
373 /* Stride to the same attrib in the next vertex in the vertex buffer,
374 * in dwords. */
375 unsigned stride[PIPE_MAX_ATTRIBS];
376
377 /* Mapped vertex buffers. */
378 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
379 uint32_t* mapelem[PIPE_MAX_ATTRIBS];
380
381 CS_LOCALS(r300);
382
383 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1))
384 return;
385
386 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
387 for (i = 0; i < vertex_element_count; i++) {
388 velem = &r300->velems->velem[i];
389 size[i] = r300->velems->format_size[i] / 4;
390 vbi = velem->vertex_buffer_index;
391 vbuf = &r300->vbuf_mgr->vertex_buffer[vbi];
392 stride[i] = vbuf->stride / 4;
393
394 /* Map the buffer. */
395 if (!map[vbi]) {
396 map[vbi] = (uint32_t*)r300->rws->buffer_map(
397 r300_resource(r300->vbuf_mgr->real_vertex_buffer[vbi])->buf,
398 r300->cs, PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED);
399 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * info->start;
400 }
401 mapelem[i] = map[vbi] + (velem->src_offset / 4);
402 }
403
404 r300_emit_draw_init(r300, info->mode, 0, info->count-1);
405
406 BEGIN_CS(dwords);
407 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
408 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, info->count * vertex_size);
409 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (info->count << 16) |
410 r300_translate_primitive(info->mode));
411
412 /* Emit vertices. */
413 for (v = 0; v < info->count; v++) {
414 for (i = 0; i < vertex_element_count; i++) {
415 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]);
416 }
417 }
418 END_CS;
419
420 /* Unmap buffers. */
421 for (i = 0; i < vertex_element_count; i++) {
422 vbi = r300->velems->velem[i].vertex_buffer_index;
423
424 if (map[vbi]) {
425 r300->rws->buffer_unmap(r300_resource(r300->vbuf_mgr->real_vertex_buffer[vbi])->buf);
426 map[vbi] = NULL;
427 }
428 }
429 }
430
431 static void r300_emit_draw_arrays(struct r300_context *r300,
432 unsigned mode,
433 unsigned count)
434 {
435 boolean alt_num_verts = count > 65535;
436 CS_LOCALS(r300);
437
438 if (count >= (1 << 24)) {
439 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
440 "refusing to render.\n", count);
441 return;
442 }
443
444 r300_emit_draw_init(r300, mode, 0, count-1);
445
446 BEGIN_CS(2 + (alt_num_verts ? 2 : 0));
447 if (alt_num_verts) {
448 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
449 }
450 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
451 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
452 r300_translate_primitive(mode) |
453 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
454 END_CS;
455 }
456
457 static void r300_emit_draw_elements(struct r300_context *r300,
458 struct pipe_resource* indexBuffer,
459 unsigned indexSize,
460 unsigned min_index,
461 unsigned max_index,
462 unsigned mode,
463 unsigned start,
464 unsigned count,
465 uint16_t *imm_indices3)
466 {
467 uint32_t count_dwords, offset_dwords;
468 boolean alt_num_verts = count > 65535;
469 CS_LOCALS(r300);
470
471 if (count >= (1 << 24) || max_index >= (1 << 24)) {
472 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
473 "refusing to render (max_index: %i).\n", count, max_index);
474 return;
475 }
476
477 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
478 count, min_index, max_index);
479
480 r300_emit_draw_init(r300, mode, min_index, max_index);
481
482 /* If start is odd, render the first triangle with indices embedded
483 * in the command stream. This will increase start by 3 and make it
484 * even. We can then proceed without a fallback. */
485 if (indexSize == 2 && (start & 1) &&
486 mode == PIPE_PRIM_TRIANGLES) {
487 BEGIN_CS(4);
488 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 2);
489 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (3 << 16) |
490 R300_VAP_VF_CNTL__PRIM_TRIANGLES);
491 OUT_CS(imm_indices3[1] << 16 | imm_indices3[0]);
492 OUT_CS(imm_indices3[2]);
493 END_CS;
494
495 start += 3;
496 count -= 3;
497 if (!count)
498 return;
499 }
500
501 offset_dwords = indexSize * start / sizeof(uint32_t);
502
503 BEGIN_CS(8 + (alt_num_verts ? 2 : 0));
504 if (alt_num_verts) {
505 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
506 }
507 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
508 if (indexSize == 4) {
509 count_dwords = count;
510 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
511 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
512 r300_translate_primitive(mode) |
513 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
514 } else {
515 count_dwords = (count + 1) / 2;
516 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
517 r300_translate_primitive(mode) |
518 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
519 }
520
521 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
522 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
523 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
524 OUT_CS(offset_dwords << 2);
525 OUT_CS(count_dwords);
526 OUT_CS_RELOC(r300_resource(indexBuffer));
527 END_CS;
528 }
529
530 static void r300_draw_elements_immediate(struct r300_context *r300,
531 const struct pipe_draw_info *info)
532 {
533 uint8_t *ptr1;
534 uint16_t *ptr2;
535 uint32_t *ptr4;
536 unsigned index_size = r300->index_buffer.index_size;
537 unsigned i, count_dwords = index_size == 4 ? info->count :
538 (info->count + 1) / 2;
539 CS_LOCALS(r300);
540
541 /* 19 dwords for r300_draw_elements_immediate. Give up if the function fails. */
542 if (!r300_prepare_for_rendering(r300,
543 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_AOS |
544 PREP_INDEXED, NULL, 2+count_dwords, 0, info->index_bias, -1))
545 return;
546
547 r300_emit_draw_init(r300, info->mode, info->min_index, info->max_index);
548
549 BEGIN_CS(2 + count_dwords);
550 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, count_dwords);
551
552 switch (index_size) {
553 case 1:
554 ptr1 = r300_resource(r300->index_buffer.buffer)->b.user_ptr;
555 ptr1 += info->start;
556
557 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
558 r300_translate_primitive(info->mode));
559
560 if (info->index_bias && !r300->screen->caps.is_r500) {
561 for (i = 0; i < info->count-1; i += 2)
562 OUT_CS(((ptr1[i+1] + info->index_bias) << 16) |
563 (ptr1[i] + info->index_bias));
564
565 if (info->count & 1)
566 OUT_CS(ptr1[i] + info->index_bias);
567 } else {
568 for (i = 0; i < info->count-1; i += 2)
569 OUT_CS(((ptr1[i+1]) << 16) |
570 (ptr1[i] ));
571
572 if (info->count & 1)
573 OUT_CS(ptr1[i]);
574 }
575 break;
576
577 case 2:
578 ptr2 = (uint16_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr;
579 ptr2 += info->start;
580
581 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
582 r300_translate_primitive(info->mode));
583
584 if (info->index_bias && !r300->screen->caps.is_r500) {
585 for (i = 0; i < info->count-1; i += 2)
586 OUT_CS(((ptr2[i+1] + info->index_bias) << 16) |
587 (ptr2[i] + info->index_bias));
588
589 if (info->count & 1)
590 OUT_CS(ptr2[i] + info->index_bias);
591 } else {
592 OUT_CS_TABLE(ptr2, count_dwords);
593 }
594 break;
595
596 case 4:
597 ptr4 = (uint32_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr;
598 ptr4 += info->start;
599
600 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
601 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
602 r300_translate_primitive(info->mode));
603
604 if (info->index_bias && !r300->screen->caps.is_r500) {
605 for (i = 0; i < info->count; i++)
606 OUT_CS(ptr4[i] + info->index_bias);
607 } else {
608 OUT_CS_TABLE(ptr4, count_dwords);
609 }
610 break;
611 }
612 END_CS;
613 }
614
615 static void r300_draw_elements(struct r300_context *r300,
616 const struct pipe_draw_info *info,
617 int instance_id)
618 {
619 struct pipe_resource *indexBuffer = r300->index_buffer.buffer;
620 unsigned indexSize = r300->index_buffer.index_size;
621 struct pipe_resource* orgIndexBuffer = indexBuffer;
622 unsigned start = info->start;
623 unsigned count = info->count;
624 boolean alt_num_verts = r300->screen->caps.is_r500 &&
625 count > 65536;
626 unsigned short_count;
627 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */
628 uint16_t indices3[3];
629
630 if (info->index_bias && !r300->screen->caps.is_r500) {
631 r300_split_index_bias(r300, info->index_bias, &buffer_offset, &index_offset);
632 }
633
634 r300_translate_index_buffer(r300, &indexBuffer, &indexSize, index_offset,
635 &start, count);
636
637 /* Fallback for misaligned ushort indices. */
638 if (indexSize == 2 && (start & 1) &&
639 !r300_resource(indexBuffer)->b.user_ptr) {
640 /* If we got here, then orgIndexBuffer == indexBuffer. */
641 uint16_t *ptr = r300->rws->buffer_map(r300_resource(orgIndexBuffer)->buf,
642 r300->cs,
643 PIPE_TRANSFER_READ |
644 PIPE_TRANSFER_UNSYNCHRONIZED);
645
646 if (info->mode == PIPE_PRIM_TRIANGLES) {
647 memcpy(indices3, ptr + start, 6);
648 } else {
649 /* Copy the mapped index buffer directly to the upload buffer.
650 * The start index will be aligned simply from the fact that
651 * every sub-buffer in the upload buffer is aligned. */
652 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start,
653 count, (uint8_t*)ptr);
654 }
655 r300->rws->buffer_unmap(r300_resource(orgIndexBuffer)->buf);
656 } else {
657 if (r300_resource(indexBuffer)->b.user_ptr)
658 r300_upload_index_buffer(r300, &indexBuffer, indexSize,
659 &start, count,
660 r300_resource(indexBuffer)->b.user_ptr);
661 }
662
663 /* 19 dwords for emit_draw_elements. Give up if the function fails. */
664 if (!r300_prepare_for_rendering(r300,
665 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_AOS |
666 PREP_INDEXED, indexBuffer, 19, buffer_offset, info->index_bias,
667 instance_id))
668 goto done;
669
670 if (alt_num_verts || count <= 65535) {
671 r300_emit_draw_elements(r300, indexBuffer, indexSize, info->min_index,
672 info->max_index, info->mode, start, count,
673 indices3);
674 } else {
675 do {
676 if (indexSize == 2 && (start & 1))
677 short_count = MIN2(count, 65535);
678 else
679 short_count = MIN2(count, 65534);
680
681 r300_emit_draw_elements(r300, indexBuffer, indexSize,
682 info->min_index, info->max_index,
683 info->mode, start, short_count, indices3);
684
685 start += short_count;
686 count -= short_count;
687
688 /* 15 dwords for emit_draw_elements */
689 if (count) {
690 if (!r300_prepare_for_rendering(r300,
691 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED,
692 indexBuffer, 19, buffer_offset, info->index_bias,
693 instance_id))
694 goto done;
695 }
696 } while (count);
697 }
698
699 done:
700 if (indexBuffer != orgIndexBuffer) {
701 pipe_resource_reference( &indexBuffer, NULL );
702 }
703 }
704
705 static void r300_draw_arrays(struct r300_context *r300,
706 const struct pipe_draw_info *info,
707 int instance_id)
708 {
709 boolean alt_num_verts = r300->screen->caps.is_r500 &&
710 info->count > 65536;
711 unsigned start = info->start;
712 unsigned count = info->count;
713 unsigned short_count;
714
715 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
716 if (!r300_prepare_for_rendering(r300,
717 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_AOS,
718 NULL, 9, start, 0, instance_id))
719 return;
720
721 if (alt_num_verts || count <= 65535) {
722 r300_emit_draw_arrays(r300, info->mode, count);
723 } else {
724 do {
725 short_count = MIN2(count, 65535);
726 r300_emit_draw_arrays(r300, info->mode, short_count);
727
728 start += short_count;
729 count -= short_count;
730
731 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
732 if (count) {
733 if (!r300_prepare_for_rendering(r300,
734 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9,
735 start, 0, instance_id))
736 return;
737 }
738 } while (count);
739 }
740 }
741
742 static void r300_draw_arrays_instanced(struct r300_context *r300,
743 const struct pipe_draw_info *info)
744 {
745 int i;
746
747 for (i = 0; i < info->instance_count; i++)
748 r300_draw_arrays(r300, info, i);
749 }
750
751 static void r300_draw_elements_instanced(struct r300_context *r300,
752 const struct pipe_draw_info *info)
753 {
754 int i;
755
756 for (i = 0; i < info->instance_count; i++)
757 r300_draw_elements(r300, info, i);
758 }
759
760 static void r300_draw_vbo(struct pipe_context* pipe,
761 const struct pipe_draw_info *dinfo)
762 {
763 struct r300_context* r300 = r300_context(pipe);
764 struct pipe_draw_info info = *dinfo;
765 boolean buffers_updated, uploader_flushed;
766
767 info.indexed = info.indexed && r300->index_buffer.buffer;
768
769 if (r300->skip_rendering ||
770 !u_trim_pipe_prim(info.mode, &info.count)) {
771 return;
772 }
773
774 r300_update_derived_state(r300);
775
776 /* Start the vbuf manager and update buffers if needed. */
777 u_vbuf_mgr_draw_begin(r300->vbuf_mgr, &info,
778 &buffers_updated, &uploader_flushed);
779 if (buffers_updated) {
780 r300->vertex_arrays_dirty = TRUE;
781 }
782
783 /* Draw. */
784 if (info.indexed) {
785 info.start += r300->index_buffer.offset;
786 info.max_index = MIN2(r300->vbuf_mgr->max_index, info.max_index);
787
788 if (info.instance_count <= 1) {
789 if (info.count <= 8 &&
790 r300_resource(r300->index_buffer.buffer)->b.user_ptr) {
791 r300_draw_elements_immediate(r300, &info);
792 } else {
793 r300_draw_elements(r300, &info, -1);
794 }
795 } else {
796 r300_draw_elements_instanced(r300, &info);
797 }
798 } else {
799 if (info.instance_count <= 1) {
800 if (immd_is_good_idea(r300, info.count)) {
801 r300_draw_arrays_immediate(r300, &info);
802 } else {
803 r300_draw_arrays(r300, &info, -1);
804 }
805 } else {
806 r300_draw_arrays_instanced(r300, &info);
807 }
808 }
809
810 u_vbuf_mgr_draw_end(r300->vbuf_mgr);
811 }
812
813 /****************************************************************************
814 * The rest of this file is for SW TCL rendering only. Please be polite and *
815 * keep these functions separated so that they are easier to locate. ~C. *
816 ***************************************************************************/
817
818 /* SW TCL elements, using Draw. */
819 static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
820 const struct pipe_draw_info *info)
821 {
822 struct r300_context* r300 = r300_context(pipe);
823 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
824 struct pipe_transfer *ib_transfer = NULL;
825 unsigned count = info->count;
826 int i;
827 void *indices = NULL;
828 boolean indexed = info->indexed && r300->index_buffer.buffer;
829
830 if (r300->skip_rendering) {
831 return;
832 }
833
834 if (!u_trim_pipe_prim(info->mode, &count)) {
835 return;
836 }
837
838 r300_update_derived_state(r300);
839
840 r300_reserve_cs_dwords(r300,
841 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL |
842 (indexed ? PREP_INDEXED : 0),
843 indexed ? 256 : 6);
844
845 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
846 if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
847 void *buf = pipe_buffer_map(pipe,
848 r300->vbuf_mgr->vertex_buffer[i].buffer,
849 PIPE_TRANSFER_READ |
850 PIPE_TRANSFER_UNSYNCHRONIZED,
851 &vb_transfer[i]);
852 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
853 }
854 }
855
856 if (indexed) {
857 indices = pipe_buffer_map(pipe, r300->index_buffer.buffer,
858 PIPE_TRANSFER_READ |
859 PIPE_TRANSFER_UNSYNCHRONIZED, &ib_transfer);
860 }
861
862 draw_set_mapped_index_buffer(r300->draw, indices);
863
864 r300->draw_vbo_locked = TRUE;
865 r300->draw_first_emitted = FALSE;
866 draw_vbo(r300->draw, info);
867 draw_flush(r300->draw);
868 r300->draw_vbo_locked = FALSE;
869
870 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
871 if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
872 pipe_buffer_unmap(pipe, vb_transfer[i]);
873 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
874 }
875 }
876
877 if (indexed) {
878 pipe_buffer_unmap(pipe, ib_transfer);
879 draw_set_mapped_index_buffer(r300->draw, NULL);
880 }
881 }
882
883 /* Object for rendering using Draw. */
884 struct r300_render {
885 /* Parent class */
886 struct vbuf_render base;
887
888 /* Pipe context */
889 struct r300_context* r300;
890
891 /* Vertex information */
892 size_t vertex_size;
893 unsigned prim;
894 unsigned hwprim;
895
896 /* VBO */
897 size_t vbo_max_used;
898 void * vbo_ptr;
899
900 struct pipe_transfer *vbo_transfer;
901 };
902
903 static INLINE struct r300_render*
904 r300_render(struct vbuf_render* render)
905 {
906 return (struct r300_render*)render;
907 }
908
909 static const struct vertex_info*
910 r300_render_get_vertex_info(struct vbuf_render* render)
911 {
912 struct r300_render* r300render = r300_render(render);
913 struct r300_context* r300 = r300render->r300;
914
915 return &r300->vertex_info;
916 }
917
918 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
919 ushort vertex_size,
920 ushort count)
921 {
922 struct r300_render* r300render = r300_render(render);
923 struct r300_context* r300 = r300render->r300;
924 struct pipe_screen* screen = r300->context.screen;
925 size_t size = (size_t)vertex_size * (size_t)count;
926
927 DBG(r300, DBG_DRAW, "r300: render_allocate_vertices (size: %d)\n", size);
928
929 if (size + r300->draw_vbo_offset > r300->draw_vbo_size)
930 {
931 pipe_resource_reference(&r300->vbo, NULL);
932 r300->vbo = pipe_buffer_create(screen,
933 PIPE_BIND_VERTEX_BUFFER,
934 PIPE_USAGE_STREAM,
935 R300_MAX_DRAW_VBO_SIZE);
936 r300->draw_vbo_offset = 0;
937 r300->draw_vbo_size = R300_MAX_DRAW_VBO_SIZE;
938 }
939
940 r300render->vertex_size = vertex_size;
941
942 return (r300->vbo) ? TRUE : FALSE;
943 }
944
945 static void* r300_render_map_vertices(struct vbuf_render* render)
946 {
947 struct r300_render* r300render = r300_render(render);
948 struct r300_context* r300 = r300render->r300;
949
950 assert(!r300render->vbo_transfer);
951
952 DBG(r300, DBG_DRAW, "r300: render_map_vertices\n");
953
954 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
955 r300->vbo,
956 PIPE_TRANSFER_WRITE |
957 PIPE_TRANSFER_UNSYNCHRONIZED,
958 &r300render->vbo_transfer);
959
960 assert(r300render->vbo_ptr);
961
962 return ((uint8_t*)r300render->vbo_ptr + r300->draw_vbo_offset);
963 }
964
965 static void r300_render_unmap_vertices(struct vbuf_render* render,
966 ushort min,
967 ushort max)
968 {
969 struct r300_render* r300render = r300_render(render);
970 struct pipe_context* context = &r300render->r300->context;
971 struct r300_context* r300 = r300render->r300;
972
973 assert(r300render->vbo_transfer);
974
975 DBG(r300, DBG_DRAW, "r300: render_unmap_vertices\n");
976
977 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
978 r300render->vertex_size * (max + 1));
979 pipe_buffer_unmap(context, r300render->vbo_transfer);
980
981 r300render->vbo_transfer = NULL;
982 }
983
984 static void r300_render_release_vertices(struct vbuf_render* render)
985 {
986 struct r300_render* r300render = r300_render(render);
987 struct r300_context* r300 = r300render->r300;
988
989 DBG(r300, DBG_DRAW, "r300: render_release_vertices\n");
990
991 r300->draw_vbo_offset += r300render->vbo_max_used;
992 r300render->vbo_max_used = 0;
993 }
994
995 static boolean r300_render_set_primitive(struct vbuf_render* render,
996 unsigned prim)
997 {
998 struct r300_render* r300render = r300_render(render);
999
1000 r300render->prim = prim;
1001 r300render->hwprim = r300_translate_primitive(prim);
1002
1003 return TRUE;
1004 }
1005
1006 static void r300_render_draw_arrays(struct vbuf_render* render,
1007 unsigned start,
1008 unsigned count)
1009 {
1010 struct r300_render* r300render = r300_render(render);
1011 struct r300_context* r300 = r300render->r300;
1012 uint8_t* ptr;
1013 unsigned i;
1014 unsigned dwords = 6;
1015
1016 CS_LOCALS(r300);
1017 (void) i; (void) ptr;
1018
1019 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count);
1020
1021 if (r300->draw_first_emitted) {
1022 if (!r300_prepare_for_rendering(r300,
1023 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL,
1024 NULL, dwords, 0, 0, -1))
1025 return;
1026 } else {
1027 if (!r300_emit_states(r300,
1028 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL,
1029 NULL, 0, 0, -1))
1030 return;
1031 }
1032
1033 BEGIN_CS(dwords);
1034 OUT_CS_REG(R300_GA_COLOR_CONTROL,
1035 r300_provoking_vertex_fixes(r300, r300render->prim));
1036 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
1037 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
1038 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
1039 r300render->hwprim);
1040 END_CS;
1041
1042 r300->draw_first_emitted = TRUE;
1043 }
1044
1045 static void r300_render_draw_elements(struct vbuf_render* render,
1046 const ushort* indices,
1047 uint count)
1048 {
1049 struct r300_render* r300render = r300_render(render);
1050 struct r300_context* r300 = r300render->r300;
1051 int i;
1052 unsigned end_cs_dwords;
1053 unsigned max_index = (r300->draw_vbo_size - r300->draw_vbo_offset) /
1054 (r300render->r300->vertex_info.size * 4) - 1;
1055 unsigned short_count;
1056 unsigned free_dwords;
1057
1058 CS_LOCALS(r300);
1059 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count);
1060
1061 if (r300->draw_first_emitted) {
1062 if (!r300_prepare_for_rendering(r300,
1063 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
1064 NULL, 256, 0, 0, -1))
1065 return;
1066 } else {
1067 if (!r300_emit_states(r300,
1068 PREP_EMIT_STATES | PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
1069 NULL, 0, 0, -1))
1070 return;
1071 }
1072
1073 /* Below we manage the CS space manually because there may be more
1074 * indices than it can fit in CS. */
1075
1076 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1077
1078 while (count) {
1079 free_dwords = RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw;
1080
1081 short_count = MIN2(count, (free_dwords - end_cs_dwords - 6) * 2);
1082
1083 BEGIN_CS(6 + (short_count+1)/2);
1084 OUT_CS_REG(R300_GA_COLOR_CONTROL,
1085 r300_provoking_vertex_fixes(r300, r300render->prim));
1086 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
1087 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2);
1088 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) |
1089 r300render->hwprim);
1090 for (i = 0; i < short_count-1; i += 2) {
1091 OUT_CS(indices[i+1] << 16 | indices[i]);
1092 }
1093 if (short_count % 2) {
1094 OUT_CS(indices[short_count-1]);
1095 }
1096 END_CS;
1097
1098 /* OK now subtract the emitted indices and see if we need to emit
1099 * another draw packet. */
1100 indices += short_count;
1101 count -= short_count;
1102
1103 if (count) {
1104 if (!r300_prepare_for_rendering(r300,
1105 PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
1106 NULL, 256, 0, 0, -1))
1107 return;
1108
1109 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1110 }
1111 }
1112
1113 r300->draw_first_emitted = TRUE;
1114 }
1115
1116 static void r300_render_destroy(struct vbuf_render* render)
1117 {
1118 FREE(render);
1119 }
1120
1121 static struct vbuf_render* r300_render_create(struct r300_context* r300)
1122 {
1123 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
1124
1125 r300render->r300 = r300;
1126
1127 r300render->base.max_vertex_buffer_bytes = 1024 * 1024;
1128 r300render->base.max_indices = 16 * 1024;
1129
1130 r300render->base.get_vertex_info = r300_render_get_vertex_info;
1131 r300render->base.allocate_vertices = r300_render_allocate_vertices;
1132 r300render->base.map_vertices = r300_render_map_vertices;
1133 r300render->base.unmap_vertices = r300_render_unmap_vertices;
1134 r300render->base.set_primitive = r300_render_set_primitive;
1135 r300render->base.draw_elements = r300_render_draw_elements;
1136 r300render->base.draw_arrays = r300_render_draw_arrays;
1137 r300render->base.release_vertices = r300_render_release_vertices;
1138 r300render->base.destroy = r300_render_destroy;
1139
1140 return &r300render->base;
1141 }
1142
1143 struct draw_stage* r300_draw_stage(struct r300_context* r300)
1144 {
1145 struct vbuf_render* render;
1146 struct draw_stage* stage;
1147
1148 render = r300_render_create(r300);
1149
1150 if (!render) {
1151 return NULL;
1152 }
1153
1154 stage = draw_vbuf_stage(r300->draw, render);
1155
1156 if (!stage) {
1157 render->destroy(render);
1158 return NULL;
1159 }
1160
1161 draw_set_render(r300->draw, render);
1162
1163 return stage;
1164 }
1165
1166 void r300_draw_flush_vbuf(struct r300_context *r300)
1167 {
1168 pipe_resource_reference(&r300->vbo, NULL);
1169 r300->draw_vbo_size = 0;
1170 }
1171
1172 /****************************************************************************
1173 * End of SW TCL functions *
1174 ***************************************************************************/
1175
1176 /* This functions is used to draw a rectangle for the blitter module.
1177 *
1178 * If we rendered a quad, the pixels on the main diagonal
1179 * would be computed and stored twice, which makes the clear/copy codepaths
1180 * somewhat inefficient. Instead we use a rectangular point sprite. */
1181 static void r300_blitter_draw_rectangle(struct blitter_context *blitter,
1182 unsigned x1, unsigned y1,
1183 unsigned x2, unsigned y2,
1184 float depth,
1185 enum blitter_attrib_type type,
1186 const float attrib[4])
1187 {
1188 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter));
1189 unsigned last_sprite_coord_enable = r300->sprite_coord_enable;
1190 unsigned width = x2 - x1;
1191 unsigned height = y2 - y1;
1192 unsigned vertex_size =
1193 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4;
1194 unsigned dwords = 13 + vertex_size +
1195 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0);
1196 const float zeros[4] = {0, 0, 0, 0};
1197 CS_LOCALS(r300);
1198
1199 if (r300->skip_rendering)
1200 return;
1201
1202 r300->context.set_vertex_buffers(&r300->context, 0, NULL);
1203
1204 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD)
1205 r300->sprite_coord_enable = 1;
1206
1207 r300_update_derived_state(r300);
1208
1209 /* Mark some states we don't care about as non-dirty. */
1210 r300->clip_state.dirty = FALSE;
1211 r300->viewport_state.dirty = FALSE;
1212
1213 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1))
1214 goto done;
1215
1216 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n");
1217
1218 BEGIN_CS(dwords);
1219 /* Set up GA. */
1220 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16));
1221
1222 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) {
1223 /* Set up the GA to generate texcoords. */
1224 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE |
1225 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT));
1226 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
1227 OUT_CS_32F(attrib[0]);
1228 OUT_CS_32F(attrib[3]);
1229 OUT_CS_32F(attrib[2]);
1230 OUT_CS_32F(attrib[1]);
1231 }
1232
1233 /* Set up VAP controls. */
1234 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
1235 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT);
1236 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
1237 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
1238 OUT_CS(1);
1239 OUT_CS(0);
1240
1241 /* Draw. */
1242 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size);
1243 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) |
1244 R300_VAP_VF_CNTL__PRIM_POINTS);
1245
1246 OUT_CS_32F(x1 + width * 0.5f);
1247 OUT_CS_32F(y1 + height * 0.5f);
1248 OUT_CS_32F(depth);
1249 OUT_CS_32F(1);
1250
1251 if (vertex_size == 8) {
1252 if (!attrib)
1253 attrib = zeros;
1254 OUT_CS_TABLE(attrib, 4);
1255 }
1256 END_CS;
1257
1258 done:
1259 /* Restore the state. */
1260 r300_mark_atom_dirty(r300, &r300->clip_state);
1261 r300_mark_atom_dirty(r300, &r300->rs_state);
1262 r300_mark_atom_dirty(r300, &r300->viewport_state);
1263
1264 r300->sprite_coord_enable = last_sprite_coord_enable;
1265 }
1266
1267 static void r300_resource_resolve(struct pipe_context* pipe,
1268 struct pipe_resource* dest,
1269 unsigned dst_layer,
1270 struct pipe_resource* src,
1271 unsigned src_layer)
1272 {
1273 struct r300_context* r300 = r300_context(pipe);
1274 struct pipe_surface* srcsurf, surf_tmpl;
1275 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
1276 float color[] = {0, 0, 0, 0};
1277
1278 memset(&surf_tmpl, 0, sizeof(surf_tmpl));
1279 surf_tmpl.format = src->format;
1280 surf_tmpl.usage = 0; /* not really a surface hence no bind flags */
1281 surf_tmpl.u.tex.level = 0; /* msaa resources cannot have mipmaps */
1282 surf_tmpl.u.tex.first_layer = src_layer;
1283 surf_tmpl.u.tex.last_layer = src_layer;
1284 srcsurf = pipe->create_surface(pipe, src, &surf_tmpl);
1285 surf_tmpl.format = dest->format;
1286 surf_tmpl.u.tex.first_layer = dst_layer;
1287 surf_tmpl.u.tex.last_layer = dst_layer;
1288
1289 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n");
1290
1291 /* Enable AA resolve. */
1292 aa->dest = r300_surface(pipe->create_surface(pipe, dest, &surf_tmpl));
1293
1294 aa->aaresolve_ctl =
1295 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE |
1296 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE;
1297 r300->aa_state.size = 10;
1298 r300_mark_atom_dirty(r300, &r300->aa_state);
1299
1300 /* Resolve the surface. */
1301 r300->context.clear_render_target(pipe,
1302 srcsurf, color, 0, 0, src->width0, src->height0);
1303
1304 /* Disable AA resolve. */
1305 aa->aaresolve_ctl = 0;
1306 r300->aa_state.size = 4;
1307 r300_mark_atom_dirty(r300, &r300->aa_state);
1308
1309 pipe_surface_reference((struct pipe_surface**)&srcsurf, NULL);
1310 pipe_surface_reference((struct pipe_surface**)&aa->dest, NULL);
1311 }
1312
1313 void r300_init_render_functions(struct r300_context *r300)
1314 {
1315 /* Set draw functions based on presence of HW TCL. */
1316 if (r300->screen->caps.has_tcl) {
1317 r300->context.draw_vbo = r300_draw_vbo;
1318 } else {
1319 r300->context.draw_vbo = r300_swtcl_draw_vbo;
1320 }
1321
1322 r300->context.resource_resolve = r300_resource_resolve;
1323 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
1324
1325 /* Plug in the two-sided stencil reference value fallback if needed. */
1326 if (!r300->screen->caps.is_r500)
1327 r300_plug_in_stencil_ref_fallback(r300);
1328 }