r300g/swtcl: use memcpy to emit indices
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_render: Vertex and index buffer primitive emission. Contains both
25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
26
27 #include "draw/draw_context.h"
28 #include "draw/draw_vbuf.h"
29
30 #include "util/u_inlines.h"
31
32 #include "util/u_format.h"
33 #include "util/u_memory.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36
37 #include "r300_cs.h"
38 #include "r300_context.h"
39 #include "r300_screen_buffer.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42
43 #include <limits.h>
44
45 #define IMMD_DWORDS 32
46
47 static uint32_t r300_translate_primitive(unsigned prim)
48 {
49 static const int prim_conv[] = {
50 R300_VAP_VF_CNTL__PRIM_POINTS,
51 R300_VAP_VF_CNTL__PRIM_LINES,
52 R300_VAP_VF_CNTL__PRIM_LINE_LOOP,
53 R300_VAP_VF_CNTL__PRIM_LINE_STRIP,
54 R300_VAP_VF_CNTL__PRIM_TRIANGLES,
55 R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP,
56 R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN,
57 R300_VAP_VF_CNTL__PRIM_QUADS,
58 R300_VAP_VF_CNTL__PRIM_QUAD_STRIP,
59 R300_VAP_VF_CNTL__PRIM_POLYGON,
60 -1,
61 -1,
62 -1,
63 -1
64 };
65 unsigned hwprim = prim_conv[prim];
66
67 assert(hwprim != -1);
68 return hwprim;
69 }
70
71 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
72 unsigned mode)
73 {
74 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
75 uint32_t color_control = rs->color_control;
76
77 /* By default (see r300_state.c:r300_create_rs_state) color_control is
78 * initialized to provoking the first vertex.
79 *
80 * Triangle fans must be reduced to the second vertex, not the first, in
81 * Gallium flatshade-first mode, as per the GL spec.
82 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
83 *
84 * Quads never provoke correctly in flatshade-first mode. The first
85 * vertex is never considered as provoking, so only the second, third,
86 * and fourth vertices can be selected, and both "third" and "last" modes
87 * select the fourth vertex. This is probably due to D3D lacking quads.
88 *
89 * Similarly, polygons reduce to the first, not the last, vertex, when in
90 * "last" mode, and all other modes start from the second vertex.
91 *
92 * ~ C.
93 */
94
95 if (rs->rs.flatshade_first) {
96 switch (mode) {
97 case PIPE_PRIM_TRIANGLE_FAN:
98 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
99 break;
100 case PIPE_PRIM_QUADS:
101 case PIPE_PRIM_QUAD_STRIP:
102 case PIPE_PRIM_POLYGON:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
104 break;
105 default:
106 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
107 break;
108 }
109 } else {
110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
111 }
112
113 return color_control;
114 }
115
116 void r500_emit_index_bias(struct r300_context *r300, int index_bias)
117 {
118 CS_LOCALS(r300);
119
120 BEGIN_CS(2);
121 OUT_CS_REG(R500_VAP_INDEX_OFFSET,
122 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));
123 END_CS;
124 }
125
126 static void r300_emit_draw_init(struct r300_context *r300, unsigned mode,
127 unsigned max_index)
128 {
129 CS_LOCALS(r300);
130
131 assert(max_index < (1 << 24));
132
133 BEGIN_CS(5);
134 OUT_CS_REG(R300_GA_COLOR_CONTROL,
135 r300_provoking_vertex_fixes(r300, mode));
136 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
137 OUT_CS(max_index);
138 OUT_CS(0);
139 END_CS;
140 }
141
142 /* This function splits the index bias value into two parts:
143 * - buffer_offset: the value that can be safely added to buffer offsets
144 * in r300_emit_vertex_arrays (it must yield a positive offset when added to
145 * a vertex buffer offset)
146 * - index_offset: the value that must be manually subtracted from indices
147 * in an index buffer to achieve negative offsets. */
148 static void r300_split_index_bias(struct r300_context *r300, int index_bias,
149 int *buffer_offset, int *index_offset)
150 {
151 struct pipe_vertex_buffer *vb, *vbufs = r300->vertex_buffer;
152 struct pipe_vertex_element *velem = r300->velems->velem;
153 unsigned i, size;
154 int max_neg_bias;
155
156 if (index_bias < 0) {
157 /* See how large index bias we may subtract. We must be careful
158 * here because negative buffer offsets are not allowed
159 * by the DRM API. */
160 max_neg_bias = INT_MAX;
161 for (i = 0; i < r300->velems->count; i++) {
162 vb = &vbufs[velem[i].vertex_buffer_index];
163 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride;
164 max_neg_bias = MIN2(max_neg_bias, size);
165 }
166
167 /* Now set the minimum allowed value. */
168 *buffer_offset = MAX2(-max_neg_bias, index_bias);
169 } else {
170 /* A positive index bias is OK. */
171 *buffer_offset = index_bias;
172 }
173
174 *index_offset = index_bias - *buffer_offset;
175 }
176
177 enum r300_prepare_flags {
178 PREP_EMIT_STATES = (1 << 0), /* call emit_dirty_state and friends? */
179 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */
180 PREP_EMIT_VARRAYS = (1 << 2), /* call emit_vertex_arrays? */
181 PREP_EMIT_VARRAYS_SWTCL = (1 << 3), /* call emit_vertex_arrays_swtcl? */
182 PREP_INDEXED = (1 << 4) /* is this draw_elements? */
183 };
184
185 /**
186 * Check if the requested number of dwords is available in the CS and
187 * if not, flush.
188 * \param r300 The context.
189 * \param flags See r300_prepare_flags.
190 * \param cs_dwords The number of dwords to reserve in CS.
191 * \return TRUE if the CS was flushed
192 */
193 static boolean r300_reserve_cs_dwords(struct r300_context *r300,
194 enum r300_prepare_flags flags,
195 unsigned cs_dwords)
196 {
197 boolean flushed = FALSE;
198 boolean emit_states = flags & PREP_EMIT_STATES;
199 boolean emit_vertex_arrays = flags & PREP_EMIT_VARRAYS;
200 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_VARRAYS_SWTCL;
201
202 /* Add dirty state, index offset, and AOS. */
203 if (emit_states)
204 cs_dwords += r300_get_num_dirty_dwords(r300);
205
206 if (r300->screen->caps.is_r500)
207 cs_dwords += 2; /* emit_index_offset */
208
209 if (emit_vertex_arrays)
210 cs_dwords += 55; /* emit_vertex_arrays */
211
212 if (emit_vertex_arrays_swtcl)
213 cs_dwords += 7; /* emit_vertex_arrays_swtcl */
214
215 cs_dwords += r300_get_num_cs_end_dwords(r300);
216
217 /* Reserve requested CS space. */
218 if (cs_dwords > (RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw)) {
219 r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL);
220 flushed = TRUE;
221 }
222
223 return flushed;
224 }
225
226 /**
227 * Validate buffers and emit dirty state.
228 * \param r300 The context.
229 * \param flags See r300_prepare_flags.
230 * \param index_buffer The index buffer to validate. The parameter may be NULL.
231 * \param buffer_offset The offset passed to emit_vertex_arrays.
232 * \param index_bias The index bias to emit.
233 * \param instance_id Index of instance to render
234 * \return TRUE if rendering should be skipped
235 */
236 static boolean r300_emit_states(struct r300_context *r300,
237 enum r300_prepare_flags flags,
238 struct pipe_resource *index_buffer,
239 int buffer_offset,
240 int index_bias, int instance_id)
241 {
242 boolean emit_states = flags & PREP_EMIT_STATES;
243 boolean emit_vertex_arrays = flags & PREP_EMIT_VARRAYS;
244 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_VARRAYS_SWTCL;
245 boolean indexed = flags & PREP_INDEXED;
246 boolean validate_vbos = flags & PREP_VALIDATE_VBOS;
247
248 /* Validate buffers and emit dirty state if needed. */
249 if (emit_states || (emit_vertex_arrays && validate_vbos)) {
250 if (!r300_emit_buffer_validate(r300, validate_vbos,
251 index_buffer)) {
252 fprintf(stderr, "r300: CS space validation failed. "
253 "(not enough memory?) Skipping rendering.\n");
254 return FALSE;
255 }
256 }
257
258 if (emit_states)
259 r300_emit_dirty_state(r300);
260
261 if (r300->screen->caps.is_r500) {
262 if (r300->screen->caps.has_tcl)
263 r500_emit_index_bias(r300, index_bias);
264 else
265 r500_emit_index_bias(r300, 0);
266 }
267
268 if (emit_vertex_arrays &&
269 (r300->vertex_arrays_dirty ||
270 r300->vertex_arrays_indexed != indexed ||
271 r300->vertex_arrays_offset != buffer_offset ||
272 r300->vertex_arrays_instance_id != instance_id)) {
273 r300_emit_vertex_arrays(r300, buffer_offset, indexed, instance_id);
274
275 r300->vertex_arrays_dirty = FALSE;
276 r300->vertex_arrays_indexed = indexed;
277 r300->vertex_arrays_offset = buffer_offset;
278 r300->vertex_arrays_instance_id = instance_id;
279 }
280
281 if (emit_vertex_arrays_swtcl)
282 r300_emit_vertex_arrays_swtcl(r300, indexed);
283
284 return TRUE;
285 }
286
287 /**
288 * Check if the requested number of dwords is available in the CS and
289 * if not, flush. Then validate buffers and emit dirty state.
290 * \param r300 The context.
291 * \param flags See r300_prepare_flags.
292 * \param index_buffer The index buffer to validate. The parameter may be NULL.
293 * \param cs_dwords The number of dwords to reserve in CS.
294 * \param buffer_offset The offset passed to emit_vertex_arrays.
295 * \param index_bias The index bias to emit.
296 * \param instance_id The instance to render.
297 * \return TRUE if rendering should be skipped
298 */
299 static boolean r300_prepare_for_rendering(struct r300_context *r300,
300 enum r300_prepare_flags flags,
301 struct pipe_resource *index_buffer,
302 unsigned cs_dwords,
303 int buffer_offset,
304 int index_bias,
305 int instance_id)
306 {
307 /* Make sure there is enough space in the command stream and emit states. */
308 if (r300_reserve_cs_dwords(r300, flags, cs_dwords))
309 flags |= PREP_EMIT_STATES;
310
311 return r300_emit_states(r300, flags, index_buffer, buffer_offset,
312 index_bias, instance_id);
313 }
314
315 static boolean immd_is_good_idea(struct r300_context *r300,
316 unsigned count)
317 {
318 if (DBG_ON(r300, DBG_NO_IMMD)) {
319 return FALSE;
320 }
321
322 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) {
323 return FALSE;
324 }
325
326 /* Buffers can only be used for read by r300 (except query buffers, but
327 * those can't be bound by a state tracker as vertex buffers). */
328 return TRUE;
329 }
330
331 /*****************************************************************************
332 * The HWTCL draw functions. *
333 ****************************************************************************/
334
335 static void r300_draw_arrays_immediate(struct r300_context *r300,
336 const struct pipe_draw_info *info)
337 {
338 struct pipe_vertex_element* velem;
339 struct pipe_vertex_buffer* vbuf;
340 unsigned vertex_element_count = r300->velems->count;
341 unsigned i, v, vbi;
342
343 /* Size of the vertex, in dwords. */
344 unsigned vertex_size = r300->velems->vertex_size_dwords;
345
346 /* The number of dwords for this draw operation. */
347 unsigned dwords = 4 + info->count * vertex_size;
348
349 /* Size of the vertex element, in dwords. */
350 unsigned size[PIPE_MAX_ATTRIBS];
351
352 /* Stride to the same attrib in the next vertex in the vertex buffer,
353 * in dwords. */
354 unsigned stride[PIPE_MAX_ATTRIBS];
355
356 /* Mapped vertex buffers. */
357 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
358 uint32_t* mapelem[PIPE_MAX_ATTRIBS];
359
360 CS_LOCALS(r300);
361
362 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1))
363 return;
364
365 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
366 for (i = 0; i < vertex_element_count; i++) {
367 velem = &r300->velems->velem[i];
368 size[i] = r300->velems->format_size[i] / 4;
369 vbi = velem->vertex_buffer_index;
370 vbuf = &r300->vertex_buffer[vbi];
371 stride[i] = vbuf->stride / 4;
372
373 /* Map the buffer. */
374 if (!map[vbi]) {
375 map[vbi] = (uint32_t*)r300->rws->buffer_map(
376 r300_resource(vbuf->buffer)->cs_buf,
377 r300->cs, PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED);
378 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * info->start;
379 }
380 mapelem[i] = map[vbi] + (velem->src_offset / 4);
381 }
382
383 r300_emit_draw_init(r300, info->mode, info->count-1);
384
385 BEGIN_CS(dwords);
386 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
387 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, info->count * vertex_size);
388 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (info->count << 16) |
389 r300_translate_primitive(info->mode));
390
391 /* Emit vertices. */
392 for (v = 0; v < info->count; v++) {
393 for (i = 0; i < vertex_element_count; i++) {
394 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]);
395 }
396 }
397 END_CS;
398 }
399
400 static void r300_emit_draw_arrays(struct r300_context *r300,
401 unsigned mode,
402 unsigned count)
403 {
404 boolean alt_num_verts = count > 65535;
405 CS_LOCALS(r300);
406
407 if (count >= (1 << 24)) {
408 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
409 "refusing to render.\n", count);
410 return;
411 }
412
413 r300_emit_draw_init(r300, mode, count-1);
414
415 BEGIN_CS(2 + (alt_num_verts ? 2 : 0));
416 if (alt_num_verts) {
417 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
418 }
419 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
420 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
421 r300_translate_primitive(mode) |
422 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
423 END_CS;
424 }
425
426 static void r300_emit_draw_elements(struct r300_context *r300,
427 struct pipe_resource* indexBuffer,
428 unsigned indexSize,
429 unsigned max_index,
430 unsigned mode,
431 unsigned start,
432 unsigned count,
433 uint16_t *imm_indices3)
434 {
435 uint32_t count_dwords, offset_dwords;
436 boolean alt_num_verts = count > 65535;
437 CS_LOCALS(r300);
438
439 if (count >= (1 << 24)) {
440 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
441 "refusing to render (max_index: %i).\n", count, max_index);
442 return;
443 }
444
445 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, max %u\n",
446 count, max_index);
447
448 r300_emit_draw_init(r300, mode, max_index);
449
450 /* If start is odd, render the first triangle with indices embedded
451 * in the command stream. This will increase start by 3 and make it
452 * even. We can then proceed without a fallback. */
453 if (indexSize == 2 && (start & 1) &&
454 mode == PIPE_PRIM_TRIANGLES) {
455 BEGIN_CS(4);
456 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 2);
457 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (3 << 16) |
458 R300_VAP_VF_CNTL__PRIM_TRIANGLES);
459 OUT_CS(imm_indices3[1] << 16 | imm_indices3[0]);
460 OUT_CS(imm_indices3[2]);
461 END_CS;
462
463 start += 3;
464 count -= 3;
465 if (!count)
466 return;
467 }
468
469 offset_dwords = indexSize * start / sizeof(uint32_t);
470
471 BEGIN_CS(8 + (alt_num_verts ? 2 : 0));
472 if (alt_num_verts) {
473 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
474 }
475 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
476 if (indexSize == 4) {
477 count_dwords = count;
478 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
479 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
480 r300_translate_primitive(mode) |
481 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
482 } else {
483 count_dwords = (count + 1) / 2;
484 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
485 r300_translate_primitive(mode) |
486 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
487 }
488
489 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
490 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
491 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
492 OUT_CS(offset_dwords << 2);
493 OUT_CS(count_dwords);
494 OUT_CS_RELOC(r300_resource(indexBuffer));
495 END_CS;
496 }
497
498 static void r300_draw_elements_immediate(struct r300_context *r300,
499 const struct pipe_draw_info *info)
500 {
501 const uint8_t *ptr1;
502 const uint16_t *ptr2;
503 const uint32_t *ptr4;
504 unsigned index_size = r300->index_buffer.index_size;
505 unsigned i, count_dwords = index_size == 4 ? info->count :
506 (info->count + 1) / 2;
507 CS_LOCALS(r300);
508
509 /* 19 dwords for r300_draw_elements_immediate. Give up if the function fails. */
510 if (!r300_prepare_for_rendering(r300,
511 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS |
512 PREP_INDEXED, NULL, 2+count_dwords, 0, info->index_bias, -1))
513 return;
514
515 r300_emit_draw_init(r300, info->mode, info->max_index);
516
517 BEGIN_CS(2 + count_dwords);
518 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, count_dwords);
519
520 switch (index_size) {
521 case 1:
522 ptr1 = (uint8_t*)r300->index_buffer.user_buffer;
523 ptr1 += info->start;
524
525 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
526 r300_translate_primitive(info->mode));
527
528 if (info->index_bias && !r300->screen->caps.is_r500) {
529 for (i = 0; i < info->count-1; i += 2)
530 OUT_CS(((ptr1[i+1] + info->index_bias) << 16) |
531 (ptr1[i] + info->index_bias));
532
533 if (info->count & 1)
534 OUT_CS(ptr1[i] + info->index_bias);
535 } else {
536 for (i = 0; i < info->count-1; i += 2)
537 OUT_CS(((ptr1[i+1]) << 16) |
538 (ptr1[i] ));
539
540 if (info->count & 1)
541 OUT_CS(ptr1[i]);
542 }
543 break;
544
545 case 2:
546 ptr2 = (uint16_t*)r300->index_buffer.user_buffer;
547 ptr2 += info->start;
548
549 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
550 r300_translate_primitive(info->mode));
551
552 if (info->index_bias && !r300->screen->caps.is_r500) {
553 for (i = 0; i < info->count-1; i += 2)
554 OUT_CS(((ptr2[i+1] + info->index_bias) << 16) |
555 (ptr2[i] + info->index_bias));
556
557 if (info->count & 1)
558 OUT_CS(ptr2[i] + info->index_bias);
559 } else {
560 OUT_CS_TABLE(ptr2, count_dwords);
561 }
562 break;
563
564 case 4:
565 ptr4 = (uint32_t*)r300->index_buffer.user_buffer;
566 ptr4 += info->start;
567
568 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
569 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
570 r300_translate_primitive(info->mode));
571
572 if (info->index_bias && !r300->screen->caps.is_r500) {
573 for (i = 0; i < info->count; i++)
574 OUT_CS(ptr4[i] + info->index_bias);
575 } else {
576 OUT_CS_TABLE(ptr4, count_dwords);
577 }
578 break;
579 }
580 END_CS;
581 }
582
583 static void r300_draw_elements(struct r300_context *r300,
584 const struct pipe_draw_info *info,
585 int instance_id)
586 {
587 struct pipe_resource *indexBuffer = r300->index_buffer.buffer;
588 unsigned indexSize = r300->index_buffer.index_size;
589 struct pipe_resource* orgIndexBuffer = indexBuffer;
590 unsigned start = info->start;
591 unsigned count = info->count;
592 boolean alt_num_verts = r300->screen->caps.is_r500 &&
593 count > 65536;
594 unsigned short_count;
595 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */
596 uint16_t indices3[3];
597
598 if (info->index_bias && !r300->screen->caps.is_r500) {
599 r300_split_index_bias(r300, info->index_bias, &buffer_offset,
600 &index_offset);
601 }
602
603 r300_translate_index_buffer(r300, &r300->index_buffer, &indexBuffer,
604 &indexSize, index_offset, &start, count);
605
606 /* Fallback for misaligned ushort indices. */
607 if (indexSize == 2 && (start & 1) && indexBuffer) {
608 /* If we got here, then orgIndexBuffer == indexBuffer. */
609 uint16_t *ptr = r300->rws->buffer_map(r300_resource(orgIndexBuffer)->cs_buf,
610 r300->cs,
611 PIPE_TRANSFER_READ |
612 PIPE_TRANSFER_UNSYNCHRONIZED);
613
614 if (info->mode == PIPE_PRIM_TRIANGLES) {
615 memcpy(indices3, ptr + start, 6);
616 } else {
617 /* Copy the mapped index buffer directly to the upload buffer.
618 * The start index will be aligned simply from the fact that
619 * every sub-buffer in the upload buffer is aligned. */
620 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start,
621 count, (uint8_t*)ptr);
622 }
623 } else {
624 if (r300->index_buffer.user_buffer)
625 r300_upload_index_buffer(r300, &indexBuffer, indexSize,
626 &start, count,
627 r300->index_buffer.user_buffer);
628 }
629
630 /* 19 dwords for emit_draw_elements. Give up if the function fails. */
631 if (!r300_prepare_for_rendering(r300,
632 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS |
633 PREP_INDEXED, indexBuffer, 19, buffer_offset, info->index_bias,
634 instance_id))
635 goto done;
636
637 if (alt_num_verts || count <= 65535) {
638 r300_emit_draw_elements(r300, indexBuffer, indexSize,
639 info->max_index, info->mode, start, count,
640 indices3);
641 } else {
642 do {
643 /* The maximum must be divisible by 4 and 3,
644 * so that quad and triangle lists are split correctly.
645 *
646 * Strips, loops, and fans won't work. */
647 short_count = MIN2(count, 65532);
648
649 r300_emit_draw_elements(r300, indexBuffer, indexSize,
650 info->max_index,
651 info->mode, start, short_count, indices3);
652
653 start += short_count;
654 count -= short_count;
655
656 /* 15 dwords for emit_draw_elements */
657 if (count) {
658 if (!r300_prepare_for_rendering(r300,
659 PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS | PREP_INDEXED,
660 indexBuffer, 19, buffer_offset, info->index_bias,
661 instance_id))
662 goto done;
663 }
664 } while (count);
665 }
666
667 done:
668 if (indexBuffer != orgIndexBuffer) {
669 pipe_resource_reference( &indexBuffer, NULL );
670 }
671 }
672
673 static void r300_draw_arrays(struct r300_context *r300,
674 const struct pipe_draw_info *info,
675 int instance_id)
676 {
677 boolean alt_num_verts = r300->screen->caps.is_r500 &&
678 info->count > 65536;
679 unsigned start = info->start;
680 unsigned count = info->count;
681 unsigned short_count;
682
683 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
684 if (!r300_prepare_for_rendering(r300,
685 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS,
686 NULL, 9, start, 0, instance_id))
687 return;
688
689 if (alt_num_verts || count <= 65535) {
690 r300_emit_draw_arrays(r300, info->mode, count);
691 } else {
692 do {
693 /* The maximum must be divisible by 4 and 3,
694 * so that quad and triangle lists are split correctly.
695 *
696 * Strips, loops, and fans won't work. */
697 short_count = MIN2(count, 65532);
698 r300_emit_draw_arrays(r300, info->mode, short_count);
699
700 start += short_count;
701 count -= short_count;
702
703 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
704 if (count) {
705 if (!r300_prepare_for_rendering(r300,
706 PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS, NULL, 9,
707 start, 0, instance_id))
708 return;
709 }
710 } while (count);
711 }
712 }
713
714 static void r300_draw_arrays_instanced(struct r300_context *r300,
715 const struct pipe_draw_info *info)
716 {
717 int i;
718
719 for (i = 0; i < info->instance_count; i++)
720 r300_draw_arrays(r300, info, i);
721 }
722
723 static void r300_draw_elements_instanced(struct r300_context *r300,
724 const struct pipe_draw_info *info)
725 {
726 int i;
727
728 for (i = 0; i < info->instance_count; i++)
729 r300_draw_elements(r300, info, i);
730 }
731
732 static unsigned r300_max_vertex_count(struct r300_context *r300)
733 {
734 unsigned i, nr = r300->velems->count;
735 struct pipe_vertex_element *velems = r300->velems->velem;
736 unsigned result = ~0;
737
738 for (i = 0; i < nr; i++) {
739 struct pipe_vertex_buffer *vb =
740 &r300->vertex_buffer[velems[i].vertex_buffer_index];
741 unsigned size, max_count, value;
742
743 /* We're not interested in constant and per-instance attribs. */
744 if (!vb->buffer ||
745 !vb->stride ||
746 velems[i].instance_divisor) {
747 continue;
748 }
749
750 size = vb->buffer->width0;
751
752 /* Subtract buffer_offset. */
753 value = vb->buffer_offset;
754 if (value >= size) {
755 return 0;
756 }
757 size -= value;
758
759 /* Subtract src_offset. */
760 value = velems[i].src_offset;
761 if (value >= size) {
762 return 0;
763 }
764 size -= value;
765
766 /* Subtract format_size. */
767 value = r300->velems->format_size[i];
768 if (value >= size) {
769 return 0;
770 }
771 size -= value;
772
773 /* Compute the max count. */
774 max_count = 1 + size / vb->stride;
775 result = MIN2(result, max_count);
776 }
777 return result;
778 }
779
780
781 static void r300_draw_vbo(struct pipe_context* pipe,
782 const struct pipe_draw_info *dinfo)
783 {
784 struct r300_context* r300 = r300_context(pipe);
785 struct pipe_draw_info info = *dinfo;
786
787 info.indexed = info.indexed;
788
789 if (r300->skip_rendering ||
790 !u_trim_pipe_prim(info.mode, &info.count)) {
791 return;
792 }
793
794 r300_update_derived_state(r300);
795
796 /* Draw. */
797 if (info.indexed) {
798 unsigned max_count = r300_max_vertex_count(r300);
799
800 if (!max_count) {
801 fprintf(stderr, "r300: Skipping a draw command. There is a buffer "
802 " which is too small to be used for rendering.\n");
803 return;
804 }
805
806 if (max_count == ~0) {
807 /* There are no per-vertex vertex elements. Use the hardware maximum. */
808 max_count = 0xffffff;
809 }
810
811 info.max_index = max_count - 1;
812 info.start += r300->index_buffer.offset / r300->index_buffer.index_size;
813
814 if (info.instance_count <= 1) {
815 if (info.count <= 8 &&
816 r300->index_buffer.user_buffer) {
817 r300_draw_elements_immediate(r300, &info);
818 } else {
819 r300_draw_elements(r300, &info, -1);
820 }
821 } else {
822 r300_draw_elements_instanced(r300, &info);
823 }
824 } else {
825 if (info.instance_count <= 1) {
826 if (immd_is_good_idea(r300, info.count)) {
827 r300_draw_arrays_immediate(r300, &info);
828 } else {
829 r300_draw_arrays(r300, &info, -1);
830 }
831 } else {
832 r300_draw_arrays_instanced(r300, &info);
833 }
834 }
835 }
836
837 /****************************************************************************
838 * The rest of this file is for SW TCL rendering only. Please be polite and *
839 * keep these functions separated so that they are easier to locate. ~C. *
840 ***************************************************************************/
841
842 /* SW TCL elements, using Draw. */
843 static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
844 const struct pipe_draw_info *info)
845 {
846 struct r300_context* r300 = r300_context(pipe);
847
848 if (r300->skip_rendering) {
849 return;
850 }
851
852 r300_update_derived_state(r300);
853
854 draw_vbo(r300->draw, info);
855 draw_flush(r300->draw);
856 }
857
858 /* Object for rendering using Draw. */
859 struct r300_render {
860 /* Parent class */
861 struct vbuf_render base;
862
863 /* Pipe context */
864 struct r300_context* r300;
865
866 /* Vertex information */
867 size_t vertex_size;
868 unsigned prim;
869 unsigned hwprim;
870
871 /* VBO */
872 size_t vbo_max_used;
873 uint8_t *vbo_ptr;
874 };
875
876 static INLINE struct r300_render*
877 r300_render(struct vbuf_render* render)
878 {
879 return (struct r300_render*)render;
880 }
881
882 static const struct vertex_info*
883 r300_render_get_vertex_info(struct vbuf_render* render)
884 {
885 struct r300_render* r300render = r300_render(render);
886 struct r300_context* r300 = r300render->r300;
887
888 return &r300->vertex_info;
889 }
890
891 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
892 ushort vertex_size,
893 ushort count)
894 {
895 struct r300_render* r300render = r300_render(render);
896 struct r300_context* r300 = r300render->r300;
897 struct radeon_winsys *rws = r300->rws;
898 size_t size = (size_t)vertex_size * (size_t)count;
899
900 DBG(r300, DBG_DRAW, "r300: render_allocate_vertices (size: %d)\n", size);
901
902 if (!r300->vbo || size + r300->draw_vbo_offset > r300->vbo->size) {
903 pb_reference(&r300->vbo, NULL);
904 r300->vbo_cs = NULL;
905 r300render->vbo_ptr = NULL;
906
907 r300->vbo = rws->buffer_create(rws,
908 MAX2(R300_MAX_DRAW_VBO_SIZE, size),
909 R300_BUFFER_ALIGNMENT, TRUE,
910 RADEON_DOMAIN_GTT);
911 if (!r300->vbo) {
912 return FALSE;
913 }
914 r300->vbo_cs = rws->buffer_get_cs_handle(r300->vbo);
915 r300->draw_vbo_offset = 0;
916 r300render->vbo_ptr = rws->buffer_map(r300->vbo_cs, r300->cs,
917 PIPE_TRANSFER_WRITE);
918 }
919
920 r300render->vertex_size = vertex_size;
921 return TRUE;
922 }
923
924 static void* r300_render_map_vertices(struct vbuf_render* render)
925 {
926 struct r300_render* r300render = r300_render(render);
927 struct r300_context* r300 = r300render->r300;
928
929 DBG(r300, DBG_DRAW, "r300: render_map_vertices\n");
930
931 assert(r300render->vbo_ptr);
932 return r300render->vbo_ptr + r300->draw_vbo_offset;
933 }
934
935 static void r300_render_unmap_vertices(struct vbuf_render* render,
936 ushort min,
937 ushort max)
938 {
939 struct r300_render* r300render = r300_render(render);
940 struct r300_context* r300 = r300render->r300;
941
942 DBG(r300, DBG_DRAW, "r300: render_unmap_vertices\n");
943
944 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
945 r300render->vertex_size * (max + 1));
946 }
947
948 static void r300_render_release_vertices(struct vbuf_render* render)
949 {
950 struct r300_render* r300render = r300_render(render);
951 struct r300_context* r300 = r300render->r300;
952
953 DBG(r300, DBG_DRAW, "r300: render_release_vertices\n");
954
955 r300->draw_vbo_offset += r300render->vbo_max_used;
956 r300render->vbo_max_used = 0;
957 }
958
959 static void r300_render_set_primitive(struct vbuf_render* render,
960 unsigned prim)
961 {
962 struct r300_render* r300render = r300_render(render);
963
964 r300render->prim = prim;
965 r300render->hwprim = r300_translate_primitive(prim);
966 }
967
968 static void r300_render_draw_arrays(struct vbuf_render* render,
969 unsigned start,
970 unsigned count)
971 {
972 struct r300_render* r300render = r300_render(render);
973 struct r300_context* r300 = r300render->r300;
974 uint8_t* ptr;
975 unsigned i;
976 unsigned dwords = 6;
977
978 CS_LOCALS(r300);
979 (void) i; (void) ptr;
980
981 assert(start == 0);
982 assert(count < (1 << 16));
983
984 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count);
985
986 if (!r300_prepare_for_rendering(r300,
987 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL,
988 NULL, dwords, 0, 0, -1)) {
989 return;
990 }
991
992 BEGIN_CS(dwords);
993 OUT_CS_REG(R300_GA_COLOR_CONTROL,
994 r300_provoking_vertex_fixes(r300, r300render->prim));
995 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
996 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
997 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
998 r300render->hwprim);
999 END_CS;
1000 }
1001
1002 static void r300_render_draw_elements(struct vbuf_render* render,
1003 const ushort* indices,
1004 uint count)
1005 {
1006 struct r300_render* r300render = r300_render(render);
1007 struct r300_context* r300 = r300render->r300;
1008 struct radeon_winsys_cs *cs = r300->cs;
1009 unsigned end_cs_dwords;
1010 unsigned max_index = (r300->vbo->size - r300->draw_vbo_offset) /
1011 (r300render->r300->vertex_info.size * 4) - 1;
1012 unsigned short_count;
1013 unsigned free_dwords;
1014
1015 CS_LOCALS(r300);
1016 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count);
1017
1018 if (!r300_prepare_for_rendering(r300,
1019 PREP_EMIT_STATES |
1020 PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
1021 NULL, 256, 0, 0, -1)) {
1022 return;
1023 }
1024
1025 /* Below we manage the CS space manually because there may be more
1026 * indices than it can fit in CS. */
1027
1028 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1029
1030 while (count) {
1031 free_dwords =
1032 RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw - end_cs_dwords - 6;
1033
1034 short_count = MIN2(count, free_dwords * 2);
1035
1036 BEGIN_CS(6);
1037 OUT_CS_REG(R300_GA_COLOR_CONTROL,
1038 r300_provoking_vertex_fixes(r300, r300render->prim));
1039 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
1040 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2);
1041 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) |
1042 r300render->hwprim);
1043 END_CS;
1044
1045 memcpy(cs->buf+cs->cdw, indices, short_count * 2);
1046 cs->cdw += (short_count + 1) / 2;
1047
1048 /* OK now subtract the emitted indices and see if we need to emit
1049 * another draw packet. */
1050 indices += short_count;
1051 count -= short_count;
1052
1053 if (count) {
1054 if (!r300_prepare_for_rendering(r300,
1055 PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
1056 NULL, 256, 0, 0, -1))
1057 return;
1058
1059 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1060 }
1061 }
1062 }
1063
1064 static void r300_render_destroy(struct vbuf_render* render)
1065 {
1066 FREE(render);
1067 }
1068
1069 static struct vbuf_render* r300_render_create(struct r300_context* r300)
1070 {
1071 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
1072
1073 r300render->r300 = r300;
1074
1075 r300render->base.max_vertex_buffer_bytes = R300_MAX_DRAW_VBO_SIZE;
1076 r300render->base.max_indices = 16 * 1024;
1077
1078 r300render->base.get_vertex_info = r300_render_get_vertex_info;
1079 r300render->base.allocate_vertices = r300_render_allocate_vertices;
1080 r300render->base.map_vertices = r300_render_map_vertices;
1081 r300render->base.unmap_vertices = r300_render_unmap_vertices;
1082 r300render->base.set_primitive = r300_render_set_primitive;
1083 r300render->base.draw_elements = r300_render_draw_elements;
1084 r300render->base.draw_arrays = r300_render_draw_arrays;
1085 r300render->base.release_vertices = r300_render_release_vertices;
1086 r300render->base.destroy = r300_render_destroy;
1087
1088 return &r300render->base;
1089 }
1090
1091 struct draw_stage* r300_draw_stage(struct r300_context* r300)
1092 {
1093 struct vbuf_render* render;
1094 struct draw_stage* stage;
1095
1096 render = r300_render_create(r300);
1097
1098 if (!render) {
1099 return NULL;
1100 }
1101
1102 stage = draw_vbuf_stage(r300->draw, render);
1103
1104 if (!stage) {
1105 render->destroy(render);
1106 return NULL;
1107 }
1108
1109 draw_set_render(r300->draw, render);
1110
1111 return stage;
1112 }
1113
1114 /****************************************************************************
1115 * End of SW TCL functions *
1116 ***************************************************************************/
1117
1118 /* This functions is used to draw a rectangle for the blitter module.
1119 *
1120 * If we rendered a quad, the pixels on the main diagonal
1121 * would be computed and stored twice, which makes the clear/copy codepaths
1122 * somewhat inefficient. Instead we use a rectangular point sprite. */
1123 void r300_blitter_draw_rectangle(struct blitter_context *blitter,
1124 int x1, int y1, int x2, int y2,
1125 float depth,
1126 enum blitter_attrib_type type,
1127 const union pipe_color_union *attrib)
1128 {
1129 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter));
1130 unsigned last_sprite_coord_enable = r300->sprite_coord_enable;
1131 unsigned width = x2 - x1;
1132 unsigned height = y2 - y1;
1133 unsigned vertex_size =
1134 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4;
1135 unsigned dwords = 13 + vertex_size +
1136 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0);
1137 static const union pipe_color_union zeros;
1138 CS_LOCALS(r300);
1139
1140 if (r300->skip_rendering)
1141 return;
1142
1143 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD)
1144 r300->sprite_coord_enable = 1;
1145
1146 r300_update_derived_state(r300);
1147
1148 /* Mark some states we don't care about as non-dirty. */
1149 r300->viewport_state.dirty = FALSE;
1150
1151 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1))
1152 goto done;
1153
1154 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n");
1155
1156 BEGIN_CS(dwords);
1157 /* Set up GA. */
1158 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16));
1159
1160 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) {
1161 /* Set up the GA to generate texcoords. */
1162 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE |
1163 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT));
1164 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
1165 OUT_CS_32F(attrib->f[0]);
1166 OUT_CS_32F(attrib->f[3]);
1167 OUT_CS_32F(attrib->f[2]);
1168 OUT_CS_32F(attrib->f[1]);
1169 }
1170
1171 /* Set up VAP controls. */
1172 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
1173 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT);
1174 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
1175 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
1176 OUT_CS(1);
1177 OUT_CS(0);
1178
1179 /* Draw. */
1180 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size);
1181 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) |
1182 R300_VAP_VF_CNTL__PRIM_POINTS);
1183
1184 OUT_CS_32F(x1 + width * 0.5f);
1185 OUT_CS_32F(y1 + height * 0.5f);
1186 OUT_CS_32F(depth);
1187 OUT_CS_32F(1);
1188
1189 if (vertex_size == 8) {
1190 if (!attrib)
1191 attrib = &zeros;
1192 OUT_CS_TABLE(attrib->f, 4);
1193 }
1194 END_CS;
1195
1196 done:
1197 /* Restore the state. */
1198 r300_mark_atom_dirty(r300, &r300->rs_state);
1199 r300_mark_atom_dirty(r300, &r300->viewport_state);
1200
1201 r300->sprite_coord_enable = last_sprite_coord_enable;
1202 }
1203
1204 #if 0
1205 static void r300_resource_resolve(struct pipe_context *pipe,
1206 const struct pipe_resolve_info *info)
1207 {
1208 struct r300_context *r300 = r300_context(pipe);
1209 struct pipe_surface *srcsurf, *dstsurf, surf_tmpl;
1210 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
1211 static const union pipe_color_union color;
1212
1213 assert(0 && "Resource resolve is unsupported, invalid call.");
1214
1215 memset(&surf_tmpl, 0, sizeof(surf_tmpl));
1216 surf_tmpl.format = info->src.res->format;
1217 surf_tmpl.u.tex.first_layer =
1218 surf_tmpl.u.tex.last_layer = info->src.layer;
1219 srcsurf = pipe->create_surface(pipe, info->src.res, &surf_tmpl);
1220 /* XXX Offset both surfaces by x0,y1. */
1221
1222 surf_tmpl.format = info->dst.res->format;
1223 surf_tmpl.u.tex.level = info->dst.level;
1224 surf_tmpl.u.tex.first_layer =
1225 surf_tmpl.u.tex.last_layer = info->dst.layer;
1226 dstsurf = pipe->create_surface(pipe, info->dst.res, &surf_tmpl);
1227
1228 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n");
1229
1230 /* Enable AA resolve. */
1231 aa->dest = r300_surface(dstsurf);
1232 aa->aaresolve_ctl =
1233 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE |
1234 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE;
1235 r300->aa_state.size = 10;
1236 r300_mark_atom_dirty(r300, &r300->aa_state);
1237
1238 /* Resolve the surface. */
1239 /* XXX: y1 < 0 ==> Y flip */
1240 r300->context.clear_render_target(pipe,
1241 srcsurf, &color, 0, 0,
1242 info->dst.x1 - info->dst.x0,
1243 info->dst.y1 - info->dst.y0);
1244
1245 /* Disable AA resolve. */
1246 aa->dest = NULL;
1247 aa->aaresolve_ctl = 0;
1248 r300->aa_state.size = 4;
1249 r300_mark_atom_dirty(r300, &r300->aa_state);
1250
1251 pipe_surface_reference(&srcsurf, NULL);
1252 pipe_surface_reference(&dstsurf, NULL);
1253 }
1254 #endif
1255
1256 void r300_init_render_functions(struct r300_context *r300)
1257 {
1258 /* Set draw functions based on presence of HW TCL. */
1259 if (r300->screen->caps.has_tcl) {
1260 r300->context.draw_vbo = r300_draw_vbo;
1261 } else {
1262 r300->context.draw_vbo = r300_swtcl_draw_vbo;
1263 }
1264
1265 /* Plug in the two-sided stencil reference value fallback if needed. */
1266 if (!r300->screen->caps.is_r500)
1267 r300_plug_in_stencil_ref_fallback(r300);
1268 }