r300g: fix SWTCL
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_render: Vertex and index buffer primitive emission. Contains both
25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
26
27 #include "draw/draw_context.h"
28 #include "draw/draw_vbuf.h"
29
30 #include "util/u_inlines.h"
31
32 #include "util/u_format.h"
33 #include "util/u_memory.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36
37 #include "r300_cs.h"
38 #include "r300_context.h"
39 #include "r300_screen_buffer.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42 #include "r300_state_derived.h"
43
44 #include <limits.h>
45
46 #define IMMD_DWORDS 32
47
48 static uint32_t r300_translate_primitive(unsigned prim)
49 {
50 switch (prim) {
51 case PIPE_PRIM_POINTS:
52 return R300_VAP_VF_CNTL__PRIM_POINTS;
53 case PIPE_PRIM_LINES:
54 return R300_VAP_VF_CNTL__PRIM_LINES;
55 case PIPE_PRIM_LINE_LOOP:
56 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
57 case PIPE_PRIM_LINE_STRIP:
58 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
59 case PIPE_PRIM_TRIANGLES:
60 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
61 case PIPE_PRIM_TRIANGLE_STRIP:
62 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
63 case PIPE_PRIM_TRIANGLE_FAN:
64 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
65 case PIPE_PRIM_QUADS:
66 return R300_VAP_VF_CNTL__PRIM_QUADS;
67 case PIPE_PRIM_QUAD_STRIP:
68 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
69 case PIPE_PRIM_POLYGON:
70 return R300_VAP_VF_CNTL__PRIM_POLYGON;
71 default:
72 return 0;
73 }
74 }
75
76 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
77 unsigned mode)
78 {
79 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
80 uint32_t color_control = rs->color_control;
81
82 /* By default (see r300_state.c:r300_create_rs_state) color_control is
83 * initialized to provoking the first vertex.
84 *
85 * Triangle fans must be reduced to the second vertex, not the first, in
86 * Gallium flatshade-first mode, as per the GL spec.
87 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
88 *
89 * Quads never provoke correctly in flatshade-first mode. The first
90 * vertex is never considered as provoking, so only the second, third,
91 * and fourth vertices can be selected, and both "third" and "last" modes
92 * select the fourth vertex. This is probably due to D3D lacking quads.
93 *
94 * Similarly, polygons reduce to the first, not the last, vertex, when in
95 * "last" mode, and all other modes start from the second vertex.
96 *
97 * ~ C.
98 */
99
100 if (rs->rs.flatshade_first) {
101 switch (mode) {
102 case PIPE_PRIM_TRIANGLE_FAN:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
104 break;
105 case PIPE_PRIM_QUADS:
106 case PIPE_PRIM_QUAD_STRIP:
107 case PIPE_PRIM_POLYGON:
108 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
109 break;
110 default:
111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
112 break;
113 }
114 } else {
115 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
116 }
117
118 return color_control;
119 }
120
121 boolean r500_index_bias_supported(struct r300_context *r300)
122 {
123 return r300->screen->caps.is_r500 &&
124 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
125 }
126
127 void r500_emit_index_bias(struct r300_context *r300, int index_bias)
128 {
129 CS_LOCALS(r300);
130
131 BEGIN_CS(2);
132 OUT_CS_REG(R500_VAP_INDEX_OFFSET,
133 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));
134 END_CS;
135 }
136
137 /* This function splits the index bias value into two parts:
138 * - buffer_offset: the value that can be safely added to buffer offsets
139 * in r300_emit_aos (it must yield a positive offset when added to
140 * a vertex buffer offset)
141 * - index_offset: the value that must be manually subtracted from indices
142 * in an index buffer to achieve negative offsets. */
143 static void r300_split_index_bias(struct r300_context *r300, int index_bias,
144 int *buffer_offset, int *index_offset)
145 {
146 struct pipe_vertex_buffer *vb, *vbufs = r300->vertex_buffer;
147 struct pipe_vertex_element *velem = r300->velems->velem;
148 unsigned i, size;
149 int max_neg_bias;
150
151 if (index_bias < 0) {
152 /* See how large index bias we may subtract. We must be careful
153 * here because negative buffer offsets are not allowed
154 * by the DRM API. */
155 max_neg_bias = INT_MAX;
156 for (i = 0; i < r300->velems->count; i++) {
157 vb = &vbufs[velem[i].vertex_buffer_index];
158 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride;
159 max_neg_bias = MIN2(max_neg_bias, size);
160 }
161
162 /* Now set the minimum allowed value. */
163 *buffer_offset = MAX2(-max_neg_bias, index_bias);
164 } else {
165 /* A positive index bias is OK. */
166 *buffer_offset = index_bias;
167 }
168
169 *index_offset = index_bias - *buffer_offset;
170 }
171
172 enum r300_prepare_flags {
173 PREP_FIRST_DRAW = (1 << 0), /* call emit_dirty_state and friends? */
174 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */
175 PREP_EMIT_AOS = (1 << 2), /* call emit_aos? */
176 PREP_EMIT_AOS_SWTCL = (1 << 3), /* call emit_aos_swtcl? */
177 PREP_INDEXED = (1 << 4) /* is this draw_elements? */
178 };
179
180 /**
181 * Check if the requested number of dwords is available in the CS and
182 * if not, flush.
183 * \param r300 The context.
184 * \param flags See r300_prepare_flags.
185 * \param cs_dwords The number of dwords to reserve in CS.
186 * \return TRUE if the CS was flushed
187 */
188 static boolean r300_reserve_cs_dwords(struct r300_context *r300,
189 enum r300_prepare_flags flags,
190 unsigned cs_dwords)
191 {
192 boolean flushed = FALSE;
193 boolean first_draw = flags & PREP_FIRST_DRAW;
194 boolean emit_aos = flags & PREP_EMIT_AOS;
195 boolean emit_aos_swtcl = flags & PREP_EMIT_AOS_SWTCL;
196 boolean hw_index_bias = r500_index_bias_supported(r300);
197
198 /* Add dirty state, index offset, and AOS. */
199 if (first_draw) {
200 cs_dwords += r300_get_num_dirty_dwords(r300);
201
202 if (hw_index_bias)
203 cs_dwords += 2; /* emit_index_offset */
204
205 if (emit_aos)
206 cs_dwords += 55; /* emit_aos */
207
208 if (emit_aos_swtcl)
209 cs_dwords += 7; /* emit_aos_swtcl */
210 }
211
212 cs_dwords += r300_get_num_cs_end_dwords(r300);
213
214 /* Reserve requested CS space. */
215 if (cs_dwords > (r300->cs->ndw - r300->cs->cdw)) {
216 r300->context.flush(&r300->context, 0, NULL);
217 flushed = TRUE;
218 }
219
220 return flushed;
221 }
222
223 /**
224 * Validate buffers and emit dirty state.
225 * \param r300 The context.
226 * \param flags See r300_prepare_flags.
227 * \param index_buffer The index buffer to validate. The parameter may be NULL.
228 * \param aos_offset The offset passed to emit_aos.
229 * \param index_bias The index bias to emit.
230 * \return TRUE if rendering should be skipped
231 */
232 static boolean r300_emit_states(struct r300_context *r300,
233 enum r300_prepare_flags flags,
234 struct pipe_resource *index_buffer,
235 int aos_offset,
236 int index_bias)
237 {
238 boolean first_draw = flags & PREP_FIRST_DRAW;
239 boolean emit_aos = flags & PREP_EMIT_AOS;
240 boolean emit_aos_swtcl = flags & PREP_EMIT_AOS_SWTCL;
241 boolean indexed = flags & PREP_INDEXED;
242 boolean hw_index_bias = r500_index_bias_supported(r300);
243
244 /* Validate buffers and emit dirty state if needed. */
245 if (first_draw) {
246 if (!r300_emit_buffer_validate(r300, flags & PREP_VALIDATE_VBOS,
247 index_buffer)) {
248 fprintf(stderr, "r300: CS space validation failed. "
249 "(not enough memory?) Skipping rendering.\n");
250 return FALSE;
251 }
252
253 r300_emit_dirty_state(r300);
254 if (hw_index_bias) {
255 if (r300->screen->caps.has_tcl)
256 r500_emit_index_bias(r300, index_bias);
257 else
258 r500_emit_index_bias(r300, 0);
259 }
260
261 if (emit_aos)
262 r300_emit_aos(r300, aos_offset, indexed);
263
264 if (emit_aos_swtcl)
265 r300_emit_aos_swtcl(r300, indexed);
266 }
267
268 return TRUE;
269 }
270
271 /**
272 * Check if the requested number of dwords is available in the CS and
273 * if not, flush. Then validate buffers and emit dirty state.
274 * \param r300 The context.
275 * \param flags See r300_prepare_flags.
276 * \param index_buffer The index buffer to validate. The parameter may be NULL.
277 * \param cs_dwords The number of dwords to reserve in CS.
278 * \param aos_offset The offset passed to emit_aos.
279 * \param index_bias The index bias to emit.
280 * \return TRUE if rendering should be skipped
281 */
282 static boolean r300_prepare_for_rendering(struct r300_context *r300,
283 enum r300_prepare_flags flags,
284 struct pipe_resource *index_buffer,
285 unsigned cs_dwords,
286 int aos_offset,
287 int index_bias)
288 {
289 if (r300_reserve_cs_dwords(r300, flags, cs_dwords))
290 flags |= PREP_FIRST_DRAW;
291
292 return r300_emit_states(r300, flags, index_buffer, aos_offset, index_bias);
293 }
294
295 static boolean immd_is_good_idea(struct r300_context *r300,
296 unsigned count)
297 {
298 struct pipe_vertex_element* velem;
299 struct pipe_vertex_buffer* vbuf;
300 boolean checked[PIPE_MAX_ATTRIBS] = {0};
301 unsigned vertex_element_count = r300->velems->count;
302 unsigned i, vbi;
303
304 if (DBG_ON(r300, DBG_NO_IMMD)) {
305 return FALSE;
306 }
307
308 if (r300->draw) {
309 return FALSE;
310 }
311
312 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) {
313 return FALSE;
314 }
315
316 /* We shouldn't map buffers referenced by CS, busy buffers,
317 * and ones placed in VRAM. */
318 for (i = 0; i < vertex_element_count; i++) {
319 velem = &r300->velems->velem[i];
320 vbi = velem->vertex_buffer_index;
321
322 if (!checked[vbi]) {
323 vbuf = &r300->vertex_buffer[vbi];
324
325 if (!(r300_buffer(vbuf->buffer)->domain & R300_DOMAIN_GTT)) {
326 return FALSE;
327 }
328
329 if (r300_buffer_is_referenced(&r300->context,
330 vbuf->buffer,
331 R300_REF_CS | R300_REF_HW)) {
332 /* It's a very bad idea to map it... */
333 return FALSE;
334 }
335 checked[vbi] = TRUE;
336 }
337 }
338 return TRUE;
339 }
340
341 /*****************************************************************************
342 * The HWTCL draw functions. *
343 ****************************************************************************/
344
345 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
346 unsigned mode,
347 unsigned start,
348 unsigned count)
349 {
350 struct pipe_vertex_element* velem;
351 struct pipe_vertex_buffer* vbuf;
352 unsigned vertex_element_count = r300->velems->count;
353 unsigned i, v, vbi;
354
355 /* Size of the vertex, in dwords. */
356 unsigned vertex_size = r300->velems->vertex_size_dwords;
357
358 /* The number of dwords for this draw operation. */
359 unsigned dwords = 9 + count * vertex_size;
360
361 /* Size of the vertex element, in dwords. */
362 unsigned size[PIPE_MAX_ATTRIBS];
363
364 /* Stride to the same attrib in the next vertex in the vertex buffer,
365 * in dwords. */
366 unsigned stride[PIPE_MAX_ATTRIBS];
367
368 /* Mapped vertex buffers. */
369 uint32_t* map[PIPE_MAX_ATTRIBS];
370 uint32_t* mapelem[PIPE_MAX_ATTRIBS];
371 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {0};
372
373 CS_LOCALS(r300);
374
375 if (!r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0))
376 return;
377
378 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
379 for (i = 0; i < vertex_element_count; i++) {
380 velem = &r300->velems->velem[i];
381 size[i] = r300->velems->hw_format_size[i] / 4;
382 vbi = velem->vertex_buffer_index;
383 vbuf = &r300->vertex_buffer[vbi];
384 stride[i] = vbuf->stride / 4;
385
386 /* Map the buffer. */
387 if (!transfer[vbi]) {
388 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context,
389 vbuf->buffer,
390 PIPE_TRANSFER_READ,
391 &transfer[vbi]);
392 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * start;
393 }
394 mapelem[i] = map[vbi] + (velem->src_offset / 4);
395 }
396
397 BEGIN_CS(dwords);
398 OUT_CS_REG(R300_GA_COLOR_CONTROL,
399 r300_provoking_vertex_fixes(r300, mode));
400 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
401 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
402 OUT_CS(count - 1);
403 OUT_CS(0);
404 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
405 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
406 r300_translate_primitive(mode));
407
408 /* Emit vertices. */
409 for (v = 0; v < count; v++) {
410 for (i = 0; i < vertex_element_count; i++) {
411 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]);
412 }
413 }
414 END_CS;
415
416 /* Unmap buffers. */
417 for (i = 0; i < vertex_element_count; i++) {
418 vbi = r300->velems->velem[i].vertex_buffer_index;
419
420 if (transfer[vbi]) {
421 vbuf = &r300->vertex_buffer[vbi];
422 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]);
423 transfer[vbi] = NULL;
424 }
425 }
426 }
427
428 static void r300_emit_draw_arrays(struct r300_context *r300,
429 unsigned mode,
430 unsigned count)
431 {
432 boolean alt_num_verts = count > 65535;
433 CS_LOCALS(r300);
434
435 if (count >= (1 << 24)) {
436 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
437 "refusing to render.\n", count);
438 return;
439 }
440
441 BEGIN_CS(7 + (alt_num_verts ? 2 : 0));
442 if (alt_num_verts) {
443 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
444 }
445 OUT_CS_REG(R300_GA_COLOR_CONTROL,
446 r300_provoking_vertex_fixes(r300, mode));
447 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
448 OUT_CS(count - 1);
449 OUT_CS(0);
450 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
451 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
452 r300_translate_primitive(mode) |
453 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
454 END_CS;
455 }
456
457 static void r300_emit_draw_elements(struct r300_context *r300,
458 struct pipe_resource* indexBuffer,
459 unsigned indexSize,
460 unsigned minIndex,
461 unsigned maxIndex,
462 unsigned mode,
463 unsigned start,
464 unsigned count)
465 {
466 uint32_t count_dwords;
467 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
468 boolean alt_num_verts = count > 65535;
469 CS_LOCALS(r300);
470
471 if (count >= (1 << 24)) {
472 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
473 "refusing to render.\n", count);
474 return;
475 }
476
477 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
478
479 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
480 count, minIndex, maxIndex);
481
482 BEGIN_CS(13 + (alt_num_verts ? 2 : 0));
483 if (alt_num_verts) {
484 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
485 }
486 OUT_CS_REG(R300_GA_COLOR_CONTROL,
487 r300_provoking_vertex_fixes(r300, mode));
488 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
489 OUT_CS(maxIndex);
490 OUT_CS(minIndex);
491 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
492 if (indexSize == 4) {
493 count_dwords = count;
494 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
495 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
496 r300_translate_primitive(mode) |
497 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
498 } else {
499 count_dwords = (count + 1) / 2;
500 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
501 r300_translate_primitive(mode) |
502 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
503 }
504
505 /* INDX_BUFFER is a truly special packet3.
506 * Unlike most other packet3, where the offset is after the count,
507 * the order is reversed, so the relocation ends up carrying the
508 * size of the indexbuf instead of the offset.
509 */
510 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
511 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
512 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
513 OUT_CS(offset_dwords << 2);
514 OUT_CS_BUF_RELOC(indexBuffer, count_dwords,
515 r300_buffer(indexBuffer)->domain, 0);
516
517 END_CS;
518 }
519
520 /* This is the fast-path drawing & emission for HW TCL. */
521 static void r300_draw_range_elements(struct pipe_context* pipe,
522 struct pipe_resource* indexBuffer,
523 unsigned indexSize,
524 int indexBias,
525 unsigned minIndex,
526 unsigned maxIndex,
527 unsigned mode,
528 unsigned start,
529 unsigned count)
530 {
531 struct r300_context* r300 = r300_context(pipe);
532 struct pipe_resource* orgIndexBuffer = indexBuffer;
533 boolean alt_num_verts = r300->screen->caps.is_r500 &&
534 count > 65536 &&
535 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
536 unsigned short_count;
537 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */
538 boolean translate = FALSE;
539 unsigned new_offset;
540
541 if (r300->skip_rendering) {
542 return;
543 }
544
545 if (!u_trim_pipe_prim(mode, &count)) {
546 return;
547 }
548
549 /* Index buffer range checking. */
550 if ((start + count) * indexSize > indexBuffer->width0) {
551 fprintf(stderr, "r300: Invalid index buffer range. Skipping rendering.\n");
552 return;
553 }
554
555 /* Set up fallback for incompatible vertex layout if needed. */
556 if (r300->incompatible_vb_layout || r300->velems->incompatible_layout) {
557 r300_begin_vertex_translate(r300);
558 translate = TRUE;
559 }
560
561 if (indexBias && !r500_index_bias_supported(r300)) {
562 r300_split_index_bias(r300, indexBias, &buffer_offset, &index_offset);
563 }
564
565 r300_translate_index_buffer(r300, &indexBuffer, &indexSize, index_offset,
566 &start, count);
567
568 r300_update_derived_state(r300);
569 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count, &new_offset);
570
571 start = new_offset;
572
573 /* 15 dwords for emit_draw_elements. Give up if the function fails. */
574 if (!r300_prepare_for_rendering(r300,
575 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS |
576 PREP_INDEXED, indexBuffer, 15, buffer_offset, indexBias))
577 goto done;
578
579 if (alt_num_verts || count <= 65535) {
580 r300_emit_draw_elements(r300, indexBuffer, indexSize,
581 minIndex, maxIndex, mode, start, count);
582 } else {
583 do {
584 short_count = MIN2(count, 65534);
585 r300_emit_draw_elements(r300, indexBuffer, indexSize,
586 minIndex, maxIndex,
587 mode, start, short_count);
588
589 start += short_count;
590 count -= short_count;
591
592 /* 15 dwords for emit_draw_elements */
593 if (count) {
594 if (!r300_prepare_for_rendering(r300,
595 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED,
596 indexBuffer, 15, buffer_offset, indexBias))
597 goto done;
598 }
599 } while (count);
600 }
601
602 done:
603 if (indexBuffer != orgIndexBuffer) {
604 pipe_resource_reference( &indexBuffer, NULL );
605 }
606
607 if (translate) {
608 r300_end_vertex_translate(r300);
609 }
610 }
611
612 static void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
613 unsigned start, unsigned count)
614 {
615 struct r300_context* r300 = r300_context(pipe);
616 boolean alt_num_verts = r300->screen->caps.is_r500 &&
617 count > 65536 &&
618 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
619 unsigned short_count;
620 boolean translate = FALSE;
621
622 if (r300->skip_rendering) {
623 return;
624 }
625
626 if (!u_trim_pipe_prim(mode, &count)) {
627 return;
628 }
629
630 /* Set up fallback for incompatible vertex layout if needed. */
631 if (r300->incompatible_vb_layout || r300->velems->incompatible_layout) {
632 r300_begin_vertex_translate(r300);
633 translate = TRUE;
634 }
635
636 r300_update_derived_state(r300);
637
638 if (immd_is_good_idea(r300, count)) {
639 r300_emit_draw_arrays_immediate(r300, mode, start, count);
640 } else {
641 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
642 if (!r300_prepare_for_rendering(r300,
643 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS,
644 NULL, 9, start, 0))
645 goto done;
646
647 if (alt_num_verts || count <= 65535) {
648 r300_emit_draw_arrays(r300, mode, count);
649 } else {
650 do {
651 short_count = MIN2(count, 65535);
652 r300_emit_draw_arrays(r300, mode, short_count);
653
654 start += short_count;
655 count -= short_count;
656
657 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
658 if (count) {
659 if (!r300_prepare_for_rendering(r300,
660 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9,
661 start, 0))
662 goto done;
663 }
664 } while (count);
665 }
666 }
667
668 done:
669 if (translate) {
670 r300_end_vertex_translate(r300);
671 }
672 }
673
674 static void r300_draw_vbo(struct pipe_context* pipe,
675 const struct pipe_draw_info *info)
676 {
677 struct r300_context* r300 = r300_context(pipe);
678
679 if (!r300->velems->count || !r300->vertex_buffer_count)
680 return;
681
682 if (info->indexed && r300->index_buffer.buffer) {
683 unsigned offset;
684
685 assert(r300->index_buffer.offset % r300->index_buffer.index_size == 0);
686 offset = r300->index_buffer.offset / r300->index_buffer.index_size;
687
688 r300_draw_range_elements(pipe,
689 r300->index_buffer.buffer,
690 r300->index_buffer.index_size,
691 info->index_bias,
692 info->min_index,
693 info->max_index,
694 info->mode,
695 info->start + offset,
696 info->count);
697 }
698 else {
699 r300_draw_arrays(pipe,
700 info->mode,
701 info->start,
702 info->count);
703 }
704 }
705
706 /****************************************************************************
707 * The rest of this file is for SW TCL rendering only. Please be polite and *
708 * keep these functions separated so that they are easier to locate. ~C. *
709 ***************************************************************************/
710
711 /* SW TCL elements, using Draw. */
712 static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
713 const struct pipe_draw_info *info)
714 {
715 struct r300_context* r300 = r300_context(pipe);
716 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
717 struct pipe_transfer *ib_transfer = NULL;
718 unsigned count = info->count;
719 int i;
720 void *indices = NULL;
721 boolean indexed = info->indexed && r300->index_buffer.buffer;
722
723 if (r300->skip_rendering) {
724 return;
725 }
726
727 if (!u_trim_pipe_prim(info->mode, &count)) {
728 return;
729 }
730
731 r300_update_derived_state(r300);
732
733 r300_reserve_cs_dwords(r300,
734 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL |
735 (indexed ? PREP_INDEXED : 0),
736 indexed ? 256 : 6);
737
738 for (i = 0; i < r300->vertex_buffer_count; i++) {
739 if (r300->vertex_buffer[i].buffer) {
740 void *buf = pipe_buffer_map(pipe,
741 r300->vertex_buffer[i].buffer,
742 PIPE_TRANSFER_READ,
743 &vb_transfer[i]);
744 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
745 }
746 }
747
748 if (indexed) {
749 indices = pipe_buffer_map(pipe, r300->index_buffer.buffer,
750 PIPE_TRANSFER_READ, &ib_transfer);
751 }
752
753 draw_set_mapped_index_buffer(r300->draw, indices);
754
755 r300->draw_vbo_locked = TRUE;
756 draw_vbo(r300->draw, info);
757 r300->draw_vbo_locked = FALSE;
758
759 /* XXX Not sure whether this is the best fix.
760 * It prevents CS from being rejected and weird assertion failures. */
761 draw_flush(r300->draw);
762
763 for (i = 0; i < r300->vertex_buffer_count; i++) {
764 if (r300->vertex_buffer[i].buffer) {
765 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
766 vb_transfer[i]);
767 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
768 }
769 }
770
771 if (indexed) {
772 pipe_buffer_unmap(pipe, r300->index_buffer.buffer, ib_transfer);
773 draw_set_mapped_index_buffer(r300->draw, NULL);
774 }
775 }
776
777 /* Object for rendering using Draw. */
778 struct r300_render {
779 /* Parent class */
780 struct vbuf_render base;
781
782 /* Pipe context */
783 struct r300_context* r300;
784
785 /* Vertex information */
786 size_t vertex_size;
787 unsigned prim;
788 unsigned hwprim;
789
790 /* VBO */
791 size_t vbo_max_used;
792 void * vbo_ptr;
793
794 struct pipe_transfer *vbo_transfer;
795 };
796
797 static INLINE struct r300_render*
798 r300_render(struct vbuf_render* render)
799 {
800 return (struct r300_render*)render;
801 }
802
803 static const struct vertex_info*
804 r300_render_get_vertex_info(struct vbuf_render* render)
805 {
806 struct r300_render* r300render = r300_render(render);
807 struct r300_context* r300 = r300render->r300;
808
809 return &r300->vertex_info;
810 }
811
812 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
813 ushort vertex_size,
814 ushort count)
815 {
816 struct r300_render* r300render = r300_render(render);
817 struct r300_context* r300 = r300render->r300;
818 struct pipe_screen* screen = r300->context.screen;
819 size_t size = (size_t)vertex_size * (size_t)count;
820
821 DBG(r300, DBG_DRAW, "r300: render_allocate_vertices (size: %d)\n", size);
822
823 if (size + r300->draw_vbo_offset > r300->draw_vbo_size)
824 {
825 pipe_resource_reference(&r300->vbo, NULL);
826 r300->vbo = pipe_buffer_create(screen,
827 PIPE_BIND_VERTEX_BUFFER,
828 R300_MAX_DRAW_VBO_SIZE);
829 r300->draw_vbo_offset = 0;
830 r300->draw_vbo_size = R300_MAX_DRAW_VBO_SIZE;
831 }
832
833 r300render->vertex_size = vertex_size;
834
835 return (r300->vbo) ? TRUE : FALSE;
836 }
837
838 static void* r300_render_map_vertices(struct vbuf_render* render)
839 {
840 struct r300_render* r300render = r300_render(render);
841 struct r300_context* r300 = r300render->r300;
842
843 assert(!r300render->vbo_transfer);
844
845 DBG(r300, DBG_DRAW, "r300: render_map_vertices\n");
846
847 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
848 r300->vbo,
849 PIPE_TRANSFER_WRITE,
850 &r300render->vbo_transfer);
851
852 assert(r300render->vbo_ptr);
853
854 return ((uint8_t*)r300render->vbo_ptr + r300->draw_vbo_offset);
855 }
856
857 static void r300_render_unmap_vertices(struct vbuf_render* render,
858 ushort min,
859 ushort max)
860 {
861 struct r300_render* r300render = r300_render(render);
862 struct pipe_context* context = &r300render->r300->context;
863 struct r300_context* r300 = r300render->r300;
864
865 assert(r300render->vbo_transfer);
866
867 DBG(r300, DBG_DRAW, "r300: render_unmap_vertices\n");
868
869 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
870 r300render->vertex_size * (max + 1));
871 pipe_buffer_unmap(context, r300->vbo, r300render->vbo_transfer);
872
873 r300render->vbo_transfer = NULL;
874 }
875
876 static void r300_render_release_vertices(struct vbuf_render* render)
877 {
878 struct r300_render* r300render = r300_render(render);
879 struct r300_context* r300 = r300render->r300;
880
881 DBG(r300, DBG_DRAW, "r300: render_release_vertices\n");
882
883 r300->draw_vbo_offset += r300render->vbo_max_used;
884 r300render->vbo_max_used = 0;
885 }
886
887 static boolean r300_render_set_primitive(struct vbuf_render* render,
888 unsigned prim)
889 {
890 struct r300_render* r300render = r300_render(render);
891
892 r300render->prim = prim;
893 r300render->hwprim = r300_translate_primitive(prim);
894
895 return TRUE;
896 }
897
898 static void r300_render_draw_arrays(struct vbuf_render* render,
899 unsigned start,
900 unsigned count)
901 {
902 struct r300_render* r300render = r300_render(render);
903 struct r300_context* r300 = r300render->r300;
904 uint8_t* ptr;
905 unsigned i;
906 unsigned dwords = 6;
907
908 CS_LOCALS(r300);
909 (void) i; (void) ptr;
910
911 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count);
912
913 if (!r300_emit_states(r300,
914 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL,
915 NULL, 0, 0))
916 return;
917
918 /* Uncomment to dump all VBOs rendered through this interface.
919 * Slow and noisy!
920 ptr = pipe_buffer_map(&r300render->r300->context,
921 r300render->vbo, PIPE_TRANSFER_READ,
922 &r300render->vbo_transfer);
923
924 for (i = 0; i < count; i++) {
925 printf("r300: Vertex %d\n", i);
926 draw_dump_emitted_vertex(&r300->vertex_info, ptr);
927 ptr += r300->vertex_info.size * 4;
928 printf("\n");
929 }
930
931 pipe_buffer_unmap(&r300render->r300->context, r300render->vbo,
932 r300render->vbo_transfer);
933 */
934
935 BEGIN_CS(dwords);
936 OUT_CS_REG(R300_GA_COLOR_CONTROL,
937 r300_provoking_vertex_fixes(r300, r300render->prim));
938 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
939 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
940 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
941 r300render->hwprim);
942 END_CS;
943 }
944
945 static void r300_render_draw_elements(struct vbuf_render* render,
946 const ushort* indices,
947 uint count)
948 {
949 struct r300_render* r300render = r300_render(render);
950 struct r300_context* r300 = r300render->r300;
951 int i;
952 unsigned end_cs_dwords;
953 unsigned max_index = (r300->draw_vbo_size - r300->draw_vbo_offset) /
954 (r300render->r300->vertex_info.size * 4) - 1;
955 unsigned short_count;
956 unsigned free_dwords;
957
958 CS_LOCALS(r300);
959 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count);
960
961 if (!r300_emit_states(r300,
962 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
963 NULL, 0, 0))
964 return;
965
966 /* Below we manage the CS space manually because there may be more
967 * indices than it can fit in CS. */
968
969 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
970
971 while (count) {
972 free_dwords = r300->cs->ndw - r300->cs->cdw;
973
974 short_count = MIN2(count, (free_dwords - end_cs_dwords - 6) * 2);
975
976 BEGIN_CS(6 + (short_count+1)/2);
977 OUT_CS_REG(R300_GA_COLOR_CONTROL,
978 r300_provoking_vertex_fixes(r300, r300render->prim));
979 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
980 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2);
981 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) |
982 r300render->hwprim);
983 for (i = 0; i < short_count-1; i += 2) {
984 OUT_CS(indices[i+1] << 16 | indices[i]);
985 }
986 if (short_count % 2) {
987 OUT_CS(indices[short_count-1]);
988 }
989 END_CS;
990
991 /* OK now subtract the emitted indices and see if we need to emit
992 * another draw packet. */
993 indices += short_count;
994 count -= short_count;
995
996 if (count) {
997 if (!r300_prepare_for_rendering(r300,
998 PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
999 NULL, 256, 0, 0))
1000 return;
1001
1002 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1003 }
1004 }
1005 }
1006
1007 static void r300_render_destroy(struct vbuf_render* render)
1008 {
1009 FREE(render);
1010 }
1011
1012 static struct vbuf_render* r300_render_create(struct r300_context* r300)
1013 {
1014 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
1015
1016 r300render->r300 = r300;
1017
1018 /* XXX find real numbers plz */
1019 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
1020 r300render->base.max_indices = 16 * 1024;
1021
1022 r300render->base.get_vertex_info = r300_render_get_vertex_info;
1023 r300render->base.allocate_vertices = r300_render_allocate_vertices;
1024 r300render->base.map_vertices = r300_render_map_vertices;
1025 r300render->base.unmap_vertices = r300_render_unmap_vertices;
1026 r300render->base.set_primitive = r300_render_set_primitive;
1027 r300render->base.draw_elements = r300_render_draw_elements;
1028 r300render->base.draw_arrays = r300_render_draw_arrays;
1029 r300render->base.release_vertices = r300_render_release_vertices;
1030 r300render->base.destroy = r300_render_destroy;
1031
1032 return &r300render->base;
1033 }
1034
1035 struct draw_stage* r300_draw_stage(struct r300_context* r300)
1036 {
1037 struct vbuf_render* render;
1038 struct draw_stage* stage;
1039
1040 render = r300_render_create(r300);
1041
1042 if (!render) {
1043 return NULL;
1044 }
1045
1046 stage = draw_vbuf_stage(r300->draw, render);
1047
1048 if (!stage) {
1049 render->destroy(render);
1050 return NULL;
1051 }
1052
1053 draw_set_render(r300->draw, render);
1054
1055 return stage;
1056 }
1057
1058 void r300_draw_flush_vbuf(struct r300_context *r300)
1059 {
1060 pipe_resource_reference(&r300->vbo, NULL);
1061 r300->draw_vbo_size = 0;
1062 }
1063
1064 /****************************************************************************
1065 * End of SW TCL functions *
1066 ***************************************************************************/
1067
1068 /* This functions is used to draw a rectangle for the blitter module.
1069 *
1070 * If we rendered a quad, the pixels on the main diagonal
1071 * would be computed and stored twice, which makes the clear/copy codepaths
1072 * somewhat inefficient. Instead we use a rectangular point sprite. */
1073 static void r300_blitter_draw_rectangle(struct blitter_context *blitter,
1074 unsigned x1, unsigned y1,
1075 unsigned x2, unsigned y2,
1076 float depth,
1077 enum blitter_attrib_type type,
1078 const float attrib[4])
1079 {
1080 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter));
1081 unsigned last_sprite_coord_enable = r300->sprite_coord_enable;
1082 unsigned width = x2 - x1;
1083 unsigned height = y2 - y1;
1084 unsigned vertex_size =
1085 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4;
1086 unsigned dwords = 13 + vertex_size +
1087 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0);
1088 const float zeros[4] = {0, 0, 0, 0};
1089 CS_LOCALS(r300);
1090
1091 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD)
1092 r300->sprite_coord_enable = 1;
1093
1094 r300_update_derived_state(r300);
1095
1096 /* Mark some states we don't care about as non-dirty. */
1097 r300->clip_state.dirty = FALSE;
1098 r300->viewport_state.dirty = FALSE;
1099
1100 if (!r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0))
1101 goto done;
1102
1103 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n");
1104
1105 BEGIN_CS(dwords);
1106 /* Set up GA. */
1107 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16));
1108
1109 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) {
1110 /* Set up the GA to generate texcoords. */
1111 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE |
1112 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT));
1113 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
1114 OUT_CS_32F(attrib[0]);
1115 OUT_CS_32F(attrib[3]);
1116 OUT_CS_32F(attrib[2]);
1117 OUT_CS_32F(attrib[1]);
1118 }
1119
1120 /* Set up VAP controls. */
1121 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
1122 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT);
1123 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
1124 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
1125 OUT_CS(1);
1126 OUT_CS(0);
1127
1128 /* Draw. */
1129 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size);
1130 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) |
1131 R300_VAP_VF_CNTL__PRIM_POINTS);
1132
1133 OUT_CS_32F(x1 + width * 0.5f);
1134 OUT_CS_32F(y1 + height * 0.5f);
1135 OUT_CS_32F(depth);
1136 OUT_CS_32F(1);
1137
1138 if (vertex_size == 8) {
1139 if (!attrib)
1140 attrib = zeros;
1141 OUT_CS_TABLE(attrib, 4);
1142 }
1143 END_CS;
1144
1145 done:
1146 /* Restore the state. */
1147 r300->clip_state.dirty = TRUE;
1148 r300->rs_state.dirty = TRUE;
1149 r300->viewport_state.dirty = TRUE;
1150
1151 r300->sprite_coord_enable = last_sprite_coord_enable;
1152 }
1153
1154 static void r300_resource_resolve(struct pipe_context* pipe,
1155 struct pipe_resource* dest,
1156 struct pipe_subresource subdest,
1157 struct pipe_resource* src,
1158 struct pipe_subresource subsrc)
1159 {
1160 struct r300_context* r300 = r300_context(pipe);
1161 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
1162 struct pipe_surface* srcsurf = src->screen->get_tex_surface(src->screen,
1163 src, subsrc.face, subsrc.level, 0, 0);
1164 float color[] = {0, 0, 0, 0};
1165
1166 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n");
1167
1168 /* Enable AA resolve. */
1169 aa->dest = r300_surface(
1170 dest->screen->get_tex_surface(dest->screen, dest, subdest.face,
1171 subdest.level, 0, 0));
1172
1173 aa->aaresolve_ctl =
1174 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE |
1175 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE;
1176 r300->aa_state.size = 12;
1177 r300->aa_state.dirty = TRUE;
1178
1179 /* Resolve the surface. */
1180 r300->context.clear_render_target(pipe,
1181 srcsurf, color, 0, 0, src->width0, src->height0);
1182
1183 /* Disable AA resolve. */
1184 aa->aaresolve_ctl = 0;
1185 r300->aa_state.size = 4;
1186 r300->aa_state.dirty = TRUE;
1187
1188 pipe_surface_reference((struct pipe_surface**)&srcsurf, NULL);
1189 pipe_surface_reference((struct pipe_surface**)&aa->dest, NULL);
1190 }
1191
1192 void r300_init_render_functions(struct r300_context *r300)
1193 {
1194 /* Set draw functions based on presence of HW TCL. */
1195 if (r300->screen->caps.has_tcl) {
1196 r300->context.draw_vbo = r300_draw_vbo;
1197 } else {
1198 r300->context.draw_vbo = r300_swtcl_draw_vbo;
1199 }
1200
1201 r300->context.resource_resolve = r300_resource_resolve;
1202 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
1203
1204 /* Plug in the two-sided stencil reference value fallback if needed. */
1205 if (!r300->screen->caps.is_r500)
1206 r300_plug_in_stencil_ref_fallback(r300);
1207 }