r300g/swtcl: fix crash in ETQW and minor fixups
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_render: Vertex and index buffer primitive emission. Contains both
25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
26
27 #include "draw/draw_context.h"
28 #include "draw/draw_vbuf.h"
29
30 #include "util/u_inlines.h"
31
32 #include "util/u_format.h"
33 #include "util/u_memory.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36
37 #include "r300_cs.h"
38 #include "r300_context.h"
39 #include "r300_screen_buffer.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42 #include "r300_state_derived.h"
43
44 #include <limits.h>
45
46 #define IMMD_DWORDS 32
47
48 static uint32_t r300_translate_primitive(unsigned prim)
49 {
50 switch (prim) {
51 case PIPE_PRIM_POINTS:
52 return R300_VAP_VF_CNTL__PRIM_POINTS;
53 case PIPE_PRIM_LINES:
54 return R300_VAP_VF_CNTL__PRIM_LINES;
55 case PIPE_PRIM_LINE_LOOP:
56 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
57 case PIPE_PRIM_LINE_STRIP:
58 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
59 case PIPE_PRIM_TRIANGLES:
60 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
61 case PIPE_PRIM_TRIANGLE_STRIP:
62 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
63 case PIPE_PRIM_TRIANGLE_FAN:
64 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
65 case PIPE_PRIM_QUADS:
66 return R300_VAP_VF_CNTL__PRIM_QUADS;
67 case PIPE_PRIM_QUAD_STRIP:
68 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
69 case PIPE_PRIM_POLYGON:
70 return R300_VAP_VF_CNTL__PRIM_POLYGON;
71 default:
72 return 0;
73 }
74 }
75
76 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
77 unsigned mode)
78 {
79 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
80 uint32_t color_control = rs->color_control;
81
82 /* By default (see r300_state.c:r300_create_rs_state) color_control is
83 * initialized to provoking the first vertex.
84 *
85 * Triangle fans must be reduced to the second vertex, not the first, in
86 * Gallium flatshade-first mode, as per the GL spec.
87 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
88 *
89 * Quads never provoke correctly in flatshade-first mode. The first
90 * vertex is never considered as provoking, so only the second, third,
91 * and fourth vertices can be selected, and both "third" and "last" modes
92 * select the fourth vertex. This is probably due to D3D lacking quads.
93 *
94 * Similarly, polygons reduce to the first, not the last, vertex, when in
95 * "last" mode, and all other modes start from the second vertex.
96 *
97 * ~ C.
98 */
99
100 if (rs->rs.flatshade_first) {
101 switch (mode) {
102 case PIPE_PRIM_TRIANGLE_FAN:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
104 break;
105 case PIPE_PRIM_QUADS:
106 case PIPE_PRIM_QUAD_STRIP:
107 case PIPE_PRIM_POLYGON:
108 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
109 break;
110 default:
111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
112 break;
113 }
114 } else {
115 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
116 }
117
118 return color_control;
119 }
120
121 static boolean index_bias_supported(struct r300_context *r300)
122 {
123 return r300->screen->caps.is_r500 &&
124 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
125 }
126
127 static void r500_emit_index_bias(struct r300_context *r300, int index_bias)
128 {
129 CS_LOCALS(r300);
130
131 BEGIN_CS(2);
132 OUT_CS_REG(R500_VAP_INDEX_OFFSET,
133 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));
134 END_CS;
135 }
136
137 /* This function splits the index bias value into two parts:
138 * - buffer_offset: the value that can be safely added to buffer offsets
139 * in r300_emit_aos (it must yield a positive offset when added to
140 * a vertex buffer offset)
141 * - index_offset: the value that must be manually subtracted from indices
142 * in an index buffer to achieve negative offsets. */
143 static void r300_split_index_bias(struct r300_context *r300, int index_bias,
144 int *buffer_offset, int *index_offset)
145 {
146 struct pipe_vertex_buffer *vb, *vbufs = r300->vertex_buffer;
147 struct pipe_vertex_element *velem = r300->velems->velem;
148 unsigned i, size;
149 int max_neg_bias;
150
151 if (index_bias < 0) {
152 /* See how large index bias we may subtract. We must be careful
153 * here because negative buffer offsets are not allowed
154 * by the DRM API. */
155 max_neg_bias = INT_MAX;
156 for (i = 0; i < r300->velems->count; i++) {
157 vb = &vbufs[velem[i].vertex_buffer_index];
158 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride;
159 max_neg_bias = MIN2(max_neg_bias, size);
160 }
161
162 /* Now set the minimum allowed value. */
163 *buffer_offset = MAX2(-max_neg_bias, index_bias);
164 } else {
165 /* A positive index bias is OK. */
166 *buffer_offset = index_bias;
167 }
168
169 *index_offset = index_bias - *buffer_offset;
170 }
171
172 enum r300_prepare_flags {
173 PREP_FIRST_DRAW = (1 << 0), /* call emit_dirty_state and friends? */
174 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */
175 PREP_EMIT_AOS = (1 << 2), /* call emit_aos? */
176 PREP_EMIT_AOS_SWTCL = (1 << 3), /* call emit_aos_swtcl? */
177 PREP_INDEXED = (1 << 4) /* is this draw_elements? */
178 };
179
180 /**
181 * Check if the requested number of dwords is available in the CS and
182 * if not, flush. Then validate buffers and emit dirty state.
183 * \param r300 The context.
184 * \param flags See r300_prepare_flags.
185 * \param index_buffer The index buffer to validate. The parameter may be NULL.
186 * \param cs_dwords The number of dwords to reserve in CS.
187 * \param aos_offset The offset passed to emit_aos.
188 * \param index_bias The index bias to emit.
189 * \param end_cs_dwords The number of free dwords which must be available
190 * at the end of CS after drawing in case the CS space
191 * management is performed by a draw_* function manually.
192 * The parameter may be NULL.
193 */
194 static void r300_prepare_for_rendering(struct r300_context *r300,
195 enum r300_prepare_flags flags,
196 struct pipe_resource *index_buffer,
197 unsigned cs_dwords,
198 int aos_offset,
199 int index_bias,
200 unsigned *end_cs_dwords)
201 {
202 unsigned end_dwords = 0;
203 boolean flushed = FALSE;
204 boolean first_draw = flags & PREP_FIRST_DRAW;
205 boolean emit_aos = flags & PREP_EMIT_AOS;
206 boolean emit_aos_swtcl = flags & PREP_EMIT_AOS_SWTCL;
207 boolean indexed = flags & PREP_INDEXED;
208 boolean hw_index_bias = index_bias_supported(r300);
209
210 /* Add dirty state, index offset, and AOS. */
211 if (first_draw) {
212 cs_dwords += r300_get_num_dirty_dwords(r300);
213
214 if (hw_index_bias)
215 cs_dwords += 2; /* emit_index_offset */
216
217 if (emit_aos)
218 cs_dwords += 55; /* emit_aos */
219
220 if (emit_aos_swtcl)
221 cs_dwords += 7; /* emit_aos_swtcl */
222 }
223
224 /* Emitted in flush. */
225 end_dwords += 26; /* emit_query_end */
226 end_dwords += r300->hyperz_state.size; /* emit_hyperz_end */
227
228 cs_dwords += end_dwords;
229
230 /* Reserve requested CS space. */
231 if (cs_dwords > (r300->cs->ndw - r300->cs->cdw)) {
232 r300->context.flush(&r300->context, 0, NULL);
233 flushed = TRUE;
234 }
235
236 /* Validate buffers and emit dirty state if needed. */
237 if (first_draw || flushed) {
238 r300_emit_buffer_validate(r300, flags & PREP_VALIDATE_VBOS, index_buffer);
239 r300_emit_dirty_state(r300);
240 if (hw_index_bias) {
241 if (r300->screen->caps.has_tcl)
242 r500_emit_index_bias(r300, index_bias);
243 else
244 r500_emit_index_bias(r300, 0);
245 }
246
247 if (emit_aos)
248 r300_emit_aos(r300, aos_offset, indexed);
249
250 if (emit_aos_swtcl)
251 r300_emit_aos_swtcl(r300, indexed);
252 }
253
254 if (end_cs_dwords)
255 *end_cs_dwords = end_dwords;
256 }
257
258 static boolean immd_is_good_idea(struct r300_context *r300,
259 unsigned count)
260 {
261 struct pipe_vertex_element* velem;
262 struct pipe_vertex_buffer* vbuf;
263 boolean checked[PIPE_MAX_ATTRIBS] = {0};
264 unsigned vertex_element_count = r300->velems->count;
265 unsigned i, vbi;
266
267 if (DBG_ON(r300, DBG_NO_IMMD)) {
268 return FALSE;
269 }
270
271 if (r300->draw) {
272 return FALSE;
273 }
274
275 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) {
276 return FALSE;
277 }
278
279 /* We shouldn't map buffers referenced by CS, busy buffers,
280 * and ones placed in VRAM. */
281 for (i = 0; i < vertex_element_count; i++) {
282 velem = &r300->velems->velem[i];
283 vbi = velem->vertex_buffer_index;
284
285 if (!checked[vbi]) {
286 vbuf = &r300->vertex_buffer[vbi];
287
288 if (!(r300_buffer(vbuf->buffer)->domain & R300_DOMAIN_GTT)) {
289 return FALSE;
290 }
291
292 if (r300_buffer_is_referenced(&r300->context,
293 vbuf->buffer,
294 R300_REF_CS | R300_REF_HW)) {
295 /* It's a very bad idea to map it... */
296 return FALSE;
297 }
298 checked[vbi] = TRUE;
299 }
300 }
301 return TRUE;
302 }
303
304 /*****************************************************************************
305 * The HWTCL draw functions. *
306 ****************************************************************************/
307
308 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
309 unsigned mode,
310 unsigned start,
311 unsigned count)
312 {
313 struct pipe_vertex_element* velem;
314 struct pipe_vertex_buffer* vbuf;
315 unsigned vertex_element_count = r300->velems->count;
316 unsigned i, v, vbi, dwords;
317
318 /* Size of the vertex, in dwords. */
319 unsigned vertex_size = r300->velems->vertex_size_dwords;
320
321 /* Size of the vertex element, in dwords. */
322 unsigned size[PIPE_MAX_ATTRIBS];
323
324 /* Stride to the same attrib in the next vertex in the vertex buffer,
325 * in dwords. */
326 unsigned stride[PIPE_MAX_ATTRIBS];
327
328 /* Mapped vertex buffers. */
329 uint32_t* map[PIPE_MAX_ATTRIBS];
330 uint32_t* mapelem[PIPE_MAX_ATTRIBS];
331 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {0};
332
333 CS_LOCALS(r300);
334
335 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
336 for (i = 0; i < vertex_element_count; i++) {
337 velem = &r300->velems->velem[i];
338 size[i] = r300->velems->hw_format_size[i] / 4;
339 vbi = velem->vertex_buffer_index;
340 vbuf = &r300->vertex_buffer[vbi];
341 stride[i] = vbuf->stride / 4;
342
343 /* Map the buffer. */
344 if (!transfer[vbi]) {
345 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context,
346 vbuf->buffer,
347 PIPE_TRANSFER_READ,
348 &transfer[vbi]);
349 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * start;
350 }
351 mapelem[i] = map[vbi] + (velem->src_offset / 4);
352 }
353
354 dwords = 9 + count * vertex_size;
355
356 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0, NULL);
357
358 BEGIN_CS(dwords);
359 OUT_CS_REG(R300_GA_COLOR_CONTROL,
360 r300_provoking_vertex_fixes(r300, mode));
361 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
362 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
363 OUT_CS(count - 1);
364 OUT_CS(0);
365 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
366 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
367 r300_translate_primitive(mode));
368
369 /* Emit vertices. */
370 for (v = 0; v < count; v++) {
371 for (i = 0; i < vertex_element_count; i++) {
372 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]);
373 }
374 }
375 END_CS;
376
377 /* Unmap buffers. */
378 for (i = 0; i < vertex_element_count; i++) {
379 vbi = r300->velems->velem[i].vertex_buffer_index;
380
381 if (transfer[vbi]) {
382 vbuf = &r300->vertex_buffer[vbi];
383 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]);
384 transfer[vbi] = NULL;
385 }
386 }
387 }
388
389 static void r300_emit_draw_arrays(struct r300_context *r300,
390 unsigned mode,
391 unsigned count)
392 {
393 boolean alt_num_verts = count > 65535;
394 CS_LOCALS(r300);
395
396 if (count >= (1 << 24)) {
397 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
398 "refusing to render.\n", count);
399 return;
400 }
401
402 BEGIN_CS(7 + (alt_num_verts ? 2 : 0));
403 if (alt_num_verts) {
404 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
405 }
406 OUT_CS_REG(R300_GA_COLOR_CONTROL,
407 r300_provoking_vertex_fixes(r300, mode));
408 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
409 OUT_CS(count - 1);
410 OUT_CS(0);
411 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
412 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
413 r300_translate_primitive(mode) |
414 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
415 END_CS;
416 }
417
418 static void r300_emit_draw_elements(struct r300_context *r300,
419 struct pipe_resource* indexBuffer,
420 unsigned indexSize,
421 unsigned minIndex,
422 unsigned maxIndex,
423 unsigned mode,
424 unsigned start,
425 unsigned count)
426 {
427 uint32_t count_dwords;
428 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
429 boolean alt_num_verts = count > 65535;
430 CS_LOCALS(r300);
431
432 if (count >= (1 << 24)) {
433 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
434 "refusing to render.\n", count);
435 return;
436 }
437
438 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
439
440 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
441 count, minIndex, maxIndex);
442
443 BEGIN_CS(13 + (alt_num_verts ? 2 : 0));
444 if (alt_num_verts) {
445 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
446 }
447 OUT_CS_REG(R300_GA_COLOR_CONTROL,
448 r300_provoking_vertex_fixes(r300, mode));
449 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
450 OUT_CS(maxIndex);
451 OUT_CS(minIndex);
452 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
453 if (indexSize == 4) {
454 count_dwords = count;
455 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
456 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
457 r300_translate_primitive(mode) |
458 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
459 } else {
460 count_dwords = (count + 1) / 2;
461 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
462 r300_translate_primitive(mode) |
463 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
464 }
465
466 /* INDX_BUFFER is a truly special packet3.
467 * Unlike most other packet3, where the offset is after the count,
468 * the order is reversed, so the relocation ends up carrying the
469 * size of the indexbuf instead of the offset.
470 */
471 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
472 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
473 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
474 OUT_CS(offset_dwords << 2);
475 OUT_CS_BUF_RELOC(indexBuffer, count_dwords,
476 r300_buffer(indexBuffer)->domain, 0);
477
478 END_CS;
479 }
480
481 /* This is the fast-path drawing & emission for HW TCL. */
482 static void r300_draw_range_elements(struct pipe_context* pipe,
483 struct pipe_resource* indexBuffer,
484 unsigned indexSize,
485 int indexBias,
486 unsigned minIndex,
487 unsigned maxIndex,
488 unsigned mode,
489 unsigned start,
490 unsigned count)
491 {
492 struct r300_context* r300 = r300_context(pipe);
493 struct pipe_resource* orgIndexBuffer = indexBuffer;
494 boolean alt_num_verts = r300->screen->caps.is_r500 &&
495 count > 65536 &&
496 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
497 unsigned short_count;
498 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */
499 boolean translate = FALSE;
500 unsigned new_offset;
501
502 if (r300->skip_rendering) {
503 return;
504 }
505
506 if (!u_trim_pipe_prim(mode, &count)) {
507 return;
508 }
509
510 /* Index buffer range checking. */
511 if ((start + count) * indexSize > indexBuffer->width0) {
512 fprintf(stderr, "r300: Invalid index buffer range. Skipping rendering.\n");
513 return;
514 }
515
516 /* Set up fallback for incompatible vertex layout if needed. */
517 if (r300->incompatible_vb_layout || r300->velems->incompatible_layout) {
518 r300_begin_vertex_translate(r300);
519 translate = TRUE;
520 }
521
522 if (indexBias && !index_bias_supported(r300)) {
523 r300_split_index_bias(r300, indexBias, &buffer_offset, &index_offset);
524 }
525
526 r300_translate_index_buffer(r300, &indexBuffer, &indexSize, index_offset,
527 &start, count);
528
529 r300_update_derived_state(r300);
530 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count, &new_offset);
531
532 start = new_offset;
533 /* 15 dwords for emit_draw_elements */
534 r300_prepare_for_rendering(r300,
535 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED,
536 indexBuffer, 15, buffer_offset, indexBias, NULL);
537
538 if (alt_num_verts || count <= 65535) {
539 r300_emit_draw_elements(r300, indexBuffer, indexSize,
540 minIndex, maxIndex, mode, start, count);
541 } else {
542 do {
543 short_count = MIN2(count, 65534);
544 r300_emit_draw_elements(r300, indexBuffer, indexSize,
545 minIndex, maxIndex,
546 mode, start, short_count);
547
548 start += short_count;
549 count -= short_count;
550
551 /* 15 dwords for emit_draw_elements */
552 if (count) {
553 r300_prepare_for_rendering(r300,
554 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED,
555 indexBuffer, 15, buffer_offset, indexBias, NULL);
556 }
557 } while (count);
558 }
559
560 if (indexBuffer != orgIndexBuffer) {
561 pipe_resource_reference( &indexBuffer, NULL );
562 }
563
564 if (translate) {
565 r300_end_vertex_translate(r300);
566 }
567 }
568
569 static void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
570 unsigned start, unsigned count)
571 {
572 struct r300_context* r300 = r300_context(pipe);
573 boolean alt_num_verts = r300->screen->caps.is_r500 &&
574 count > 65536 &&
575 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
576 unsigned short_count;
577 boolean translate = FALSE;
578
579 if (r300->skip_rendering) {
580 return;
581 }
582
583 if (!u_trim_pipe_prim(mode, &count)) {
584 return;
585 }
586
587 /* Set up fallback for incompatible vertex layout if needed. */
588 if (r300->incompatible_vb_layout || r300->velems->incompatible_layout) {
589 r300_begin_vertex_translate(r300);
590 translate = TRUE;
591 }
592
593 r300_update_derived_state(r300);
594
595 if (immd_is_good_idea(r300, count)) {
596 r300_emit_draw_arrays_immediate(r300, mode, start, count);
597 } else {
598 /* 9 spare dwords for emit_draw_arrays. */
599 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS,
600 NULL, 9, start, 0, NULL);
601
602 if (alt_num_verts || count <= 65535) {
603 r300_emit_draw_arrays(r300, mode, count);
604 } else {
605 do {
606 short_count = MIN2(count, 65535);
607 r300_emit_draw_arrays(r300, mode, short_count);
608
609 start += short_count;
610 count -= short_count;
611
612 /* 9 spare dwords for emit_draw_arrays. */
613 if (count) {
614 r300_prepare_for_rendering(r300,
615 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9,
616 start, 0, NULL);
617 }
618 } while (count);
619 }
620 u_upload_flush(r300->upload_vb);
621 }
622
623 if (translate) {
624 r300_end_vertex_translate(r300);
625 }
626 }
627
628 static void r300_draw_vbo(struct pipe_context* pipe,
629 const struct pipe_draw_info *info)
630 {
631 struct r300_context* r300 = r300_context(pipe);
632
633 if (info->indexed && r300->index_buffer.buffer) {
634 unsigned offset;
635
636 assert(r300->index_buffer.offset % r300->index_buffer.index_size == 0);
637 offset = r300->index_buffer.offset / r300->index_buffer.index_size;
638
639 r300_draw_range_elements(pipe,
640 r300->index_buffer.buffer,
641 r300->index_buffer.index_size,
642 info->index_bias,
643 info->min_index,
644 info->max_index,
645 info->mode,
646 info->start + offset,
647 info->count);
648 }
649 else {
650 r300_draw_arrays(pipe,
651 info->mode,
652 info->start,
653 info->count);
654 }
655 }
656
657 /****************************************************************************
658 * The rest of this file is for SW TCL rendering only. Please be polite and *
659 * keep these functions separated so that they are easier to locate. ~C. *
660 ***************************************************************************/
661
662 /* SW TCL elements, using Draw. */
663 static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
664 const struct pipe_draw_info *info)
665 {
666 struct r300_context* r300 = r300_context(pipe);
667 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
668 struct pipe_transfer *ib_transfer = NULL;
669 unsigned count = info->count;
670 int i;
671 void* indices = NULL;
672
673 if (r300->skip_rendering) {
674 return;
675 }
676
677 if (!u_trim_pipe_prim(info->mode, &count)) {
678 return;
679 }
680
681 r300_update_derived_state(r300);
682
683 for (i = 0; i < r300->vertex_buffer_count; i++) {
684 if (r300->vertex_buffer[i].buffer) {
685 void *buf = pipe_buffer_map(pipe,
686 r300->vertex_buffer[i].buffer,
687 PIPE_TRANSFER_READ,
688 &vb_transfer[i]);
689 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
690 }
691 }
692
693 if (info->indexed && r300->index_buffer.buffer) {
694 indices = pipe_buffer_map(pipe, r300->index_buffer.buffer,
695 PIPE_TRANSFER_READ, &ib_transfer);
696 if (indices)
697 indices = (void *) ((char *) indices + r300->index_buffer.offset);
698 }
699
700 draw_set_mapped_element_buffer_range(r300->draw, (indices) ?
701 r300->index_buffer.index_size : 0,
702 info->index_bias,
703 info->min_index,
704 info->max_index,
705 indices);
706
707 draw_arrays(r300->draw, info->mode, info->start, count);
708
709 /* XXX Not sure whether this is the best fix.
710 * It prevents CS from being rejected and weird assertion failures. */
711 draw_flush(r300->draw);
712
713 for (i = 0; i < r300->vertex_buffer_count; i++) {
714 if (r300->vertex_buffer[i].buffer) {
715 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
716 vb_transfer[i]);
717 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
718 }
719 }
720
721 if (ib_transfer) {
722 pipe_buffer_unmap(pipe, r300->index_buffer.buffer, ib_transfer);
723 draw_set_mapped_element_buffer_range(r300->draw, 0, 0, info->start,
724 info->start + count - 1, NULL);
725 }
726 }
727
728 /* Object for rendering using Draw. */
729 struct r300_render {
730 /* Parent class */
731 struct vbuf_render base;
732
733 /* Pipe context */
734 struct r300_context* r300;
735
736 /* Vertex information */
737 size_t vertex_size;
738 unsigned prim;
739 unsigned hwprim;
740
741 /* VBO */
742 struct pipe_resource* vbo;
743 size_t vbo_size;
744 size_t vbo_offset;
745 size_t vbo_max_used;
746 void * vbo_ptr;
747
748 struct pipe_transfer *vbo_transfer;
749 };
750
751 static INLINE struct r300_render*
752 r300_render(struct vbuf_render* render)
753 {
754 return (struct r300_render*)render;
755 }
756
757 static const struct vertex_info*
758 r300_render_get_vertex_info(struct vbuf_render* render)
759 {
760 struct r300_render* r300render = r300_render(render);
761 struct r300_context* r300 = r300render->r300;
762
763 return &r300->vertex_info;
764 }
765
766 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
767 ushort vertex_size,
768 ushort count)
769 {
770 struct r300_render* r300render = r300_render(render);
771 struct r300_context* r300 = r300render->r300;
772 struct pipe_screen* screen = r300->context.screen;
773 size_t size = (size_t)vertex_size * (size_t)count;
774
775 if (size + r300render->vbo_offset > r300render->vbo_size)
776 {
777 pipe_resource_reference(&r300->vbo, NULL);
778 r300render->vbo = pipe_buffer_create(screen,
779 PIPE_BIND_VERTEX_BUFFER,
780 R300_MAX_DRAW_VBO_SIZE);
781 r300render->vbo_offset = 0;
782 r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE;
783 }
784
785 r300render->vertex_size = vertex_size;
786 r300->vbo = r300render->vbo;
787 r300->vbo_offset = r300render->vbo_offset;
788
789 return (r300render->vbo) ? TRUE : FALSE;
790 }
791
792 static void* r300_render_map_vertices(struct vbuf_render* render)
793 {
794 struct r300_render* r300render = r300_render(render);
795
796 assert(!r300render->vbo_transfer);
797
798 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
799 r300render->vbo,
800 PIPE_TRANSFER_WRITE,
801 &r300render->vbo_transfer);
802
803 assert(r300render->vbo_ptr);
804
805 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
806 }
807
808 static void r300_render_unmap_vertices(struct vbuf_render* render,
809 ushort min,
810 ushort max)
811 {
812 struct r300_render* r300render = r300_render(render);
813 struct pipe_context* context = &r300render->r300->context;
814
815 assert(r300render->vbo_transfer);
816
817 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
818 r300render->vertex_size * (max + 1));
819 pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer);
820
821 r300render->vbo_transfer = NULL;
822 }
823
824 static void r300_render_release_vertices(struct vbuf_render* render)
825 {
826 struct r300_render* r300render = r300_render(render);
827
828 r300render->vbo_offset += r300render->vbo_max_used;
829 r300render->vbo_max_used = 0;
830 }
831
832 static boolean r300_render_set_primitive(struct vbuf_render* render,
833 unsigned prim)
834 {
835 struct r300_render* r300render = r300_render(render);
836
837 r300render->prim = prim;
838 r300render->hwprim = r300_translate_primitive(prim);
839
840 return TRUE;
841 }
842
843 static void r300_render_draw_arrays(struct vbuf_render* render,
844 unsigned start,
845 unsigned count)
846 {
847 struct r300_render* r300render = r300_render(render);
848 struct r300_context* r300 = r300render->r300;
849 uint8_t* ptr;
850 unsigned i;
851 unsigned dwords = 6;
852
853 CS_LOCALS(r300);
854 (void) i; (void) ptr;
855
856 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL,
857 NULL, dwords, 0, 0, NULL);
858
859 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count);
860
861 /* Uncomment to dump all VBOs rendered through this interface.
862 * Slow and noisy!
863 ptr = pipe_buffer_map(&r300render->r300->context,
864 r300render->vbo, PIPE_TRANSFER_READ,
865 &r300render->vbo_transfer);
866
867 for (i = 0; i < count; i++) {
868 printf("r300: Vertex %d\n", i);
869 draw_dump_emitted_vertex(&r300->vertex_info, ptr);
870 ptr += r300->vertex_info.size * 4;
871 printf("\n");
872 }
873
874 pipe_buffer_unmap(&r300render->r300->context, r300render->vbo,
875 r300render->vbo_transfer);
876 */
877
878 BEGIN_CS(dwords);
879 OUT_CS_REG(R300_GA_COLOR_CONTROL,
880 r300_provoking_vertex_fixes(r300, r300render->prim));
881 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
882 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
883 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
884 r300render->hwprim);
885 END_CS;
886 }
887
888 static void r300_render_draw_elements(struct vbuf_render* render,
889 const ushort* indices,
890 uint count)
891 {
892 struct r300_render* r300render = r300_render(render);
893 struct r300_context* r300 = r300render->r300;
894 int i;
895 unsigned end_cs_dwords;
896 unsigned max_index = (r300render->vbo_size - r300render->vbo_offset) /
897 (r300render->r300->vertex_info.size * 4) - 1;
898 unsigned short_count;
899 unsigned free_dwords;
900
901 CS_LOCALS(r300);
902 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count);
903
904 /* Reserve at least 256 dwords.
905 *
906 * Below we manage the CS space manually because there may be more
907 * indices than it can fit in CS. */
908 r300_prepare_for_rendering(r300,
909 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
910 NULL, 256, 0, 0, &end_cs_dwords);
911
912 while (count) {
913 free_dwords = r300->cs->ndw - r300->cs->cdw;
914
915 short_count = MIN2(count, (free_dwords - end_cs_dwords - 6) * 2);
916
917 BEGIN_CS(6 + (short_count+1)/2);
918 OUT_CS_REG(R300_GA_COLOR_CONTROL,
919 r300_provoking_vertex_fixes(r300, r300render->prim));
920 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
921 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2);
922 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) |
923 r300render->hwprim);
924 for (i = 0; i < short_count-1; i += 2) {
925 OUT_CS(indices[i+1] << 16 | indices[i]);
926 }
927 if (short_count % 2) {
928 OUT_CS(indices[short_count-1]);
929 }
930 END_CS;
931
932 /* OK now subtract the emitted indices and see if we need to emit
933 * another draw packet. */
934 indices += short_count;
935 count -= short_count;
936
937 if (count) {
938 r300_prepare_for_rendering(r300,
939 PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
940 NULL, 256, 0, 0, &end_cs_dwords);
941 }
942 }
943 }
944
945 static void r300_render_destroy(struct vbuf_render* render)
946 {
947 FREE(render);
948 }
949
950 static struct vbuf_render* r300_render_create(struct r300_context* r300)
951 {
952 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
953
954 r300render->r300 = r300;
955
956 /* XXX find real numbers plz */
957 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
958 r300render->base.max_indices = 16 * 1024;
959
960 r300render->base.get_vertex_info = r300_render_get_vertex_info;
961 r300render->base.allocate_vertices = r300_render_allocate_vertices;
962 r300render->base.map_vertices = r300_render_map_vertices;
963 r300render->base.unmap_vertices = r300_render_unmap_vertices;
964 r300render->base.set_primitive = r300_render_set_primitive;
965 r300render->base.draw_elements = r300_render_draw_elements;
966 r300render->base.draw_arrays = r300_render_draw_arrays;
967 r300render->base.release_vertices = r300_render_release_vertices;
968 r300render->base.destroy = r300_render_destroy;
969
970 r300render->vbo = NULL;
971 r300render->vbo_size = 0;
972 r300render->vbo_offset = 0;
973
974 return &r300render->base;
975 }
976
977 struct draw_stage* r300_draw_stage(struct r300_context* r300)
978 {
979 struct vbuf_render* render;
980 struct draw_stage* stage;
981
982 render = r300_render_create(r300);
983
984 if (!render) {
985 return NULL;
986 }
987
988 stage = draw_vbuf_stage(r300->draw, render);
989
990 if (!stage) {
991 render->destroy(render);
992 return NULL;
993 }
994
995 draw_set_render(r300->draw, render);
996
997 return stage;
998 }
999
1000 /****************************************************************************
1001 * End of SW TCL functions *
1002 ***************************************************************************/
1003
1004 /* If we used a quad to draw a rectangle, the pixels on the main diagonal
1005 * would be computed and stored twice, which makes the clear/copy codepaths
1006 * somewhat inefficient. Instead we use a rectangular point sprite. */
1007 static void r300_blitter_draw_rectangle(struct blitter_context *blitter,
1008 unsigned x1, unsigned y1,
1009 unsigned x2, unsigned y2,
1010 float depth,
1011 enum blitter_attrib_type type,
1012 const float attrib[4])
1013 {
1014 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter));
1015 unsigned last_sprite_coord_enable = r300->sprite_coord_enable;
1016 unsigned width = x2 - x1;
1017 unsigned height = y2 - y1;
1018 unsigned vertex_size =
1019 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4;
1020 unsigned dwords = 13 + vertex_size +
1021 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0);
1022 const float zeros[4] = {0, 0, 0, 0};
1023 CS_LOCALS(r300);
1024
1025 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD)
1026 r300->sprite_coord_enable = 1;
1027
1028 r300_update_derived_state(r300);
1029
1030 /* Mark some states we don't care about as non-dirty. */
1031 r300->clip_state.dirty = FALSE;
1032 r300->viewport_state.dirty = FALSE;
1033
1034 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0, NULL);
1035
1036 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n");
1037
1038 BEGIN_CS(dwords);
1039 /* Set up GA. */
1040 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16));
1041
1042 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) {
1043 /* Set up the GA to generate texcoords. */
1044 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE |
1045 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT));
1046 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
1047 OUT_CS_32F(attrib[0]);
1048 OUT_CS_32F(attrib[3]);
1049 OUT_CS_32F(attrib[2]);
1050 OUT_CS_32F(attrib[1]);
1051 }
1052
1053 /* Set up VAP controls. */
1054 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
1055 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT);
1056 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
1057 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
1058 OUT_CS(1);
1059 OUT_CS(0);
1060
1061 /* Draw. */
1062 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size);
1063 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) |
1064 R300_VAP_VF_CNTL__PRIM_POINTS);
1065
1066 OUT_CS_32F(x1 + width * 0.5f);
1067 OUT_CS_32F(y1 + height * 0.5f);
1068 OUT_CS_32F(depth);
1069 OUT_CS_32F(1);
1070
1071 if (vertex_size == 8) {
1072 if (!attrib)
1073 attrib = zeros;
1074 OUT_CS_TABLE(attrib, 4);
1075 }
1076 END_CS;
1077
1078 /* Restore the state. */
1079 r300->clip_state.dirty = TRUE;
1080 r300->rs_state.dirty = TRUE;
1081 r300->viewport_state.dirty = TRUE;
1082
1083 r300->sprite_coord_enable = last_sprite_coord_enable;
1084 }
1085
1086 static void r300_resource_resolve(struct pipe_context* pipe,
1087 struct pipe_resource* dest,
1088 struct pipe_subresource subdest,
1089 struct pipe_resource* src,
1090 struct pipe_subresource subsrc)
1091 {
1092 struct r300_context* r300 = r300_context(pipe);
1093 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
1094 struct pipe_surface* srcsurf = src->screen->get_tex_surface(src->screen,
1095 src, subsrc.face, subsrc.level, 0, 0);
1096 float color[] = {0, 0, 0, 0};
1097
1098 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n");
1099
1100 /* Enable AA resolve. */
1101 aa->dest = r300_surface(
1102 dest->screen->get_tex_surface(dest->screen, dest, subdest.face,
1103 subdest.level, 0, 0));
1104
1105 aa->aaresolve_ctl =
1106 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE |
1107 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE;
1108 r300->aa_state.size = 12;
1109 r300->aa_state.dirty = TRUE;
1110
1111 /* Resolve the surface. */
1112 r300->context.clear_render_target(pipe,
1113 srcsurf, color, 0, 0, src->width0, src->height0);
1114
1115 /* Disable AA resolve. */
1116 aa->aaresolve_ctl = 0;
1117 r300->aa_state.size = 4;
1118 r300->aa_state.dirty = TRUE;
1119
1120 pipe_surface_reference((struct pipe_surface**)&srcsurf, NULL);
1121 pipe_surface_reference((struct pipe_surface**)&aa->dest, NULL);
1122 }
1123
1124 void r300_init_render_functions(struct r300_context *r300)
1125 {
1126 /* Set draw functions based on presence of HW TCL. */
1127 if (r300->screen->caps.has_tcl) {
1128 r300->context.draw_vbo = r300_draw_vbo;
1129 } else {
1130 r300->context.draw_vbo = r300_swtcl_draw_vbo;
1131 }
1132
1133 r300->context.resource_resolve = r300_resource_resolve;
1134 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
1135
1136 /* Plug in the two-sided stencil reference value fallback if needed. */
1137 if (!r300->screen->caps.is_r500)
1138 r300_plug_in_stencil_ref_fallback(r300);
1139 }