abe7b506d78ce47d746a07149d9f045c276e0598
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_render: Vertex and index buffer primitive emission. Contains both
25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
26
27 #include "draw/draw_context.h"
28 #include "draw/draw_vbuf.h"
29
30 #include "util/u_inlines.h"
31
32 #include "util/u_format.h"
33 #include "util/u_memory.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36
37 #include "r300_cs.h"
38 #include "r300_context.h"
39 #include "r300_screen_buffer.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42
43 #include <limits.h>
44
45 #define IMMD_DWORDS 32
46
47 static uint32_t r300_translate_primitive(unsigned prim)
48 {
49 switch (prim) {
50 case PIPE_PRIM_POINTS:
51 return R300_VAP_VF_CNTL__PRIM_POINTS;
52 case PIPE_PRIM_LINES:
53 return R300_VAP_VF_CNTL__PRIM_LINES;
54 case PIPE_PRIM_LINE_LOOP:
55 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
56 case PIPE_PRIM_LINE_STRIP:
57 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
58 case PIPE_PRIM_TRIANGLES:
59 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
60 case PIPE_PRIM_TRIANGLE_STRIP:
61 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
62 case PIPE_PRIM_TRIANGLE_FAN:
63 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
64 case PIPE_PRIM_QUADS:
65 return R300_VAP_VF_CNTL__PRIM_QUADS;
66 case PIPE_PRIM_QUAD_STRIP:
67 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
68 case PIPE_PRIM_POLYGON:
69 return R300_VAP_VF_CNTL__PRIM_POLYGON;
70 default:
71 return 0;
72 }
73 }
74
75 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
76 unsigned mode)
77 {
78 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
79 uint32_t color_control = rs->color_control;
80
81 /* By default (see r300_state.c:r300_create_rs_state) color_control is
82 * initialized to provoking the first vertex.
83 *
84 * Triangle fans must be reduced to the second vertex, not the first, in
85 * Gallium flatshade-first mode, as per the GL spec.
86 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
87 *
88 * Quads never provoke correctly in flatshade-first mode. The first
89 * vertex is never considered as provoking, so only the second, third,
90 * and fourth vertices can be selected, and both "third" and "last" modes
91 * select the fourth vertex. This is probably due to D3D lacking quads.
92 *
93 * Similarly, polygons reduce to the first, not the last, vertex, when in
94 * "last" mode, and all other modes start from the second vertex.
95 *
96 * ~ C.
97 */
98
99 if (rs->rs.flatshade_first) {
100 switch (mode) {
101 case PIPE_PRIM_TRIANGLE_FAN:
102 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
103 break;
104 case PIPE_PRIM_QUADS:
105 case PIPE_PRIM_QUAD_STRIP:
106 case PIPE_PRIM_POLYGON:
107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
108 break;
109 default:
110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
111 break;
112 }
113 } else {
114 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
115 }
116
117 return color_control;
118 }
119
120 void r500_emit_index_bias(struct r300_context *r300, int index_bias)
121 {
122 CS_LOCALS(r300);
123
124 BEGIN_CS(2);
125 OUT_CS_REG(R500_VAP_INDEX_OFFSET,
126 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));
127 END_CS;
128 }
129
130 /* This function splits the index bias value into two parts:
131 * - buffer_offset: the value that can be safely added to buffer offsets
132 * in r300_emit_vertex_arrays (it must yield a positive offset when added to
133 * a vertex buffer offset)
134 * - index_offset: the value that must be manually subtracted from indices
135 * in an index buffer to achieve negative offsets. */
136 static void r300_split_index_bias(struct r300_context *r300, int index_bias,
137 int *buffer_offset, int *index_offset)
138 {
139 struct pipe_vertex_buffer *vb, *vbufs = r300->vbuf_mgr->vertex_buffer;
140 struct pipe_vertex_element *velem = r300->velems->velem;
141 unsigned i, size;
142 int max_neg_bias;
143
144 if (index_bias < 0) {
145 /* See how large index bias we may subtract. We must be careful
146 * here because negative buffer offsets are not allowed
147 * by the DRM API. */
148 max_neg_bias = INT_MAX;
149 for (i = 0; i < r300->velems->count; i++) {
150 vb = &vbufs[velem[i].vertex_buffer_index];
151 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride;
152 max_neg_bias = MIN2(max_neg_bias, size);
153 }
154
155 /* Now set the minimum allowed value. */
156 *buffer_offset = MAX2(-max_neg_bias, index_bias);
157 } else {
158 /* A positive index bias is OK. */
159 *buffer_offset = index_bias;
160 }
161
162 *index_offset = index_bias - *buffer_offset;
163 }
164
165 enum r300_prepare_flags {
166 PREP_FIRST_DRAW = (1 << 0), /* call emit_dirty_state and friends? */
167 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */
168 PREP_EMIT_AOS = (1 << 2), /* call emit_vertex_arrays? */
169 PREP_EMIT_AOS_SWTCL = (1 << 3), /* call emit_vertex_arrays_swtcl? */
170 PREP_INDEXED = (1 << 4) /* is this draw_elements? */
171 };
172
173 /**
174 * Check if the requested number of dwords is available in the CS and
175 * if not, flush.
176 * \param r300 The context.
177 * \param flags See r300_prepare_flags.
178 * \param cs_dwords The number of dwords to reserve in CS.
179 * \return TRUE if the CS was flushed
180 */
181 static boolean r300_reserve_cs_dwords(struct r300_context *r300,
182 enum r300_prepare_flags flags,
183 unsigned cs_dwords)
184 {
185 boolean flushed = FALSE;
186 boolean first_draw = flags & PREP_FIRST_DRAW;
187 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS;
188 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL;
189
190 /* Add dirty state, index offset, and AOS. */
191 if (first_draw) {
192 cs_dwords += r300_get_num_dirty_dwords(r300);
193
194 if (r300->screen->caps.index_bias_supported)
195 cs_dwords += 2; /* emit_index_offset */
196
197 if (emit_vertex_arrays)
198 cs_dwords += 55; /* emit_vertex_arrays */
199
200 if (emit_vertex_arrays_swtcl)
201 cs_dwords += 7; /* emit_vertex_arrays_swtcl */
202 }
203
204 cs_dwords += r300_get_num_cs_end_dwords(r300);
205
206 /* Reserve requested CS space. */
207 if (cs_dwords > (R300_MAX_CMDBUF_DWORDS - r300->cs->cdw)) {
208 r300->context.flush(&r300->context, 0, NULL);
209 flushed = TRUE;
210 }
211
212 return flushed;
213 }
214
215 /**
216 * Validate buffers and emit dirty state.
217 * \param r300 The context.
218 * \param flags See r300_prepare_flags.
219 * \param index_buffer The index buffer to validate. The parameter may be NULL.
220 * \param buffer_offset The offset passed to emit_vertex_arrays.
221 * \param index_bias The index bias to emit.
222 * \return TRUE if rendering should be skipped
223 */
224 static boolean r300_emit_states(struct r300_context *r300,
225 enum r300_prepare_flags flags,
226 struct pipe_resource *index_buffer,
227 int buffer_offset,
228 int index_bias,
229 boolean user_buffers)
230 {
231 boolean first_draw = flags & PREP_FIRST_DRAW;
232 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS;
233 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL;
234 boolean indexed = flags & PREP_INDEXED;
235 boolean validate_vbos = flags & PREP_VALIDATE_VBOS;
236
237 /* Validate buffers and emit dirty state if needed. */
238 if (first_draw) {
239 if (r300->validate_buffers) {
240 if (!r300_emit_buffer_validate(r300, validate_vbos,
241 index_buffer)) {
242 fprintf(stderr, "r300: CS space validation failed. "
243 "(not enough memory?) Skipping rendering.\n");
244 return FALSE;
245 }
246
247 /* Consider the validation done only if everything was validated. */
248 if (validate_vbos) {
249 r300->validate_buffers = FALSE;
250 if (user_buffers)
251 r300->upload_vb_validated = TRUE;
252 if (r300->index_buffer.buffer &&
253 r300_resource(r300->index_buffer.buffer)->b.user_ptr) {
254 r300->upload_ib_validated = TRUE;
255 }
256 }
257 }
258
259 r300_emit_dirty_state(r300);
260 if (r300->screen->caps.index_bias_supported) {
261 if (r300->screen->caps.has_tcl)
262 r500_emit_index_bias(r300, index_bias);
263 else
264 r500_emit_index_bias(r300, 0);
265 }
266
267 if (emit_vertex_arrays &&
268 (r300->vertex_arrays_dirty ||
269 r300->vertex_arrays_indexed != indexed ||
270 r300->vertex_arrays_offset != buffer_offset)) {
271 r300_emit_vertex_arrays(r300, buffer_offset, indexed);
272
273 r300->vertex_arrays_dirty = FALSE;
274 r300->vertex_arrays_indexed = indexed;
275 r300->vertex_arrays_offset = buffer_offset;
276 }
277
278 if (emit_vertex_arrays_swtcl)
279 r300_emit_vertex_arrays_swtcl(r300, indexed);
280 }
281
282 return TRUE;
283 }
284
285 /**
286 * Check if the requested number of dwords is available in the CS and
287 * if not, flush. Then validate buffers and emit dirty state.
288 * \param r300 The context.
289 * \param flags See r300_prepare_flags.
290 * \param index_buffer The index buffer to validate. The parameter may be NULL.
291 * \param cs_dwords The number of dwords to reserve in CS.
292 * \param buffer_offset The offset passed to emit_vertex_arrays.
293 * \param index_bias The index bias to emit.
294 * \return TRUE if rendering should be skipped
295 */
296 static boolean r300_prepare_for_rendering(struct r300_context *r300,
297 enum r300_prepare_flags flags,
298 struct pipe_resource *index_buffer,
299 unsigned cs_dwords,
300 int buffer_offset,
301 int index_bias,
302 boolean user_buffers)
303 {
304 if (r300_reserve_cs_dwords(r300, flags, cs_dwords))
305 flags |= PREP_FIRST_DRAW;
306
307 return r300_emit_states(r300, flags, index_buffer, buffer_offset,
308 index_bias, user_buffers);
309 }
310
311 static boolean immd_is_good_idea(struct r300_context *r300,
312 unsigned count)
313 {
314 struct pipe_vertex_element* velem;
315 struct pipe_resource *buf;
316 boolean checked[PIPE_MAX_ATTRIBS] = {0};
317 unsigned vertex_element_count = r300->velems->count;
318 unsigned i, vbi;
319
320 if (DBG_ON(r300, DBG_NO_IMMD)) {
321 return FALSE;
322 }
323
324 if (r300->draw) {
325 return FALSE;
326 }
327
328 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) {
329 return FALSE;
330 }
331
332 /* We shouldn't map buffers referenced by CS, busy buffers,
333 * and ones placed in VRAM. */
334 for (i = 0; i < vertex_element_count; i++) {
335 velem = &r300->velems->velem[i];
336 vbi = velem->vertex_buffer_index;
337
338 if (!checked[vbi]) {
339 buf = r300->vbuf_mgr->real_vertex_buffer[vbi];
340
341 if ((r300_resource(buf)->domain != R300_DOMAIN_GTT)) {
342 return FALSE;
343 }
344
345 checked[vbi] = TRUE;
346 }
347 }
348 return TRUE;
349 }
350
351 /*****************************************************************************
352 * The HWTCL draw functions. *
353 ****************************************************************************/
354
355 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
356 unsigned mode,
357 unsigned start,
358 unsigned count)
359 {
360 struct pipe_vertex_element* velem;
361 struct pipe_vertex_buffer* vbuf;
362 unsigned vertex_element_count = r300->velems->count;
363 unsigned i, v, vbi;
364
365 /* Size of the vertex, in dwords. */
366 unsigned vertex_size = r300->velems->vertex_size_dwords;
367
368 /* The number of dwords for this draw operation. */
369 unsigned dwords = 9 + count * vertex_size;
370
371 /* Size of the vertex element, in dwords. */
372 unsigned size[PIPE_MAX_ATTRIBS];
373
374 /* Stride to the same attrib in the next vertex in the vertex buffer,
375 * in dwords. */
376 unsigned stride[PIPE_MAX_ATTRIBS];
377
378 /* Mapped vertex buffers. */
379 uint32_t* map[PIPE_MAX_ATTRIBS];
380 uint32_t* mapelem[PIPE_MAX_ATTRIBS];
381 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {0};
382
383 CS_LOCALS(r300);
384
385 if (!r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0,
386 FALSE))
387 return;
388
389 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
390 for (i = 0; i < vertex_element_count; i++) {
391 velem = &r300->velems->velem[i];
392 size[i] = r300->velems->format_size[i] / 4;
393 vbi = velem->vertex_buffer_index;
394 vbuf = &r300->vbuf_mgr->vertex_buffer[vbi];
395 stride[i] = vbuf->stride / 4;
396
397 /* Map the buffer. */
398 if (!transfer[vbi]) {
399 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context,
400 r300->vbuf_mgr->real_vertex_buffer[vbi],
401 PIPE_TRANSFER_READ |
402 PIPE_TRANSFER_UNSYNCHRONIZED,
403 &transfer[vbi]);
404 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * start;
405 }
406 mapelem[i] = map[vbi] + (velem->src_offset / 4);
407 }
408
409 BEGIN_CS(dwords);
410 OUT_CS_REG(R300_GA_COLOR_CONTROL,
411 r300_provoking_vertex_fixes(r300, mode));
412 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
413 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
414 OUT_CS(count - 1);
415 OUT_CS(0);
416 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
417 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
418 r300_translate_primitive(mode));
419
420 /* Emit vertices. */
421 for (v = 0; v < count; v++) {
422 for (i = 0; i < vertex_element_count; i++) {
423 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]);
424 }
425 }
426 END_CS;
427
428 /* Unmap buffers. */
429 for (i = 0; i < vertex_element_count; i++) {
430 vbi = r300->velems->velem[i].vertex_buffer_index;
431
432 if (transfer[vbi]) {
433 pipe_buffer_unmap(&r300->context, transfer[vbi]);
434 transfer[vbi] = NULL;
435 }
436 }
437 }
438
439 static void r300_emit_draw_arrays(struct r300_context *r300,
440 unsigned mode,
441 unsigned count)
442 {
443 boolean alt_num_verts = count > 65535;
444 CS_LOCALS(r300);
445
446 if (count >= (1 << 24)) {
447 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
448 "refusing to render.\n", count);
449 return;
450 }
451
452 BEGIN_CS(7 + (alt_num_verts ? 2 : 0));
453 if (alt_num_verts) {
454 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
455 }
456 OUT_CS_REG(R300_GA_COLOR_CONTROL,
457 r300_provoking_vertex_fixes(r300, mode));
458 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
459 OUT_CS(count - 1);
460 OUT_CS(0);
461 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
462 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
463 r300_translate_primitive(mode) |
464 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
465 END_CS;
466 }
467
468 static void r300_emit_draw_elements(struct r300_context *r300,
469 struct pipe_resource* indexBuffer,
470 unsigned indexSize,
471 unsigned minIndex,
472 unsigned maxIndex,
473 unsigned mode,
474 unsigned start,
475 unsigned count,
476 uint16_t *imm_indices3)
477 {
478 uint32_t count_dwords, offset_dwords;
479 boolean alt_num_verts = count > 65535;
480 CS_LOCALS(r300);
481
482 if (count >= (1 << 24)) {
483 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
484 "refusing to render.\n", count);
485 return;
486 }
487
488 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
489 count, minIndex, maxIndex);
490
491 BEGIN_CS(5);
492 OUT_CS_REG(R300_GA_COLOR_CONTROL,
493 r300_provoking_vertex_fixes(r300, mode));
494 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
495 OUT_CS(maxIndex);
496 OUT_CS(minIndex);
497 END_CS;
498
499 /* If start is odd, render the first triangle with indices embedded
500 * in the command stream. This will increase start by 3 and make it
501 * even. We can then proceed without a fallback. */
502 if (indexSize == 2 && (start & 1) &&
503 mode == PIPE_PRIM_TRIANGLES) {
504 BEGIN_CS(4);
505 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 2);
506 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (3 << 16) |
507 R300_VAP_VF_CNTL__PRIM_TRIANGLES);
508 OUT_CS(imm_indices3[1] << 16 | imm_indices3[0]);
509 OUT_CS(imm_indices3[2]);
510 END_CS;
511
512 start += 3;
513 count -= 3;
514 if (!count)
515 return;
516 }
517
518 offset_dwords = indexSize * start / sizeof(uint32_t);
519
520 BEGIN_CS(8 + (alt_num_verts ? 2 : 0));
521 if (alt_num_verts) {
522 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
523 }
524 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
525 if (indexSize == 4) {
526 count_dwords = count;
527 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
528 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
529 r300_translate_primitive(mode) |
530 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
531 } else {
532 count_dwords = (count + 1) / 2;
533 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
534 r300_translate_primitive(mode) |
535 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
536 }
537
538 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
539 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
540 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
541 OUT_CS(offset_dwords << 2);
542 OUT_CS(count_dwords);
543 OUT_CS_RELOC(r300_resource(indexBuffer));
544 END_CS;
545 }
546
547 /* This is the fast-path drawing & emission for HW TCL. */
548 static void r300_draw_range_elements(struct pipe_context* pipe,
549 int indexBias,
550 unsigned minIndex,
551 unsigned maxIndex,
552 unsigned mode,
553 unsigned start,
554 unsigned count,
555 boolean user_buffers)
556 {
557 struct r300_context* r300 = r300_context(pipe);
558 struct pipe_resource *indexBuffer = r300->index_buffer.buffer;
559 unsigned indexSize = r300->index_buffer.index_size;
560 struct pipe_resource* orgIndexBuffer = indexBuffer;
561 boolean alt_num_verts = r300->screen->caps.is_r500 &&
562 count > 65536 &&
563 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
564 unsigned short_count;
565 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */
566 uint16_t indices3[3];
567
568 if (indexBias && !r300->screen->caps.index_bias_supported) {
569 r300_split_index_bias(r300, indexBias, &buffer_offset, &index_offset);
570 }
571
572 r300_translate_index_buffer(r300, &indexBuffer, &indexSize, index_offset,
573 &start, count);
574
575 /* Fallback for misaligned ushort indices. */
576 if (indexSize == 2 && (start & 1) &&
577 !r300_resource(indexBuffer)->b.user_ptr) {
578 struct pipe_transfer *transfer;
579 struct pipe_resource *userbuf;
580
581 uint16_t *ptr = pipe_buffer_map(pipe, indexBuffer,
582 PIPE_TRANSFER_READ |
583 PIPE_TRANSFER_UNSYNCHRONIZED,
584 &transfer);
585
586 if (mode == PIPE_PRIM_TRIANGLES) {
587 memcpy(indices3, ptr + start, 6);
588 } else {
589 /* Copy the mapped index buffer directly to the upload buffer.
590 * The start index will be aligned simply from the fact that
591 * every sub-buffer in u_upload_mgr is aligned. */
592 userbuf = pipe->screen->user_buffer_create(pipe->screen,
593 ptr, 0,
594 PIPE_BIND_INDEX_BUFFER);
595 indexBuffer = userbuf;
596 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start, count);
597 pipe_resource_reference(&userbuf, NULL);
598 }
599 pipe_buffer_unmap(pipe, transfer);
600 } else {
601 if (r300_resource(indexBuffer)->b.user_ptr)
602 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start, count);
603 }
604
605 /* 19 dwords for emit_draw_elements. Give up if the function fails. */
606 if (!r300_prepare_for_rendering(r300,
607 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS |
608 PREP_INDEXED, indexBuffer, 19, buffer_offset, indexBias, user_buffers))
609 goto done;
610
611 if (alt_num_verts || count <= 65535) {
612 r300_emit_draw_elements(r300, indexBuffer, indexSize,
613 minIndex, maxIndex, mode, start, count, indices3);
614 } else {
615 do {
616 short_count = MIN2(count, 65534);
617 r300_emit_draw_elements(r300, indexBuffer, indexSize,
618 minIndex, maxIndex,
619 mode, start, short_count, indices3);
620
621 start += short_count;
622 count -= short_count;
623
624 /* 15 dwords for emit_draw_elements */
625 if (count) {
626 if (!r300_prepare_for_rendering(r300,
627 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED,
628 indexBuffer, 19, buffer_offset, indexBias, user_buffers))
629 goto done;
630 }
631 } while (count);
632 }
633
634 done:
635 if (indexBuffer != orgIndexBuffer) {
636 pipe_resource_reference( &indexBuffer, NULL );
637 }
638 }
639
640 static void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
641 unsigned start, unsigned count,
642 boolean user_buffers)
643 {
644 struct r300_context* r300 = r300_context(pipe);
645 boolean alt_num_verts = r300->screen->caps.is_r500 &&
646 count > 65536 &&
647 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
648 unsigned short_count;
649
650 if (immd_is_good_idea(r300, count)) {
651 r300_emit_draw_arrays_immediate(r300, mode, start, count);
652 } else {
653 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
654 if (!r300_prepare_for_rendering(r300,
655 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS,
656 NULL, 9, start, 0, user_buffers))
657 return;
658
659 if (alt_num_verts || count <= 65535) {
660 r300_emit_draw_arrays(r300, mode, count);
661 } else {
662 do {
663 short_count = MIN2(count, 65535);
664 r300_emit_draw_arrays(r300, mode, short_count);
665
666 start += short_count;
667 count -= short_count;
668
669 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
670 if (count) {
671 if (!r300_prepare_for_rendering(r300,
672 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9,
673 start, 0, user_buffers))
674 return;
675 }
676 } while (count);
677 }
678 }
679 }
680
681 static void r300_draw_vbo(struct pipe_context* pipe,
682 const struct pipe_draw_info *info)
683 {
684 struct r300_context* r300 = r300_context(pipe);
685 unsigned count = info->count;
686 boolean buffers_updated, uploader_flushed;
687 boolean indexed = info->indexed && r300->index_buffer.buffer;
688
689 if (r300->skip_rendering) {
690 return;
691 }
692
693 if (!u_trim_pipe_prim(info->mode, &count)) {
694 return;
695 }
696
697 u_vbuf_mgr_draw_begin(r300->vbuf_mgr, info,
698 &buffers_updated, &uploader_flushed);
699
700 if (buffers_updated) {
701 r300->vertex_arrays_dirty = TRUE;
702
703 if (uploader_flushed || !r300->upload_vb_validated) {
704 r300->upload_vb_validated = FALSE;
705 r300->validate_buffers = TRUE;
706 }
707 } else {
708 r300->upload_vb_validated = FALSE;
709 }
710
711 if (indexed) {
712 /* Compute the start for draw_elements, taking the offset into account. */
713 unsigned start_indexed =
714 info->start +
715 (r300->index_buffer.offset / r300->index_buffer.index_size);
716 int max_index = MIN2(r300->vbuf_mgr->max_index, info->max_index);
717
718 assert(r300->index_buffer.offset % r300->index_buffer.index_size == 0);
719
720 /* Index buffer range checking. */
721 if ((start_indexed + count) * r300->index_buffer.index_size >
722 r300->index_buffer.buffer->width0) {
723 fprintf(stderr, "r300: Invalid index buffer range. Skipping rendering.\n");
724 return;
725 }
726
727 if (max_index >= (1 << 24) - 1) {
728 fprintf(stderr, "r300: Invalid max_index: %i. Skipping rendering...\n", max_index);
729 return;
730 }
731
732 r300_update_derived_state(r300);
733 r300_draw_range_elements(pipe, info->index_bias, info->min_index,
734 max_index, info->mode, start_indexed, count,
735 buffers_updated);
736 } else {
737 r300_update_derived_state(r300);
738 r300_draw_arrays(pipe, info->mode, info->start, count, buffers_updated);
739 }
740
741 u_vbuf_mgr_draw_end(r300->vbuf_mgr);
742 }
743
744 /****************************************************************************
745 * The rest of this file is for SW TCL rendering only. Please be polite and *
746 * keep these functions separated so that they are easier to locate. ~C. *
747 ***************************************************************************/
748
749 /* SW TCL elements, using Draw. */
750 static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
751 const struct pipe_draw_info *info)
752 {
753 struct r300_context* r300 = r300_context(pipe);
754 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
755 struct pipe_transfer *ib_transfer = NULL;
756 unsigned count = info->count;
757 int i;
758 void *indices = NULL;
759 boolean indexed = info->indexed && r300->index_buffer.buffer;
760
761 if (r300->skip_rendering) {
762 return;
763 }
764
765 if (!u_trim_pipe_prim(info->mode, &count)) {
766 return;
767 }
768
769 r300_update_derived_state(r300);
770
771 r300_reserve_cs_dwords(r300,
772 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL |
773 (indexed ? PREP_INDEXED : 0),
774 indexed ? 256 : 6);
775
776 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
777 if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
778 void *buf = pipe_buffer_map(pipe,
779 r300->vbuf_mgr->vertex_buffer[i].buffer,
780 PIPE_TRANSFER_READ |
781 PIPE_TRANSFER_UNSYNCHRONIZED,
782 &vb_transfer[i]);
783 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
784 }
785 }
786
787 if (indexed) {
788 indices = pipe_buffer_map(pipe, r300->index_buffer.buffer,
789 PIPE_TRANSFER_READ |
790 PIPE_TRANSFER_UNSYNCHRONIZED, &ib_transfer);
791 }
792
793 draw_set_mapped_index_buffer(r300->draw, indices);
794
795 r300->draw_vbo_locked = TRUE;
796 r300->draw_first_emitted = FALSE;
797 draw_vbo(r300->draw, info);
798 draw_flush(r300->draw);
799 r300->draw_vbo_locked = FALSE;
800
801 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
802 if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
803 pipe_buffer_unmap(pipe, vb_transfer[i]);
804 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
805 }
806 }
807
808 if (indexed) {
809 pipe_buffer_unmap(pipe, ib_transfer);
810 draw_set_mapped_index_buffer(r300->draw, NULL);
811 }
812 }
813
814 /* Object for rendering using Draw. */
815 struct r300_render {
816 /* Parent class */
817 struct vbuf_render base;
818
819 /* Pipe context */
820 struct r300_context* r300;
821
822 /* Vertex information */
823 size_t vertex_size;
824 unsigned prim;
825 unsigned hwprim;
826
827 /* VBO */
828 size_t vbo_max_used;
829 void * vbo_ptr;
830
831 struct pipe_transfer *vbo_transfer;
832 };
833
834 static INLINE struct r300_render*
835 r300_render(struct vbuf_render* render)
836 {
837 return (struct r300_render*)render;
838 }
839
840 static const struct vertex_info*
841 r300_render_get_vertex_info(struct vbuf_render* render)
842 {
843 struct r300_render* r300render = r300_render(render);
844 struct r300_context* r300 = r300render->r300;
845
846 return &r300->vertex_info;
847 }
848
849 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
850 ushort vertex_size,
851 ushort count)
852 {
853 struct r300_render* r300render = r300_render(render);
854 struct r300_context* r300 = r300render->r300;
855 struct pipe_screen* screen = r300->context.screen;
856 size_t size = (size_t)vertex_size * (size_t)count;
857
858 DBG(r300, DBG_DRAW, "r300: render_allocate_vertices (size: %d)\n", size);
859
860 if (size + r300->draw_vbo_offset > r300->draw_vbo_size)
861 {
862 pipe_resource_reference(&r300->vbo, NULL);
863 r300->vbo = pipe_buffer_create(screen,
864 PIPE_BIND_VERTEX_BUFFER,
865 R300_MAX_DRAW_VBO_SIZE);
866 r300->draw_vbo_offset = 0;
867 r300->draw_vbo_size = R300_MAX_DRAW_VBO_SIZE;
868 r300->validate_buffers = TRUE;
869 }
870
871 r300render->vertex_size = vertex_size;
872
873 return (r300->vbo) ? TRUE : FALSE;
874 }
875
876 static void* r300_render_map_vertices(struct vbuf_render* render)
877 {
878 struct r300_render* r300render = r300_render(render);
879 struct r300_context* r300 = r300render->r300;
880
881 assert(!r300render->vbo_transfer);
882
883 DBG(r300, DBG_DRAW, "r300: render_map_vertices\n");
884
885 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
886 r300->vbo,
887 PIPE_TRANSFER_WRITE |
888 PIPE_TRANSFER_UNSYNCHRONIZED,
889 &r300render->vbo_transfer);
890
891 assert(r300render->vbo_ptr);
892
893 return ((uint8_t*)r300render->vbo_ptr + r300->draw_vbo_offset);
894 }
895
896 static void r300_render_unmap_vertices(struct vbuf_render* render,
897 ushort min,
898 ushort max)
899 {
900 struct r300_render* r300render = r300_render(render);
901 struct pipe_context* context = &r300render->r300->context;
902 struct r300_context* r300 = r300render->r300;
903
904 assert(r300render->vbo_transfer);
905
906 DBG(r300, DBG_DRAW, "r300: render_unmap_vertices\n");
907
908 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
909 r300render->vertex_size * (max + 1));
910 pipe_buffer_unmap(context, r300render->vbo_transfer);
911
912 r300render->vbo_transfer = NULL;
913 }
914
915 static void r300_render_release_vertices(struct vbuf_render* render)
916 {
917 struct r300_render* r300render = r300_render(render);
918 struct r300_context* r300 = r300render->r300;
919
920 DBG(r300, DBG_DRAW, "r300: render_release_vertices\n");
921
922 r300->draw_vbo_offset += r300render->vbo_max_used;
923 r300render->vbo_max_used = 0;
924 }
925
926 static boolean r300_render_set_primitive(struct vbuf_render* render,
927 unsigned prim)
928 {
929 struct r300_render* r300render = r300_render(render);
930
931 r300render->prim = prim;
932 r300render->hwprim = r300_translate_primitive(prim);
933
934 return TRUE;
935 }
936
937 static void r300_render_draw_arrays(struct vbuf_render* render,
938 unsigned start,
939 unsigned count)
940 {
941 struct r300_render* r300render = r300_render(render);
942 struct r300_context* r300 = r300render->r300;
943 uint8_t* ptr;
944 unsigned i;
945 unsigned dwords = 6;
946
947 CS_LOCALS(r300);
948 (void) i; (void) ptr;
949
950 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count);
951
952 if (r300->draw_first_emitted) {
953 if (!r300_prepare_for_rendering(r300,
954 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL,
955 NULL, dwords, 0, 0, FALSE))
956 return;
957 } else {
958 if (!r300_emit_states(r300,
959 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL,
960 NULL, 0, 0, FALSE))
961 return;
962 }
963
964 BEGIN_CS(dwords);
965 OUT_CS_REG(R300_GA_COLOR_CONTROL,
966 r300_provoking_vertex_fixes(r300, r300render->prim));
967 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
968 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
969 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
970 r300render->hwprim);
971 END_CS;
972
973 r300->draw_first_emitted = TRUE;
974 }
975
976 static void r300_render_draw_elements(struct vbuf_render* render,
977 const ushort* indices,
978 uint count)
979 {
980 struct r300_render* r300render = r300_render(render);
981 struct r300_context* r300 = r300render->r300;
982 int i;
983 unsigned end_cs_dwords;
984 unsigned max_index = (r300->draw_vbo_size - r300->draw_vbo_offset) /
985 (r300render->r300->vertex_info.size * 4) - 1;
986 unsigned short_count;
987 unsigned free_dwords;
988
989 CS_LOCALS(r300);
990 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count);
991
992 if (r300->draw_first_emitted) {
993 if (!r300_prepare_for_rendering(r300,
994 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
995 NULL, 256, 0, 0, FALSE))
996 return;
997 } else {
998 if (!r300_emit_states(r300,
999 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
1000 NULL, 0, 0, FALSE))
1001 return;
1002 }
1003
1004 /* Below we manage the CS space manually because there may be more
1005 * indices than it can fit in CS. */
1006
1007 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1008
1009 while (count) {
1010 free_dwords = R300_MAX_CMDBUF_DWORDS - r300->cs->cdw;
1011
1012 short_count = MIN2(count, (free_dwords - end_cs_dwords - 6) * 2);
1013
1014 BEGIN_CS(6 + (short_count+1)/2);
1015 OUT_CS_REG(R300_GA_COLOR_CONTROL,
1016 r300_provoking_vertex_fixes(r300, r300render->prim));
1017 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
1018 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2);
1019 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) |
1020 r300render->hwprim);
1021 for (i = 0; i < short_count-1; i += 2) {
1022 OUT_CS(indices[i+1] << 16 | indices[i]);
1023 }
1024 if (short_count % 2) {
1025 OUT_CS(indices[short_count-1]);
1026 }
1027 END_CS;
1028
1029 /* OK now subtract the emitted indices and see if we need to emit
1030 * another draw packet. */
1031 indices += short_count;
1032 count -= short_count;
1033
1034 if (count) {
1035 if (!r300_prepare_for_rendering(r300,
1036 PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
1037 NULL, 256, 0, 0, FALSE))
1038 return;
1039
1040 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1041 }
1042 }
1043
1044 r300->draw_first_emitted = TRUE;
1045 }
1046
1047 static void r300_render_destroy(struct vbuf_render* render)
1048 {
1049 FREE(render);
1050 }
1051
1052 static struct vbuf_render* r300_render_create(struct r300_context* r300)
1053 {
1054 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
1055
1056 r300render->r300 = r300;
1057
1058 r300render->base.max_vertex_buffer_bytes = 1024 * 1024;
1059 r300render->base.max_indices = 16 * 1024;
1060
1061 r300render->base.get_vertex_info = r300_render_get_vertex_info;
1062 r300render->base.allocate_vertices = r300_render_allocate_vertices;
1063 r300render->base.map_vertices = r300_render_map_vertices;
1064 r300render->base.unmap_vertices = r300_render_unmap_vertices;
1065 r300render->base.set_primitive = r300_render_set_primitive;
1066 r300render->base.draw_elements = r300_render_draw_elements;
1067 r300render->base.draw_arrays = r300_render_draw_arrays;
1068 r300render->base.release_vertices = r300_render_release_vertices;
1069 r300render->base.destroy = r300_render_destroy;
1070
1071 return &r300render->base;
1072 }
1073
1074 struct draw_stage* r300_draw_stage(struct r300_context* r300)
1075 {
1076 struct vbuf_render* render;
1077 struct draw_stage* stage;
1078
1079 render = r300_render_create(r300);
1080
1081 if (!render) {
1082 return NULL;
1083 }
1084
1085 stage = draw_vbuf_stage(r300->draw, render);
1086
1087 if (!stage) {
1088 render->destroy(render);
1089 return NULL;
1090 }
1091
1092 draw_set_render(r300->draw, render);
1093
1094 return stage;
1095 }
1096
1097 void r300_draw_flush_vbuf(struct r300_context *r300)
1098 {
1099 pipe_resource_reference(&r300->vbo, NULL);
1100 r300->draw_vbo_size = 0;
1101 }
1102
1103 /****************************************************************************
1104 * End of SW TCL functions *
1105 ***************************************************************************/
1106
1107 /* This functions is used to draw a rectangle for the blitter module.
1108 *
1109 * If we rendered a quad, the pixels on the main diagonal
1110 * would be computed and stored twice, which makes the clear/copy codepaths
1111 * somewhat inefficient. Instead we use a rectangular point sprite. */
1112 static void r300_blitter_draw_rectangle(struct blitter_context *blitter,
1113 unsigned x1, unsigned y1,
1114 unsigned x2, unsigned y2,
1115 float depth,
1116 enum blitter_attrib_type type,
1117 const float attrib[4])
1118 {
1119 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter));
1120 unsigned last_sprite_coord_enable = r300->sprite_coord_enable;
1121 unsigned width = x2 - x1;
1122 unsigned height = y2 - y1;
1123 unsigned vertex_size =
1124 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4;
1125 unsigned dwords = 13 + vertex_size +
1126 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0);
1127 const float zeros[4] = {0, 0, 0, 0};
1128 CS_LOCALS(r300);
1129
1130 r300->context.set_vertex_buffers(&r300->context, 0, NULL);
1131
1132 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD)
1133 r300->sprite_coord_enable = 1;
1134
1135 r300_update_derived_state(r300);
1136
1137 /* Mark some states we don't care about as non-dirty. */
1138 r300->clip_state.dirty = FALSE;
1139 r300->viewport_state.dirty = FALSE;
1140
1141 if (!r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0,
1142 FALSE))
1143 goto done;
1144
1145 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n");
1146
1147 BEGIN_CS(dwords);
1148 /* Set up GA. */
1149 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16));
1150
1151 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) {
1152 /* Set up the GA to generate texcoords. */
1153 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE |
1154 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT));
1155 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
1156 OUT_CS_32F(attrib[0]);
1157 OUT_CS_32F(attrib[3]);
1158 OUT_CS_32F(attrib[2]);
1159 OUT_CS_32F(attrib[1]);
1160 }
1161
1162 /* Set up VAP controls. */
1163 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
1164 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT);
1165 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
1166 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
1167 OUT_CS(1);
1168 OUT_CS(0);
1169
1170 /* Draw. */
1171 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size);
1172 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) |
1173 R300_VAP_VF_CNTL__PRIM_POINTS);
1174
1175 OUT_CS_32F(x1 + width * 0.5f);
1176 OUT_CS_32F(y1 + height * 0.5f);
1177 OUT_CS_32F(depth);
1178 OUT_CS_32F(1);
1179
1180 if (vertex_size == 8) {
1181 if (!attrib)
1182 attrib = zeros;
1183 OUT_CS_TABLE(attrib, 4);
1184 }
1185 END_CS;
1186
1187 done:
1188 /* Restore the state. */
1189 r300_mark_atom_dirty(r300, &r300->clip_state);
1190 r300_mark_atom_dirty(r300, &r300->rs_state);
1191 r300_mark_atom_dirty(r300, &r300->viewport_state);
1192
1193 r300->sprite_coord_enable = last_sprite_coord_enable;
1194 }
1195
1196 static void r300_resource_resolve(struct pipe_context* pipe,
1197 struct pipe_resource* dest,
1198 unsigned dst_layer,
1199 struct pipe_resource* src,
1200 unsigned src_layer)
1201 {
1202 struct r300_context* r300 = r300_context(pipe);
1203 struct pipe_surface* srcsurf, surf_tmpl;
1204 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
1205 float color[] = {0, 0, 0, 0};
1206
1207 memset(&surf_tmpl, 0, sizeof(surf_tmpl));
1208 surf_tmpl.format = src->format;
1209 surf_tmpl.usage = 0; /* not really a surface hence no bind flags */
1210 surf_tmpl.u.tex.level = 0; /* msaa resources cannot have mipmaps */
1211 surf_tmpl.u.tex.first_layer = src_layer;
1212 surf_tmpl.u.tex.last_layer = src_layer;
1213 srcsurf = pipe->create_surface(pipe, src, &surf_tmpl);
1214 surf_tmpl.format = dest->format;
1215 surf_tmpl.u.tex.first_layer = dst_layer;
1216 surf_tmpl.u.tex.last_layer = dst_layer;
1217
1218 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n");
1219
1220 /* Enable AA resolve. */
1221 aa->dest = r300_surface(pipe->create_surface(pipe, dest, &surf_tmpl));
1222
1223 aa->aaresolve_ctl =
1224 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE |
1225 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE;
1226 r300->aa_state.size = 10;
1227 r300_mark_atom_dirty(r300, &r300->aa_state);
1228
1229 /* Resolve the surface. */
1230 r300->context.clear_render_target(pipe,
1231 srcsurf, color, 0, 0, src->width0, src->height0);
1232
1233 /* Disable AA resolve. */
1234 aa->aaresolve_ctl = 0;
1235 r300->aa_state.size = 4;
1236 r300_mark_atom_dirty(r300, &r300->aa_state);
1237
1238 pipe_surface_reference((struct pipe_surface**)&srcsurf, NULL);
1239 pipe_surface_reference((struct pipe_surface**)&aa->dest, NULL);
1240 }
1241
1242 void r300_init_render_functions(struct r300_context *r300)
1243 {
1244 /* Set draw functions based on presence of HW TCL. */
1245 if (r300->screen->caps.has_tcl) {
1246 r300->context.draw_vbo = r300_draw_vbo;
1247 } else {
1248 r300->context.draw_vbo = r300_swtcl_draw_vbo;
1249 }
1250
1251 r300->context.resource_resolve = r300_resource_resolve;
1252 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
1253
1254 /* Plug in the two-sided stencil reference value fallback if needed. */
1255 if (!r300->screen->caps.is_r500)
1256 r300_plug_in_stencil_ref_fallback(r300);
1257 }