r300g: Add A8_UNORM texture format.
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "pipe/p_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_prim.h"
34
35 #include "r300_cs.h"
36 #include "r300_context.h"
37 #include "r300_emit.h"
38 #include "r300_reg.h"
39 #include "r300_render.h"
40 #include "r300_state_derived.h"
41
42 /* r300_render: Vertex and index buffer primitive emission. */
43 #define R300_MAX_VBO_SIZE (1024 * 1024)
44
45 uint32_t r300_translate_primitive(unsigned prim)
46 {
47 switch (prim) {
48 case PIPE_PRIM_POINTS:
49 return R300_VAP_VF_CNTL__PRIM_POINTS;
50 case PIPE_PRIM_LINES:
51 return R300_VAP_VF_CNTL__PRIM_LINES;
52 case PIPE_PRIM_LINE_LOOP:
53 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
54 case PIPE_PRIM_LINE_STRIP:
55 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
56 case PIPE_PRIM_TRIANGLES:
57 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
58 case PIPE_PRIM_TRIANGLE_STRIP:
59 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
60 case PIPE_PRIM_TRIANGLE_FAN:
61 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
62 case PIPE_PRIM_QUADS:
63 return R300_VAP_VF_CNTL__PRIM_QUADS;
64 case PIPE_PRIM_QUAD_STRIP:
65 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
66 case PIPE_PRIM_POLYGON:
67 return R300_VAP_VF_CNTL__PRIM_POLYGON;
68 default:
69 return 0;
70 }
71 }
72
73 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
74 unsigned mode)
75 {
76 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
77 uint32_t color_control = rs->color_control;
78
79 /* By default (see r300_state.c:r300_create_rs_state) color_control is
80 * initialized to provoking the first vertex.
81 *
82 * Triangle fans must be reduced to the second vertex, not the first, in
83 * Gallium flatshade-first mode, as per the GL spec.
84 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
85 *
86 * Quads never provoke correctly in flatshade-first mode. The first
87 * vertex is never considered as provoking, so only the second, third,
88 * and fourth vertices can be selected, and both "third" and "last" modes
89 * select the fourth vertex. This is probably due to D3D lacking quads.
90 *
91 * Similarly, polygons reduce to the first, not the last, vertex, when in
92 * "last" mode, and all other modes start from the second vertex.
93 *
94 * ~ C.
95 */
96
97 if (rs->rs.flatshade_first) {
98 switch (mode) {
99 case PIPE_PRIM_TRIANGLE_FAN:
100 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
101 break;
102 case PIPE_PRIM_QUADS:
103 case PIPE_PRIM_QUAD_STRIP:
104 case PIPE_PRIM_POLYGON:
105 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
106 break;
107 default:
108 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
109 break;
110 }
111 } else {
112 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
113 }
114
115 return color_control;
116 }
117
118 static boolean immd_is_good_idea(struct r300_context *r300,
119 unsigned count)
120 {
121 return count <= 4;
122 }
123
124 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
125 unsigned mode,
126 unsigned start,
127 unsigned count)
128 {
129 struct pipe_vertex_element* velem;
130 struct pipe_vertex_buffer* vbuf;
131 unsigned vertex_element_count = r300->vertex_element_count;
132 unsigned i, v, vbi, dw, elem_offset;
133
134 /* Size of the vertex, in dwords. */
135 unsigned vertex_size = 0;
136
137 /* Offsets of the attribute, in dwords, from the start of the vertex. */
138 unsigned offset[PIPE_MAX_ATTRIBS];
139
140 /* Size of the vertex element, in dwords. */
141 unsigned size[PIPE_MAX_ATTRIBS];
142
143 /* Stride to the same attrib in the next vertex in the vertex buffer,
144 * in dwords. */
145 unsigned stride[PIPE_MAX_ATTRIBS];
146
147 /* Mapped vertex buffers. */
148 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
149
150 CS_LOCALS(r300);
151
152 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
153 for (i = 0; i < vertex_element_count; i++) {
154 velem = &r300->vertex_element[i];
155 offset[i] = velem->src_offset / 4;
156 size[i] = util_format_get_blocksize(velem->src_format) / 4;
157 vertex_size += size[i];
158 vbi = velem->vertex_buffer_index;
159
160 /* Map the buffer. */
161 if (!map[vbi]) {
162 vbuf = &r300->vertex_buffer[vbi];
163 map[vbi] = (uint32_t*)pipe_buffer_map(r300->context.screen,
164 vbuf->buffer,
165 PIPE_BUFFER_USAGE_CPU_READ);
166 map[vbi] += vbuf->buffer_offset / 4;
167 stride[vbi] = vbuf->stride / 4;
168 }
169 }
170
171 BEGIN_CS(10 + count * vertex_size);
172 OUT_CS_REG(R300_GA_COLOR_CONTROL,
173 r300_provoking_vertex_fixes(r300, mode));
174 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
175 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
176 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
177 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
178 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
179 r300_translate_primitive(mode));
180
181 /* Emit vertices. */
182 for (v = 0; v < count; v++) {
183 for (i = 0; i < vertex_element_count; i++) {
184 velem = &r300->vertex_element[i];
185 vbi = velem->vertex_buffer_index;
186 elem_offset = offset[i] + stride[vbi] * (v + start);
187
188 for (dw = 0; dw < size[i]; dw++) {
189 OUT_CS(map[vbi][elem_offset + dw]);
190 }
191 }
192 }
193 END_CS;
194
195 /* Unmap buffers. */
196 for (i = 0; i < vertex_element_count; i++) {
197 vbi = r300->vertex_element[i].vertex_buffer_index;
198
199 if (map[vbi]) {
200 vbuf = &r300->vertex_buffer[vbi];
201 pipe_buffer_unmap(r300->context.screen, vbuf->buffer);
202 map[vbi] = NULL;
203 }
204 }
205 }
206
207 static void r300_emit_draw_arrays(struct r300_context *r300,
208 unsigned mode,
209 unsigned count)
210 {
211 CS_LOCALS(r300);
212
213 BEGIN_CS(8);
214 OUT_CS_REG(R300_GA_COLOR_CONTROL,
215 r300_provoking_vertex_fixes(r300, mode));
216 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
217 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
218 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
219 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
220 r300_translate_primitive(mode));
221 END_CS;
222 }
223
224 static void r300_emit_draw_elements(struct r300_context *r300,
225 struct pipe_buffer* indexBuffer,
226 unsigned indexSize,
227 unsigned minIndex,
228 unsigned maxIndex,
229 unsigned mode,
230 unsigned start,
231 unsigned count)
232 {
233 uint32_t count_dwords;
234 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
235 CS_LOCALS(r300);
236
237 /* XXX most of these are stupid */
238 assert(indexSize == 4 || indexSize == 2);
239 assert((start * indexSize) % 4 == 0);
240 assert(offset_dwords == 0);
241
242 BEGIN_CS(14);
243 OUT_CS_REG(R300_GA_COLOR_CONTROL,
244 r300_provoking_vertex_fixes(r300, mode));
245 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, minIndex);
246 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, maxIndex);
247 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
248 if (indexSize == 4) {
249 count_dwords = count + start;
250 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
251 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
252 r300_translate_primitive(mode));
253 } else {
254 count_dwords = (count + start + 1) / 2;
255 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
256 r300_translate_primitive(mode));
257 }
258
259 /* INDX_BUFFER is a truly special packet3.
260 * Unlike most other packet3, where the offset is after the count,
261 * the order is reversed, so the relocation ends up carrying the
262 * size of the indexbuf instead of the offset.
263 *
264 * XXX Fix offset
265 */
266 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
267 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
268 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
269 OUT_CS(offset_dwords);
270 OUT_CS_RELOC(indexBuffer, count_dwords,
271 RADEON_GEM_DOMAIN_GTT, 0, 0);
272
273 END_CS;
274 }
275
276 static boolean r300_setup_vertex_buffers(struct r300_context *r300)
277 {
278 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
279 struct pipe_vertex_element *velem = r300->vertex_element;
280 struct pipe_buffer *pbuf;
281
282 validate:
283 for (int i = 0; i < r300->vertex_element_count; i++) {
284 pbuf = vbuf[velem[i].vertex_buffer_index].buffer;
285
286 if (!r300->winsys->add_buffer(r300->winsys, pbuf,
287 RADEON_GEM_DOMAIN_GTT, 0)) {
288 r300->context.flush(&r300->context, 0, NULL);
289 goto validate;
290 }
291 }
292
293 if (!r300->winsys->validate(r300->winsys)) {
294 r300->context.flush(&r300->context, 0, NULL);
295 return r300->winsys->validate(r300->winsys);
296 }
297
298 return TRUE;
299 }
300
301 static void r300_shorten_ubyte_elts(struct r300_context* r300,
302 struct pipe_buffer** elts,
303 unsigned count)
304 {
305 struct pipe_screen* screen = r300->context.screen;
306 struct pipe_buffer* new_elts;
307 unsigned char *in_map;
308 unsigned short *out_map;
309 unsigned i;
310
311 new_elts = screen->buffer_create(screen, 32,
312 PIPE_BUFFER_USAGE_INDEX |
313 PIPE_BUFFER_USAGE_CPU_WRITE |
314 PIPE_BUFFER_USAGE_GPU_READ,
315 2 * count);
316
317 in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
318 out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
319
320 for (i = 0; i < count; i++) {
321 *out_map = (unsigned short)*in_map;
322 in_map++;
323 out_map++;
324 }
325
326 pipe_buffer_unmap(screen, *elts);
327 pipe_buffer_unmap(screen, new_elts);
328
329 *elts = new_elts;
330 }
331
332 /* This is the fast-path drawing & emission for HW TCL. */
333 void r300_draw_range_elements(struct pipe_context* pipe,
334 struct pipe_buffer* indexBuffer,
335 unsigned indexSize,
336 unsigned minIndex,
337 unsigned maxIndex,
338 unsigned mode,
339 unsigned start,
340 unsigned count)
341 {
342 struct r300_context* r300 = r300_context(pipe);
343 struct pipe_buffer* orgIndexBuffer = indexBuffer;
344
345 if (!u_trim_pipe_prim(mode, &count)) {
346 return;
347 }
348
349 if (count > 65535) {
350 /* XXX: use aux/indices functions to split this into smaller
351 * primitives.
352 */
353 return;
354 }
355
356 r300_update_derived_state(r300);
357
358 r300_emit_buffer_validate(r300);
359
360 if (!r300_setup_vertex_buffers(r300)) {
361 return;
362 }
363
364 if (indexSize == 1) {
365 r300_shorten_ubyte_elts(r300, &indexBuffer, count);
366 indexSize = 2;
367 }
368
369 if (!r300->winsys->add_buffer(r300->winsys, indexBuffer,
370 RADEON_GEM_DOMAIN_GTT, 0)) {
371 goto cleanup;
372 }
373
374 if (!r300->winsys->validate(r300->winsys)) {
375 goto cleanup;
376 }
377
378 r300_emit_dirty_state(r300);
379
380 r300_emit_aos(r300, 0);
381
382 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex, maxIndex,
383 mode, start, count);
384
385 cleanup:
386 if (indexBuffer != orgIndexBuffer) {
387 pipe->screen->buffer_destroy(indexBuffer);
388 }
389 }
390
391 /* Simple helpers for context setup. Should probably be moved to util. */
392 void r300_draw_elements(struct pipe_context* pipe,
393 struct pipe_buffer* indexBuffer,
394 unsigned indexSize, unsigned mode,
395 unsigned start, unsigned count)
396 {
397 pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0, ~0,
398 mode, start, count);
399 }
400
401 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
402 unsigned start, unsigned count)
403 {
404 struct r300_context* r300 = r300_context(pipe);
405
406 if (!u_trim_pipe_prim(mode, &count)) {
407 return;
408 }
409
410 if (count > 65535) {
411 /* XXX: driver needs to handle this -- use the functions in
412 * aux/indices to split this into several smaller primitives.
413 */
414 return;
415 }
416
417 r300_update_derived_state(r300);
418
419 r300_emit_buffer_validate(r300);
420
421 if (immd_is_good_idea(r300, count)) {
422 r300_emit_dirty_state(r300);
423 r300_emit_draw_arrays_immediate(r300, mode, start, count);
424 } else {
425 if (!r300_setup_vertex_buffers(r300)) {
426 return;
427 }
428
429 r300_emit_dirty_state(r300);
430 r300_emit_aos(r300, start);
431 r300_emit_draw_arrays(r300, mode, count);
432 }
433 }
434
435 /****************************************************************************
436 * The rest of this file is for SW TCL rendering only. Please be polite and *
437 * keep these functions separated so that they are easier to locate. ~C. *
438 ***************************************************************************/
439
440 /* SW TCL arrays, using Draw. */
441 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
442 unsigned mode,
443 unsigned start,
444 unsigned count)
445 {
446 struct r300_context* r300 = r300_context(pipe);
447 int i;
448
449 if (!u_trim_pipe_prim(mode, &count)) {
450 return;
451 }
452
453 for (i = 0; i < r300->vertex_buffer_count; i++) {
454 void* buf = pipe_buffer_map(pipe->screen,
455 r300->vertex_buffer[i].buffer,
456 PIPE_BUFFER_USAGE_CPU_READ);
457 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
458 }
459
460 draw_set_mapped_element_buffer(r300->draw, 0, NULL);
461
462 draw_set_mapped_constant_buffer(r300->draw,
463 PIPE_SHADER_VERTEX,
464 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
465 r300->shader_constants[PIPE_SHADER_VERTEX].count *
466 (sizeof(float) * 4));
467
468 draw_arrays(r300->draw, mode, start, count);
469
470 for (i = 0; i < r300->vertex_buffer_count; i++) {
471 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
472 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
473 }
474 }
475
476 /* SW TCL elements, using Draw. */
477 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
478 struct pipe_buffer* indexBuffer,
479 unsigned indexSize,
480 unsigned minIndex,
481 unsigned maxIndex,
482 unsigned mode,
483 unsigned start,
484 unsigned count)
485 {
486 struct r300_context* r300 = r300_context(pipe);
487 int i;
488 void* indices;
489
490 if (!u_trim_pipe_prim(mode, &count)) {
491 return;
492 }
493
494 for (i = 0; i < r300->vertex_buffer_count; i++) {
495 void* buf = pipe_buffer_map(pipe->screen,
496 r300->vertex_buffer[i].buffer,
497 PIPE_BUFFER_USAGE_CPU_READ);
498 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
499 }
500
501 indices = pipe_buffer_map(pipe->screen, indexBuffer,
502 PIPE_BUFFER_USAGE_CPU_READ);
503 draw_set_mapped_element_buffer_range(r300->draw, indexSize,
504 minIndex, maxIndex, indices);
505
506 draw_set_mapped_constant_buffer(r300->draw,
507 PIPE_SHADER_VERTEX,
508 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
509 r300->shader_constants[PIPE_SHADER_VERTEX].count *
510 (sizeof(float) * 4));
511
512 draw_arrays(r300->draw, mode, start, count);
513
514 for (i = 0; i < r300->vertex_buffer_count; i++) {
515 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
516 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
517 }
518
519 pipe_buffer_unmap(pipe->screen, indexBuffer);
520 draw_set_mapped_element_buffer_range(r300->draw, 0, start,
521 start + count - 1, NULL);
522 }
523
524 /* Object for rendering using Draw. */
525 struct r300_render {
526 /* Parent class */
527 struct vbuf_render base;
528
529 /* Pipe context */
530 struct r300_context* r300;
531
532 /* Vertex information */
533 size_t vertex_size;
534 unsigned prim;
535 unsigned hwprim;
536
537 /* VBO */
538 struct pipe_buffer* vbo;
539 size_t vbo_size;
540 size_t vbo_offset;
541 size_t vbo_max_used;
542 void * vbo_ptr;
543 };
544
545 static INLINE struct r300_render*
546 r300_render(struct vbuf_render* render)
547 {
548 return (struct r300_render*)render;
549 }
550
551 static const struct vertex_info*
552 r300_render_get_vertex_info(struct vbuf_render* render)
553 {
554 struct r300_render* r300render = r300_render(render);
555 struct r300_context* r300 = r300render->r300;
556
557 r300_update_derived_state(r300);
558
559 return &r300->vertex_info->vinfo;
560 }
561
562 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
563 ushort vertex_size,
564 ushort count)
565 {
566 struct r300_render* r300render = r300_render(render);
567 struct r300_context* r300 = r300render->r300;
568 struct pipe_screen* screen = r300->context.screen;
569 size_t size = (size_t)vertex_size * (size_t)count;
570
571 if (size + r300render->vbo_offset > r300render->vbo_size)
572 {
573 pipe_buffer_reference(&r300->vbo, NULL);
574 r300render->vbo = pipe_buffer_create(screen,
575 64,
576 PIPE_BUFFER_USAGE_VERTEX,
577 R300_MAX_VBO_SIZE);
578 r300render->vbo_offset = 0;
579 r300render->vbo_size = R300_MAX_VBO_SIZE;
580 }
581
582 r300render->vertex_size = vertex_size;
583 r300->vbo = r300render->vbo;
584 r300->vbo_offset = r300render->vbo_offset;
585
586 return (r300render->vbo) ? TRUE : FALSE;
587 }
588
589 static void* r300_render_map_vertices(struct vbuf_render* render)
590 {
591 struct r300_render* r300render = r300_render(render);
592 struct pipe_screen* screen = r300render->r300->context.screen;
593
594 r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo,
595 PIPE_BUFFER_USAGE_CPU_WRITE);
596
597 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
598 }
599
600 static void r300_render_unmap_vertices(struct vbuf_render* render,
601 ushort min,
602 ushort max)
603 {
604 struct r300_render* r300render = r300_render(render);
605 struct pipe_screen* screen = r300render->r300->context.screen;
606 CS_LOCALS(r300render->r300);
607 BEGIN_CS(2);
608 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
609 END_CS;
610
611 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
612 r300render->vertex_size * (max + 1));
613 pipe_buffer_unmap(screen, r300render->vbo);
614 }
615
616 static void r300_render_release_vertices(struct vbuf_render* render)
617 {
618 struct r300_render* r300render = r300_render(render);
619
620 r300render->vbo_offset += r300render->vbo_max_used;
621 r300render->vbo_max_used = 0;
622 }
623
624 static boolean r300_render_set_primitive(struct vbuf_render* render,
625 unsigned prim)
626 {
627 struct r300_render* r300render = r300_render(render);
628
629 r300render->prim = prim;
630 r300render->hwprim = r300_translate_primitive(prim);
631
632 return TRUE;
633 }
634
635 static void r300_render_draw_arrays(struct vbuf_render* render,
636 unsigned start,
637 unsigned count)
638 {
639 struct r300_render* r300render = r300_render(render);
640 struct r300_context* r300 = r300render->r300;
641
642 CS_LOCALS(r300);
643
644 r300_emit_dirty_state(r300);
645
646 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
647
648 BEGIN_CS(2);
649 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
650 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
651 r300render->hwprim);
652 END_CS;
653 }
654
655 static void r300_render_draw(struct vbuf_render* render,
656 const ushort* indices,
657 uint count)
658 {
659 struct r300_render* r300render = r300_render(render);
660 struct r300_context* r300 = r300render->r300;
661 int i;
662
663 CS_LOCALS(r300);
664
665 r300_emit_dirty_state(r300);
666
667 BEGIN_CS(2 + (count+1)/2);
668 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
669 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
670 r300render->hwprim);
671 for (i = 0; i < count-1; i += 2) {
672 OUT_CS(indices[i+1] << 16 | indices[i]);
673 }
674 if (count % 2) {
675 OUT_CS(indices[count-1]);
676 }
677 END_CS;
678 }
679
680 static void r300_render_destroy(struct vbuf_render* render)
681 {
682 FREE(render);
683 }
684
685 static struct vbuf_render* r300_render_create(struct r300_context* r300)
686 {
687 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
688
689 r300render->r300 = r300;
690
691 /* XXX find real numbers plz */
692 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
693 r300render->base.max_indices = 16 * 1024;
694
695 r300render->base.get_vertex_info = r300_render_get_vertex_info;
696 r300render->base.allocate_vertices = r300_render_allocate_vertices;
697 r300render->base.map_vertices = r300_render_map_vertices;
698 r300render->base.unmap_vertices = r300_render_unmap_vertices;
699 r300render->base.set_primitive = r300_render_set_primitive;
700 r300render->base.draw = r300_render_draw;
701 r300render->base.draw_arrays = r300_render_draw_arrays;
702 r300render->base.release_vertices = r300_render_release_vertices;
703 r300render->base.destroy = r300_render_destroy;
704
705 r300render->vbo = NULL;
706 r300render->vbo_size = 0;
707 r300render->vbo_offset = 0;
708
709 return &r300render->base;
710 }
711
712 struct draw_stage* r300_draw_stage(struct r300_context* r300)
713 {
714 struct vbuf_render* render;
715 struct draw_stage* stage;
716
717 render = r300_render_create(r300);
718
719 if (!render) {
720 return NULL;
721 }
722
723 stage = draw_vbuf_stage(r300->draw, render);
724
725 if (!stage) {
726 render->destroy(render);
727 return NULL;
728 }
729
730 draw_set_render(r300->draw, render);
731
732 return stage;
733 }