r300g: Fix bizarre half-flushes with immd mode.
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "pipe/p_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_prim.h"
34
35 #include "r300_cs.h"
36 #include "r300_context.h"
37 #include "r300_emit.h"
38 #include "r300_reg.h"
39 #include "r300_render.h"
40 #include "r300_state_derived.h"
41
42 /* r300_render: Vertex and index buffer primitive emission. */
43 #define R300_MAX_VBO_SIZE (1024 * 1024)
44
45 uint32_t r300_translate_primitive(unsigned prim)
46 {
47 switch (prim) {
48 case PIPE_PRIM_POINTS:
49 return R300_VAP_VF_CNTL__PRIM_POINTS;
50 case PIPE_PRIM_LINES:
51 return R300_VAP_VF_CNTL__PRIM_LINES;
52 case PIPE_PRIM_LINE_LOOP:
53 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
54 case PIPE_PRIM_LINE_STRIP:
55 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
56 case PIPE_PRIM_TRIANGLES:
57 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
58 case PIPE_PRIM_TRIANGLE_STRIP:
59 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
60 case PIPE_PRIM_TRIANGLE_FAN:
61 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
62 case PIPE_PRIM_QUADS:
63 return R300_VAP_VF_CNTL__PRIM_QUADS;
64 case PIPE_PRIM_QUAD_STRIP:
65 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
66 case PIPE_PRIM_POLYGON:
67 return R300_VAP_VF_CNTL__PRIM_POLYGON;
68 default:
69 return 0;
70 }
71 }
72
73 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
74 unsigned mode)
75 {
76 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
77 uint32_t color_control = rs->color_control;
78
79 /* By default (see r300_state.c:r300_create_rs_state) color_control is
80 * initialized to provoking the first vertex.
81 *
82 * Triangle fans must be reduced to the second vertex, not the first, in
83 * Gallium flatshade-first mode, as per the GL spec.
84 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
85 *
86 * Quads never provoke correctly in flatshade-first mode. The first
87 * vertex is never considered as provoking, so only the second, third,
88 * and fourth vertices can be selected, and both "third" and "last" modes
89 * select the fourth vertex. This is probably due to D3D lacking quads.
90 *
91 * Similarly, polygons reduce to the first, not the last, vertex, when in
92 * "last" mode, and all other modes start from the second vertex.
93 *
94 * ~ C.
95 */
96
97 if (rs->rs.flatshade_first) {
98 switch (mode) {
99 case PIPE_PRIM_TRIANGLE_FAN:
100 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
101 break;
102 case PIPE_PRIM_QUADS:
103 case PIPE_PRIM_QUAD_STRIP:
104 case PIPE_PRIM_POLYGON:
105 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
106 break;
107 default:
108 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
109 break;
110 }
111 } else {
112 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
113 }
114
115 return color_control;
116 }
117
118 static boolean immd_is_good_idea(struct r300_context *r300,
119 unsigned count)
120 {
121 return count <= 4;
122 }
123
124 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
125 unsigned mode,
126 unsigned start,
127 unsigned count)
128 {
129 struct pipe_vertex_element* velem;
130 struct pipe_vertex_buffer* vbuf;
131 unsigned vertex_element_count = r300->vertex_element_count;
132 unsigned i, v, vbi, dw, elem_offset;
133
134 /* Size of the vertex, in dwords. */
135 unsigned vertex_size = 0;
136
137 /* Offsets of the attribute, in dwords, from the start of the vertex. */
138 unsigned offset[PIPE_MAX_ATTRIBS];
139
140 /* Size of the vertex element, in dwords. */
141 unsigned size[PIPE_MAX_ATTRIBS];
142
143 /* Stride to the same attrib in the next vertex in the vertex buffer,
144 * in dwords. */
145 unsigned stride[PIPE_MAX_ATTRIBS];
146
147 /* Mapped vertex buffers. */
148 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
149
150 CS_LOCALS(r300);
151
152 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
153 for (i = 0; i < vertex_element_count; i++) {
154 velem = &r300->vertex_element[i];
155 offset[i] = velem->src_offset / 4;
156 size[i] = util_format_get_blocksize(velem->src_format) / 4;
157 vertex_size += size[i];
158 vbi = velem->vertex_buffer_index;
159
160 /* Map the buffer. */
161 if (!map[vbi]) {
162 vbuf = &r300->vertex_buffer[vbi];
163 map[vbi] = (uint32_t*)pipe_buffer_map(r300->context.screen,
164 vbuf->buffer,
165 PIPE_BUFFER_USAGE_CPU_READ);
166 map[vbi] += vbuf->buffer_offset / 4;
167 stride[vbi] = vbuf->stride / 4;
168 }
169 }
170
171 r300_emit_dirty_state(r300);
172
173 BEGIN_CS(10 + count * vertex_size);
174 OUT_CS_REG(R300_GA_COLOR_CONTROL,
175 r300_provoking_vertex_fixes(r300, mode));
176 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
177 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
178 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
179 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
180 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
181 r300_translate_primitive(mode));
182
183 /* Emit vertices. */
184 for (v = 0; v < count; v++) {
185 for (i = 0; i < vertex_element_count; i++) {
186 velem = &r300->vertex_element[i];
187 vbi = velem->vertex_buffer_index;
188 elem_offset = offset[i] + stride[vbi] * (v + start);
189
190 for (dw = 0; dw < size[i]; dw++) {
191 OUT_CS(map[vbi][elem_offset + dw]);
192 }
193 }
194 }
195 END_CS;
196
197 /* Unmap buffers. */
198 for (i = 0; i < vertex_element_count; i++) {
199 vbi = r300->vertex_element[i].vertex_buffer_index;
200
201 if (map[vbi]) {
202 vbuf = &r300->vertex_buffer[vbi];
203 pipe_buffer_unmap(r300->context.screen, vbuf->buffer);
204 map[vbi] = NULL;
205 }
206 }
207 }
208
209 static void r300_emit_draw_arrays(struct r300_context *r300,
210 unsigned mode,
211 unsigned count)
212 {
213 CS_LOCALS(r300);
214
215 BEGIN_CS(8);
216 OUT_CS_REG(R300_GA_COLOR_CONTROL,
217 r300_provoking_vertex_fixes(r300, mode));
218 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
219 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
220 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
221 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
222 r300_translate_primitive(mode));
223 END_CS;
224 }
225
226 static void r300_emit_draw_elements(struct r300_context *r300,
227 struct pipe_buffer* indexBuffer,
228 unsigned indexSize,
229 unsigned minIndex,
230 unsigned maxIndex,
231 unsigned mode,
232 unsigned start,
233 unsigned count)
234 {
235 uint32_t count_dwords;
236 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
237 CS_LOCALS(r300);
238
239 /* XXX most of these are stupid */
240 assert(indexSize == 4 || indexSize == 2);
241 assert((start * indexSize) % 4 == 0);
242 assert(offset_dwords == 0);
243
244 BEGIN_CS(14);
245 OUT_CS_REG(R300_GA_COLOR_CONTROL,
246 r300_provoking_vertex_fixes(r300, mode));
247 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, minIndex);
248 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, maxIndex);
249 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
250 if (indexSize == 4) {
251 count_dwords = count + start;
252 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
253 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
254 r300_translate_primitive(mode));
255 } else {
256 count_dwords = (count + start + 1) / 2;
257 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
258 r300_translate_primitive(mode));
259 }
260
261 /* INDX_BUFFER is a truly special packet3.
262 * Unlike most other packet3, where the offset is after the count,
263 * the order is reversed, so the relocation ends up carrying the
264 * size of the indexbuf instead of the offset.
265 *
266 * XXX Fix offset
267 */
268 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
269 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
270 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
271 OUT_CS(offset_dwords);
272 OUT_CS_RELOC(indexBuffer, count_dwords,
273 RADEON_GEM_DOMAIN_GTT, 0, 0);
274
275 END_CS;
276 }
277
278 static boolean r300_setup_vertex_buffers(struct r300_context *r300)
279 {
280 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
281 struct pipe_vertex_element *velem = r300->vertex_element;
282 struct pipe_buffer *pbuf;
283
284 validate:
285 for (int i = 0; i < r300->vertex_element_count; i++) {
286 pbuf = vbuf[velem[i].vertex_buffer_index].buffer;
287
288 if (!r300->winsys->add_buffer(r300->winsys, pbuf,
289 RADEON_GEM_DOMAIN_GTT, 0)) {
290 r300->context.flush(&r300->context, 0, NULL);
291 goto validate;
292 }
293 }
294
295 if (!r300->winsys->validate(r300->winsys)) {
296 r300->context.flush(&r300->context, 0, NULL);
297 return r300->winsys->validate(r300->winsys);
298 }
299
300 return TRUE;
301 }
302
303 static void r300_shorten_ubyte_elts(struct r300_context* r300,
304 struct pipe_buffer** elts,
305 unsigned count)
306 {
307 struct pipe_screen* screen = r300->context.screen;
308 struct pipe_buffer* new_elts;
309 unsigned char *in_map;
310 unsigned short *out_map;
311 unsigned i;
312
313 new_elts = screen->buffer_create(screen, 32,
314 PIPE_BUFFER_USAGE_INDEX |
315 PIPE_BUFFER_USAGE_CPU_WRITE |
316 PIPE_BUFFER_USAGE_GPU_READ,
317 2 * count);
318
319 in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
320 out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
321
322 for (i = 0; i < count; i++) {
323 *out_map = (unsigned short)*in_map;
324 in_map++;
325 out_map++;
326 }
327
328 pipe_buffer_unmap(screen, *elts);
329 pipe_buffer_unmap(screen, new_elts);
330
331 *elts = new_elts;
332 }
333
334 /* This is the fast-path drawing & emission for HW TCL. */
335 void r300_draw_range_elements(struct pipe_context* pipe,
336 struct pipe_buffer* indexBuffer,
337 unsigned indexSize,
338 unsigned minIndex,
339 unsigned maxIndex,
340 unsigned mode,
341 unsigned start,
342 unsigned count)
343 {
344 struct r300_context* r300 = r300_context(pipe);
345 struct pipe_buffer* orgIndexBuffer = indexBuffer;
346
347 if (!u_trim_pipe_prim(mode, &count)) {
348 return;
349 }
350
351 if (count > 65535) {
352 /* XXX: use aux/indices functions to split this into smaller
353 * primitives.
354 */
355 return;
356 }
357
358 r300_update_derived_state(r300);
359
360 r300_emit_buffer_validate(r300);
361
362 if (!r300_setup_vertex_buffers(r300)) {
363 return;
364 }
365
366 if (indexSize == 1) {
367 r300_shorten_ubyte_elts(r300, &indexBuffer, count);
368 indexSize = 2;
369 }
370
371 if (!r300->winsys->add_buffer(r300->winsys, indexBuffer,
372 RADEON_GEM_DOMAIN_GTT, 0)) {
373 goto cleanup;
374 }
375
376 if (!r300->winsys->validate(r300->winsys)) {
377 goto cleanup;
378 }
379
380 r300_emit_dirty_state(r300);
381
382 r300_emit_aos(r300, 0);
383
384 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex, maxIndex,
385 mode, start, count);
386
387 cleanup:
388 if (indexBuffer != orgIndexBuffer) {
389 pipe->screen->buffer_destroy(indexBuffer);
390 }
391 }
392
393 /* Simple helpers for context setup. Should probably be moved to util. */
394 void r300_draw_elements(struct pipe_context* pipe,
395 struct pipe_buffer* indexBuffer,
396 unsigned indexSize, unsigned mode,
397 unsigned start, unsigned count)
398 {
399 pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0, ~0,
400 mode, start, count);
401 }
402
403 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
404 unsigned start, unsigned count)
405 {
406 struct r300_context* r300 = r300_context(pipe);
407
408 if (!u_trim_pipe_prim(mode, &count)) {
409 return;
410 }
411
412 if (count > 65535) {
413 /* XXX: driver needs to handle this -- use the functions in
414 * aux/indices to split this into several smaller primitives.
415 */
416 return;
417 }
418
419 r300_update_derived_state(r300);
420
421 r300_emit_buffer_validate(r300);
422
423 if (immd_is_good_idea(r300, count)) {
424 r300_emit_draw_arrays_immediate(r300, mode, start, count);
425 } else {
426 if (!r300_setup_vertex_buffers(r300)) {
427 return;
428 }
429
430 r300_emit_dirty_state(r300);
431 r300_emit_aos(r300, start);
432 r300_emit_draw_arrays(r300, mode, count);
433 }
434 }
435
436 /****************************************************************************
437 * The rest of this file is for SW TCL rendering only. Please be polite and *
438 * keep these functions separated so that they are easier to locate. ~C. *
439 ***************************************************************************/
440
441 /* SW TCL arrays, using Draw. */
442 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
443 unsigned mode,
444 unsigned start,
445 unsigned count)
446 {
447 struct r300_context* r300 = r300_context(pipe);
448 int i;
449
450 if (!u_trim_pipe_prim(mode, &count)) {
451 return;
452 }
453
454 for (i = 0; i < r300->vertex_buffer_count; i++) {
455 void* buf = pipe_buffer_map(pipe->screen,
456 r300->vertex_buffer[i].buffer,
457 PIPE_BUFFER_USAGE_CPU_READ);
458 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
459 }
460
461 draw_set_mapped_element_buffer(r300->draw, 0, NULL);
462
463 draw_set_mapped_constant_buffer(r300->draw,
464 PIPE_SHADER_VERTEX,
465 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
466 r300->shader_constants[PIPE_SHADER_VERTEX].count *
467 (sizeof(float) * 4));
468
469 draw_arrays(r300->draw, mode, start, count);
470
471 for (i = 0; i < r300->vertex_buffer_count; i++) {
472 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
473 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
474 }
475 }
476
477 /* SW TCL elements, using Draw. */
478 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
479 struct pipe_buffer* indexBuffer,
480 unsigned indexSize,
481 unsigned minIndex,
482 unsigned maxIndex,
483 unsigned mode,
484 unsigned start,
485 unsigned count)
486 {
487 struct r300_context* r300 = r300_context(pipe);
488 int i;
489 void* indices;
490
491 if (!u_trim_pipe_prim(mode, &count)) {
492 return;
493 }
494
495 for (i = 0; i < r300->vertex_buffer_count; i++) {
496 void* buf = pipe_buffer_map(pipe->screen,
497 r300->vertex_buffer[i].buffer,
498 PIPE_BUFFER_USAGE_CPU_READ);
499 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
500 }
501
502 indices = pipe_buffer_map(pipe->screen, indexBuffer,
503 PIPE_BUFFER_USAGE_CPU_READ);
504 draw_set_mapped_element_buffer_range(r300->draw, indexSize,
505 minIndex, maxIndex, indices);
506
507 draw_set_mapped_constant_buffer(r300->draw,
508 PIPE_SHADER_VERTEX,
509 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
510 r300->shader_constants[PIPE_SHADER_VERTEX].count *
511 (sizeof(float) * 4));
512
513 draw_arrays(r300->draw, mode, start, count);
514
515 for (i = 0; i < r300->vertex_buffer_count; i++) {
516 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
517 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
518 }
519
520 pipe_buffer_unmap(pipe->screen, indexBuffer);
521 draw_set_mapped_element_buffer_range(r300->draw, 0, start,
522 start + count - 1, NULL);
523 }
524
525 /* Object for rendering using Draw. */
526 struct r300_render {
527 /* Parent class */
528 struct vbuf_render base;
529
530 /* Pipe context */
531 struct r300_context* r300;
532
533 /* Vertex information */
534 size_t vertex_size;
535 unsigned prim;
536 unsigned hwprim;
537
538 /* VBO */
539 struct pipe_buffer* vbo;
540 size_t vbo_size;
541 size_t vbo_offset;
542 size_t vbo_max_used;
543 void * vbo_ptr;
544 };
545
546 static INLINE struct r300_render*
547 r300_render(struct vbuf_render* render)
548 {
549 return (struct r300_render*)render;
550 }
551
552 static const struct vertex_info*
553 r300_render_get_vertex_info(struct vbuf_render* render)
554 {
555 struct r300_render* r300render = r300_render(render);
556 struct r300_context* r300 = r300render->r300;
557
558 r300_update_derived_state(r300);
559
560 return (struct vertex_info*)r300->vertex_format_state.state;
561 }
562
563 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
564 ushort vertex_size,
565 ushort count)
566 {
567 struct r300_render* r300render = r300_render(render);
568 struct r300_context* r300 = r300render->r300;
569 struct pipe_screen* screen = r300->context.screen;
570 size_t size = (size_t)vertex_size * (size_t)count;
571
572 if (size + r300render->vbo_offset > r300render->vbo_size)
573 {
574 pipe_buffer_reference(&r300->vbo, NULL);
575 r300render->vbo = pipe_buffer_create(screen,
576 64,
577 PIPE_BUFFER_USAGE_VERTEX,
578 R300_MAX_VBO_SIZE);
579 r300render->vbo_offset = 0;
580 r300render->vbo_size = R300_MAX_VBO_SIZE;
581 }
582
583 r300render->vertex_size = vertex_size;
584 r300->vbo = r300render->vbo;
585 r300->vbo_offset = r300render->vbo_offset;
586
587 return (r300render->vbo) ? TRUE : FALSE;
588 }
589
590 static void* r300_render_map_vertices(struct vbuf_render* render)
591 {
592 struct r300_render* r300render = r300_render(render);
593 struct pipe_screen* screen = r300render->r300->context.screen;
594
595 r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo,
596 PIPE_BUFFER_USAGE_CPU_WRITE);
597
598 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
599 }
600
601 static void r300_render_unmap_vertices(struct vbuf_render* render,
602 ushort min,
603 ushort max)
604 {
605 struct r300_render* r300render = r300_render(render);
606 struct pipe_screen* screen = r300render->r300->context.screen;
607 CS_LOCALS(r300render->r300);
608 BEGIN_CS(2);
609 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
610 END_CS;
611
612 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
613 r300render->vertex_size * (max + 1));
614 pipe_buffer_unmap(screen, r300render->vbo);
615 }
616
617 static void r300_render_release_vertices(struct vbuf_render* render)
618 {
619 struct r300_render* r300render = r300_render(render);
620
621 r300render->vbo_offset += r300render->vbo_max_used;
622 r300render->vbo_max_used = 0;
623 }
624
625 static boolean r300_render_set_primitive(struct vbuf_render* render,
626 unsigned prim)
627 {
628 struct r300_render* r300render = r300_render(render);
629
630 r300render->prim = prim;
631 r300render->hwprim = r300_translate_primitive(prim);
632
633 return TRUE;
634 }
635
636 static void r300_render_draw_arrays(struct vbuf_render* render,
637 unsigned start,
638 unsigned count)
639 {
640 struct r300_render* r300render = r300_render(render);
641 struct r300_context* r300 = r300render->r300;
642
643 CS_LOCALS(r300);
644
645 r300_emit_dirty_state(r300);
646
647 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
648
649 BEGIN_CS(2);
650 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
651 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
652 r300render->hwprim);
653 END_CS;
654 }
655
656 static void r300_render_draw(struct vbuf_render* render,
657 const ushort* indices,
658 uint count)
659 {
660 struct r300_render* r300render = r300_render(render);
661 struct r300_context* r300 = r300render->r300;
662 int i;
663
664 CS_LOCALS(r300);
665
666 r300_emit_dirty_state(r300);
667
668 BEGIN_CS(2 + (count+1)/2);
669 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
670 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
671 r300render->hwprim);
672 for (i = 0; i < count-1; i += 2) {
673 OUT_CS(indices[i+1] << 16 | indices[i]);
674 }
675 if (count % 2) {
676 OUT_CS(indices[count-1]);
677 }
678 END_CS;
679 }
680
681 static void r300_render_destroy(struct vbuf_render* render)
682 {
683 FREE(render);
684 }
685
686 static struct vbuf_render* r300_render_create(struct r300_context* r300)
687 {
688 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
689
690 r300render->r300 = r300;
691
692 /* XXX find real numbers plz */
693 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
694 r300render->base.max_indices = 16 * 1024;
695
696 r300render->base.get_vertex_info = r300_render_get_vertex_info;
697 r300render->base.allocate_vertices = r300_render_allocate_vertices;
698 r300render->base.map_vertices = r300_render_map_vertices;
699 r300render->base.unmap_vertices = r300_render_unmap_vertices;
700 r300render->base.set_primitive = r300_render_set_primitive;
701 r300render->base.draw = r300_render_draw;
702 r300render->base.draw_arrays = r300_render_draw_arrays;
703 r300render->base.release_vertices = r300_render_release_vertices;
704 r300render->base.destroy = r300_render_destroy;
705
706 r300render->vbo = NULL;
707 r300render->vbo_size = 0;
708 r300render->vbo_offset = 0;
709
710 return &r300render->base;
711 }
712
713 struct draw_stage* r300_draw_stage(struct r300_context* r300)
714 {
715 struct vbuf_render* render;
716 struct draw_stage* stage;
717
718 render = r300_render_create(r300);
719
720 if (!render) {
721 return NULL;
722 }
723
724 stage = draw_vbuf_stage(r300->draw, render);
725
726 if (!stage) {
727 render->destroy(render);
728 return NULL;
729 }
730
731 draw_set_render(r300->draw, render);
732
733 return stage;
734 }