r300g/swtcl: force vertex prefetching for non-indexed primitives
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "util/u_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_upload_mgr.h"
34 #include "util/u_prim.h"
35
36 #include "r300_cs.h"
37 #include "r300_context.h"
38 #include "r300_screen_buffer.h"
39 #include "r300_emit.h"
40 #include "r300_reg.h"
41 #include "r300_state_derived.h"
42
43 static uint32_t r300_translate_primitive(unsigned prim)
44 {
45 switch (prim) {
46 case PIPE_PRIM_POINTS:
47 return R300_VAP_VF_CNTL__PRIM_POINTS;
48 case PIPE_PRIM_LINES:
49 return R300_VAP_VF_CNTL__PRIM_LINES;
50 case PIPE_PRIM_LINE_LOOP:
51 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
52 case PIPE_PRIM_LINE_STRIP:
53 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
54 case PIPE_PRIM_TRIANGLES:
55 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
56 case PIPE_PRIM_TRIANGLE_STRIP:
57 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
58 case PIPE_PRIM_TRIANGLE_FAN:
59 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
60 case PIPE_PRIM_QUADS:
61 return R300_VAP_VF_CNTL__PRIM_QUADS;
62 case PIPE_PRIM_QUAD_STRIP:
63 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
64 case PIPE_PRIM_POLYGON:
65 return R300_VAP_VF_CNTL__PRIM_POLYGON;
66 default:
67 return 0;
68 }
69 }
70
71 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
72 unsigned mode)
73 {
74 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
75 uint32_t color_control = rs->color_control;
76
77 /* By default (see r300_state.c:r300_create_rs_state) color_control is
78 * initialized to provoking the first vertex.
79 *
80 * Triangle fans must be reduced to the second vertex, not the first, in
81 * Gallium flatshade-first mode, as per the GL spec.
82 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
83 *
84 * Quads never provoke correctly in flatshade-first mode. The first
85 * vertex is never considered as provoking, so only the second, third,
86 * and fourth vertices can be selected, and both "third" and "last" modes
87 * select the fourth vertex. This is probably due to D3D lacking quads.
88 *
89 * Similarly, polygons reduce to the first, not the last, vertex, when in
90 * "last" mode, and all other modes start from the second vertex.
91 *
92 * ~ C.
93 */
94
95 if (rs->rs.flatshade_first) {
96 switch (mode) {
97 case PIPE_PRIM_TRIANGLE_FAN:
98 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
99 break;
100 case PIPE_PRIM_QUADS:
101 case PIPE_PRIM_QUAD_STRIP:
102 case PIPE_PRIM_POLYGON:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
104 break;
105 default:
106 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
107 break;
108 }
109 } else {
110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
111 }
112
113 return color_control;
114 }
115
116 static void r500_emit_index_offset(struct r300_context *r300, int index_bias)
117 {
118 CS_LOCALS(r300);
119
120 if (r300->screen->caps.is_r500 &&
121 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
122 BEGIN_CS(2);
123 OUT_CS_REG(R500_VAP_INDEX_OFFSET,
124 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));
125 END_CS;
126 } else {
127 if (index_bias) {
128 fprintf(stderr, "r300: Non-zero index bias is unsupported "
129 "on this hardware.\n");
130 assert(0);
131 }
132 }
133 }
134
135 enum r300_prepare_flags {
136 PREP_FIRST_DRAW = (1 << 0),
137 PREP_VALIDATE_VBOS = (1 << 1),
138 PREP_EMIT_AOS = (1 << 2),
139 PREP_EMIT_AOS_SWTCL = (1 << 3),
140 PREP_INDEXED = (1 << 4)
141 };
142
143 /* Check if the requested number of dwords is available in the CS and
144 * if not, flush. Then validate buffers and emit dirty state.
145 * Return TRUE if flush occured. */
146 static void r300_prepare_for_rendering(struct r300_context *r300,
147 enum r300_prepare_flags flags,
148 struct pipe_resource *index_buffer,
149 unsigned cs_dwords,
150 unsigned aos_offset,
151 int index_bias)
152 {
153 boolean flushed = FALSE;
154 boolean first_draw = flags & PREP_FIRST_DRAW;
155 boolean emit_aos = flags & PREP_EMIT_AOS;
156 boolean emit_aos_swtcl = flags & PREP_EMIT_AOS_SWTCL;
157
158 /* Stencil ref fallback. */
159 if (r300->stencil_ref_bf_fallback) {
160 cs_dwords = cs_dwords * 2 + 10;
161 }
162
163 /* Add dirty state, index offset, and AOS. */
164 if (first_draw) {
165 cs_dwords += r300_get_num_dirty_dwords(r300);
166
167 if (r300->screen->caps.is_r500)
168 cs_dwords += 2; /* emit_index_offset */
169
170 if (emit_aos)
171 cs_dwords += 55; /* emit_aos */
172
173 if (emit_aos_swtcl)
174 cs_dwords += 7; /* emit_aos_swtcl */
175 }
176
177 /* Emitted in flush. */
178 cs_dwords += 26; /* emit_query_end */
179
180 /* Reserve requested CS space. */
181 if (!r300_check_cs(r300, cs_dwords)) {
182 r300->context.flush(&r300->context, 0, NULL);
183 flushed = TRUE;
184 }
185
186 /* Validate buffers and emit dirty state if needed. */
187 if (first_draw || flushed) {
188 r300_emit_buffer_validate(r300, flags & PREP_VALIDATE_VBOS, index_buffer);
189 r300_emit_dirty_state(r300);
190 r500_emit_index_offset(r300, index_bias);
191 if (emit_aos)
192 r300_emit_aos(r300, aos_offset, flags & PREP_INDEXED);
193 if (emit_aos_swtcl)
194 r300_emit_aos_swtcl(r300, flags & PREP_INDEXED);
195 }
196 }
197
198 static boolean immd_is_good_idea(struct r300_context *r300,
199 unsigned count)
200 {
201 struct pipe_vertex_element* velem;
202 struct pipe_vertex_buffer* vbuf;
203 boolean checked[PIPE_MAX_ATTRIBS] = {0};
204 unsigned vertex_element_count = r300->velems->count;
205 unsigned i, vbi;
206
207 if (DBG_ON(r300, DBG_NO_IMMD)) {
208 return FALSE;
209 }
210
211 if (r300->draw) {
212 return FALSE;
213 }
214
215 if (count > 10) {
216 return FALSE;
217 }
218
219 /* We shouldn't map buffers referenced by CS, busy buffers,
220 * and ones placed in VRAM. */
221 /* XXX Check for VRAM buffers. */
222 for (i = 0; i < vertex_element_count; i++) {
223 velem = &r300->velems->velem[i];
224 vbi = velem->vertex_buffer_index;
225
226 if (!checked[vbi]) {
227 vbuf = &r300->vertex_buffer[vbi];
228
229 if (r300_buffer_is_referenced(&r300->context,
230 vbuf->buffer,
231 R300_REF_CS | R300_REF_HW)) {
232 /* It's a very bad idea to map it... */
233 return FALSE;
234 }
235 checked[vbi] = TRUE;
236 }
237 }
238 return TRUE;
239 }
240
241 /*****************************************************************************
242 * The emission of draw packets for r500. Older GPUs may use these functions *
243 * after resolving fallback issues (e.g. stencil ref two-sided). *
244 ****************************************************************************/
245
246 static void r500_emit_draw_arrays_immediate(struct r300_context *r300,
247 unsigned mode,
248 unsigned start,
249 unsigned count)
250 {
251 struct pipe_vertex_element* velem;
252 struct pipe_vertex_buffer* vbuf;
253 unsigned vertex_element_count = r300->velems->count;
254 unsigned i, v, vbi, dw, elem_offset, dwords;
255
256 /* Size of the vertex, in dwords. */
257 unsigned vertex_size = 0;
258
259 /* Offsets of the attribute, in dwords, from the start of the vertex. */
260 unsigned offset[PIPE_MAX_ATTRIBS];
261
262 /* Size of the vertex element, in dwords. */
263 unsigned size[PIPE_MAX_ATTRIBS];
264
265 /* Stride to the same attrib in the next vertex in the vertex buffer,
266 * in dwords. */
267 unsigned stride[PIPE_MAX_ATTRIBS] = {0};
268
269 /* Mapped vertex buffers. */
270 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
271 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {NULL};
272
273 CS_LOCALS(r300);
274
275 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
276 for (i = 0; i < vertex_element_count; i++) {
277 velem = &r300->velems->velem[i];
278 offset[i] = velem->src_offset / 4;
279 size[i] = util_format_get_blocksize(velem->src_format) / 4;
280 vertex_size += size[i];
281 vbi = velem->vertex_buffer_index;
282
283 /* Map the buffer. */
284 if (!map[vbi]) {
285 vbuf = &r300->vertex_buffer[vbi];
286 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context,
287 vbuf->buffer,
288 PIPE_TRANSFER_READ,
289 &transfer[vbi]);
290 map[vbi] += vbuf->buffer_offset / 4;
291 stride[vbi] = vbuf->stride / 4;
292 }
293 }
294
295 dwords = 9 + count * vertex_size;
296
297 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0);
298
299 BEGIN_CS(dwords);
300 OUT_CS_REG(R300_GA_COLOR_CONTROL,
301 r300_provoking_vertex_fixes(r300, mode));
302 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
303 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
304 OUT_CS(count - 1);
305 OUT_CS(0);
306 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
307 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
308 r300_translate_primitive(mode));
309
310 /* Emit vertices. */
311 for (v = 0; v < count; v++) {
312 for (i = 0; i < vertex_element_count; i++) {
313 velem = &r300->velems->velem[i];
314 vbi = velem->vertex_buffer_index;
315 elem_offset = offset[i] + stride[vbi] * (v + start);
316
317 for (dw = 0; dw < size[i]; dw++) {
318 OUT_CS(map[vbi][elem_offset + dw]);
319 }
320 }
321 }
322 END_CS;
323
324 /* Unmap buffers. */
325 for (i = 0; i < vertex_element_count; i++) {
326 vbi = r300->velems->velem[i].vertex_buffer_index;
327
328 if (map[vbi]) {
329 vbuf = &r300->vertex_buffer[vbi];
330 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]);
331 map[vbi] = NULL;
332 }
333 }
334 }
335
336 static void r500_emit_draw_arrays(struct r300_context *r300,
337 unsigned mode,
338 unsigned count)
339 {
340 boolean alt_num_verts = count > 65535;
341 CS_LOCALS(r300);
342
343 if (count >= (1 << 24)) {
344 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
345 "refusing to render.\n", count);
346 return;
347 }
348
349 BEGIN_CS(7 + (alt_num_verts ? 2 : 0));
350 if (alt_num_verts) {
351 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
352 }
353 OUT_CS_REG(R300_GA_COLOR_CONTROL,
354 r300_provoking_vertex_fixes(r300, mode));
355 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
356 OUT_CS(count - 1);
357 OUT_CS(0);
358 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
359 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
360 r300_translate_primitive(mode) |
361 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
362 END_CS;
363 }
364
365 static void r500_emit_draw_elements(struct r300_context *r300,
366 struct pipe_resource* indexBuffer,
367 unsigned indexSize,
368 unsigned minIndex,
369 unsigned maxIndex,
370 unsigned mode,
371 unsigned start,
372 unsigned count)
373 {
374 uint32_t count_dwords;
375 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
376 boolean alt_num_verts = count > 65535;
377 CS_LOCALS(r300);
378
379 if (count >= (1 << 24)) {
380 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
381 "refusing to render.\n", count);
382 return;
383 }
384
385 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
386
387 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
388 count, minIndex, maxIndex);
389
390 BEGIN_CS(13 + (alt_num_verts ? 2 : 0));
391 if (alt_num_verts) {
392 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
393 }
394 OUT_CS_REG(R300_GA_COLOR_CONTROL,
395 r300_provoking_vertex_fixes(r300, mode));
396 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
397 OUT_CS(maxIndex);
398 OUT_CS(minIndex);
399 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
400 if (indexSize == 4) {
401 count_dwords = count;
402 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
403 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
404 r300_translate_primitive(mode) |
405 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
406 } else {
407 count_dwords = (count + 1) / 2;
408 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
409 r300_translate_primitive(mode) |
410 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
411 }
412
413 /* INDX_BUFFER is a truly special packet3.
414 * Unlike most other packet3, where the offset is after the count,
415 * the order is reversed, so the relocation ends up carrying the
416 * size of the indexbuf instead of the offset.
417 */
418 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
419 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
420 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
421 OUT_CS(offset_dwords << 2);
422 OUT_CS_BUF_RELOC(indexBuffer, count_dwords,
423 RADEON_GEM_DOMAIN_GTT, 0, 0);
424
425 END_CS;
426 }
427
428 /*****************************************************************************
429 * The emission of draw packets for r300 which take care of the two-sided *
430 * stencil ref fallback and call r500's functions. *
431 ****************************************************************************/
432
433 /* Set drawing for front faces. */
434 static void r300_begin_stencil_ref_fallback(struct r300_context *r300)
435 {
436 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
437 CS_LOCALS(r300);
438
439 BEGIN_CS(2);
440 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK);
441 END_CS;
442 }
443
444 /* Set drawing for back faces. */
445 static void r300_switch_stencil_ref_side(struct r300_context *r300)
446 {
447 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
448 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
449 CS_LOCALS(r300);
450
451 BEGIN_CS(4);
452 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT);
453 OUT_CS_REG(R300_ZB_STENCILREFMASK,
454 dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]);
455 END_CS;
456 }
457
458 /* Restore the original state. */
459 static void r300_end_stencil_ref_fallback(struct r300_context *r300)
460 {
461 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
462 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
463 CS_LOCALS(r300);
464
465 BEGIN_CS(4);
466 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode);
467 OUT_CS_REG(R300_ZB_STENCILREFMASK,
468 dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]);
469 END_CS;
470 }
471
472 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
473 unsigned mode,
474 unsigned start,
475 unsigned count)
476 {
477 if (!r300->stencil_ref_bf_fallback) {
478 r500_emit_draw_arrays_immediate(r300, mode, start, count);
479 } else {
480 r300_begin_stencil_ref_fallback(r300);
481 r500_emit_draw_arrays_immediate(r300, mode, start, count);
482 r300_switch_stencil_ref_side(r300);
483 r500_emit_draw_arrays_immediate(r300, mode, start, count);
484 r300_end_stencil_ref_fallback(r300);
485 }
486 }
487
488 static void r300_emit_draw_arrays(struct r300_context *r300,
489 unsigned mode,
490 unsigned count)
491 {
492 if (!r300->stencil_ref_bf_fallback) {
493 r500_emit_draw_arrays(r300, mode, count);
494 } else {
495 r300_begin_stencil_ref_fallback(r300);
496 r500_emit_draw_arrays(r300, mode, count);
497 r300_switch_stencil_ref_side(r300);
498 r500_emit_draw_arrays(r300, mode, count);
499 r300_end_stencil_ref_fallback(r300);
500 }
501 }
502
503 static void r300_emit_draw_elements(struct r300_context *r300,
504 struct pipe_resource* indexBuffer,
505 unsigned indexSize,
506 unsigned minIndex,
507 unsigned maxIndex,
508 unsigned mode,
509 unsigned start,
510 unsigned count)
511 {
512 if (!r300->stencil_ref_bf_fallback) {
513 r500_emit_draw_elements(r300, indexBuffer, indexSize,
514 minIndex, maxIndex, mode, start, count);
515 } else {
516 r300_begin_stencil_ref_fallback(r300);
517 r500_emit_draw_elements(r300, indexBuffer, indexSize,
518 minIndex, maxIndex, mode, start, count);
519 r300_switch_stencil_ref_side(r300);
520 r500_emit_draw_elements(r300, indexBuffer, indexSize,
521 minIndex, maxIndex, mode, start, count);
522 r300_end_stencil_ref_fallback(r300);
523 }
524 }
525
526 static void r300_shorten_ubyte_elts(struct r300_context* r300,
527 struct pipe_resource** elts,
528 unsigned start,
529 unsigned count)
530 {
531 struct pipe_context* context = &r300->context;
532 struct pipe_screen* screen = r300->context.screen;
533 struct pipe_resource* new_elts;
534 unsigned char *in_map;
535 unsigned short *out_map;
536 struct pipe_transfer *src_transfer, *dst_transfer;
537 unsigned i;
538
539 new_elts = pipe_buffer_create(screen,
540 PIPE_BIND_INDEX_BUFFER,
541 2 * count);
542
543 in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer);
544 out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer);
545
546 in_map += start;
547
548 for (i = 0; i < count; i++) {
549 *out_map = (unsigned short)*in_map;
550 in_map++;
551 out_map++;
552 }
553
554 pipe_buffer_unmap(context, *elts, src_transfer);
555 pipe_buffer_unmap(context, new_elts, dst_transfer);
556
557 *elts = new_elts;
558 }
559
560 static void r300_align_ushort_elts(struct r300_context *r300,
561 struct pipe_resource **elts,
562 unsigned start, unsigned count)
563 {
564 struct pipe_context* context = &r300->context;
565 struct pipe_transfer *in_transfer = NULL;
566 struct pipe_transfer *out_transfer = NULL;
567 struct pipe_resource* new_elts;
568 unsigned short *in_map;
569 unsigned short *out_map;
570
571 new_elts = pipe_buffer_create(context->screen,
572 PIPE_BIND_INDEX_BUFFER,
573 2 * count);
574
575 in_map = pipe_buffer_map(context, *elts,
576 PIPE_TRANSFER_READ, &in_transfer);
577 out_map = pipe_buffer_map(context, new_elts,
578 PIPE_TRANSFER_WRITE, &out_transfer);
579
580 memcpy(out_map, in_map+start, 2 * count);
581
582 pipe_buffer_unmap(context, *elts, in_transfer);
583 pipe_buffer_unmap(context, new_elts, out_transfer);
584
585 *elts = new_elts;
586 }
587
588 /* This is the fast-path drawing & emission for HW TCL. */
589 static void r300_draw_range_elements(struct pipe_context* pipe,
590 struct pipe_resource* indexBuffer,
591 unsigned indexSize,
592 int indexBias,
593 unsigned minIndex,
594 unsigned maxIndex,
595 unsigned mode,
596 unsigned start,
597 unsigned count)
598 {
599 struct r300_context* r300 = r300_context(pipe);
600 struct pipe_resource* orgIndexBuffer = indexBuffer;
601 boolean alt_num_verts = r300->screen->caps.is_r500 &&
602 count > 65536 &&
603 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
604 unsigned short_count;
605
606 if (r300->skip_rendering) {
607 return;
608 }
609
610 if (!u_trim_pipe_prim(mode, &count)) {
611 return;
612 }
613
614 if (indexSize == 1) {
615 r300_shorten_ubyte_elts(r300, &indexBuffer, start, count);
616 indexSize = 2;
617 start = 0;
618 } else if (indexSize == 2 && start % 2 != 0) {
619 r300_align_ushort_elts(r300, &indexBuffer, start, count);
620 start = 0;
621 }
622
623 r300_update_derived_state(r300);
624 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count);
625
626 /* 15 dwords for emit_draw_elements */
627 r300_prepare_for_rendering(r300,
628 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED,
629 indexBuffer, 15, 0, indexBias);
630
631 u_upload_flush(r300->upload_vb);
632 u_upload_flush(r300->upload_ib);
633 if (alt_num_verts || count <= 65535) {
634 r300->emit_draw_elements(r300, indexBuffer, indexSize,
635 minIndex, maxIndex, mode, start, count);
636 } else {
637 do {
638 short_count = MIN2(count, 65534);
639 r300->emit_draw_elements(r300, indexBuffer, indexSize,
640 minIndex, maxIndex,
641 mode, start, short_count);
642
643 start += short_count;
644 count -= short_count;
645
646 /* 15 dwords for emit_draw_elements */
647 if (count) {
648 r300_prepare_for_rendering(r300,
649 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED,
650 indexBuffer, 15, 0, indexBias);
651 }
652 } while (count);
653 }
654
655 if (indexBuffer != orgIndexBuffer) {
656 pipe_resource_reference( &indexBuffer, NULL );
657 }
658 }
659
660 /* Simple helpers for context setup. Should probably be moved to util. */
661 static void r300_draw_elements(struct pipe_context* pipe,
662 struct pipe_resource* indexBuffer,
663 unsigned indexSize, int indexBias, unsigned mode,
664 unsigned start, unsigned count)
665 {
666 struct r300_context *r300 = r300_context(pipe);
667
668 pipe->draw_range_elements(pipe, indexBuffer, indexSize, indexBias,
669 0, r300->vertex_buffer_max_index,
670 mode, start, count);
671 }
672
673 static void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
674 unsigned start, unsigned count)
675 {
676 struct r300_context* r300 = r300_context(pipe);
677 boolean alt_num_verts = r300->screen->caps.is_r500 &&
678 count > 65536 &&
679 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
680 unsigned short_count;
681
682 if (r300->skip_rendering) {
683 return;
684 }
685
686 if (!u_trim_pipe_prim(mode, &count)) {
687 return;
688 }
689
690 r300_update_derived_state(r300);
691
692 if (immd_is_good_idea(r300, count)) {
693 r300->emit_draw_arrays_immediate(r300, mode, start, count);
694 } else {
695 /* 9 spare dwords for emit_draw_arrays. */
696 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS,
697 NULL, 9, start, 0);
698
699 if (alt_num_verts || count <= 65535) {
700 r300->emit_draw_arrays(r300, mode, count);
701 } else {
702 do {
703 short_count = MIN2(count, 65535);
704 r300->emit_draw_arrays(r300, mode, short_count);
705
706 start += short_count;
707 count -= short_count;
708
709 /* 9 spare dwords for emit_draw_arrays. */
710 if (count) {
711 r300_prepare_for_rendering(r300,
712 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9,
713 start, 0);
714 }
715 } while (count);
716 }
717 u_upload_flush(r300->upload_vb);
718 }
719 }
720
721 /****************************************************************************
722 * The rest of this file is for SW TCL rendering only. Please be polite and *
723 * keep these functions separated so that they are easier to locate. ~C. *
724 ***************************************************************************/
725
726 /* SW TCL arrays, using Draw. */
727 static void r300_swtcl_draw_arrays(struct pipe_context* pipe,
728 unsigned mode,
729 unsigned start,
730 unsigned count)
731 {
732 struct r300_context* r300 = r300_context(pipe);
733 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
734 int i;
735
736 if (r300->skip_rendering) {
737 return;
738 }
739
740 if (!u_trim_pipe_prim(mode, &count)) {
741 return;
742 }
743
744 r300_update_derived_state(r300);
745
746 for (i = 0; i < r300->vertex_buffer_count; i++) {
747 void* buf = pipe_buffer_map(pipe,
748 r300->vertex_buffer[i].buffer,
749 PIPE_TRANSFER_READ,
750 &vb_transfer[i]);
751 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
752 }
753
754 draw_set_mapped_element_buffer(r300->draw, 0, 0, NULL);
755
756 draw_arrays(r300->draw, mode, start, count);
757
758 /* XXX Not sure whether this is the best fix.
759 * It prevents CS from being rejected and weird assertion failures. */
760 draw_flush(r300->draw);
761
762 for (i = 0; i < r300->vertex_buffer_count; i++) {
763 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
764 vb_transfer[i]);
765 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
766 }
767 }
768
769 /* SW TCL elements, using Draw. */
770 static void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
771 struct pipe_resource* indexBuffer,
772 unsigned indexSize,
773 int indexBias,
774 unsigned minIndex,
775 unsigned maxIndex,
776 unsigned mode,
777 unsigned start,
778 unsigned count)
779 {
780 struct r300_context* r300 = r300_context(pipe);
781 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
782 struct pipe_transfer *ib_transfer;
783 int i;
784 void* indices;
785
786 if (r300->skip_rendering) {
787 return;
788 }
789
790 if (!u_trim_pipe_prim(mode, &count)) {
791 return;
792 }
793
794 r300_update_derived_state(r300);
795
796 for (i = 0; i < r300->vertex_buffer_count; i++) {
797 void* buf = pipe_buffer_map(pipe,
798 r300->vertex_buffer[i].buffer,
799 PIPE_TRANSFER_READ,
800 &vb_transfer[i]);
801 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
802 }
803
804 indices = pipe_buffer_map(pipe, indexBuffer,
805 PIPE_TRANSFER_READ, &ib_transfer);
806 draw_set_mapped_element_buffer_range(r300->draw, indexSize, indexBias,
807 minIndex, maxIndex, indices);
808
809 draw_arrays(r300->draw, mode, start, count);
810
811 /* XXX Not sure whether this is the best fix.
812 * It prevents CS from being rejected and weird assertion failures. */
813 draw_flush(r300->draw);
814
815 for (i = 0; i < r300->vertex_buffer_count; i++) {
816 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
817 vb_transfer[i]);
818 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
819 }
820
821 pipe_buffer_unmap(pipe, indexBuffer,
822 ib_transfer);
823 draw_set_mapped_element_buffer_range(r300->draw, 0, 0,
824 start, start + count - 1,
825 NULL);
826 }
827
828 /* Object for rendering using Draw. */
829 struct r300_render {
830 /* Parent class */
831 struct vbuf_render base;
832
833 /* Pipe context */
834 struct r300_context* r300;
835
836 /* Vertex information */
837 size_t vertex_size;
838 unsigned prim;
839 unsigned hwprim;
840
841 /* VBO */
842 struct pipe_resource* vbo;
843 size_t vbo_size;
844 size_t vbo_offset;
845 size_t vbo_max_used;
846 void * vbo_ptr;
847
848 struct pipe_transfer *vbo_transfer;
849 };
850
851 static INLINE struct r300_render*
852 r300_render(struct vbuf_render* render)
853 {
854 return (struct r300_render*)render;
855 }
856
857 static const struct vertex_info*
858 r300_render_get_vertex_info(struct vbuf_render* render)
859 {
860 struct r300_render* r300render = r300_render(render);
861 struct r300_context* r300 = r300render->r300;
862
863 return &r300->vertex_info;
864 }
865
866 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
867 ushort vertex_size,
868 ushort count)
869 {
870 struct r300_render* r300render = r300_render(render);
871 struct r300_context* r300 = r300render->r300;
872 struct pipe_screen* screen = r300->context.screen;
873 size_t size = (size_t)vertex_size * (size_t)count;
874
875 if (size + r300render->vbo_offset > r300render->vbo_size)
876 {
877 pipe_resource_reference(&r300->vbo, NULL);
878 r300render->vbo = pipe_buffer_create(screen,
879 PIPE_BIND_VERTEX_BUFFER,
880 R300_MAX_DRAW_VBO_SIZE);
881 r300render->vbo_offset = 0;
882 r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE;
883 }
884
885 r300render->vertex_size = vertex_size;
886 r300->vbo = r300render->vbo;
887 r300->vbo_offset = r300render->vbo_offset;
888
889 return (r300render->vbo) ? TRUE : FALSE;
890 }
891
892 static void* r300_render_map_vertices(struct vbuf_render* render)
893 {
894 struct r300_render* r300render = r300_render(render);
895
896 assert(!r300render->vbo_transfer);
897
898 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
899 r300render->vbo,
900 PIPE_TRANSFER_WRITE,
901 &r300render->vbo_transfer);
902
903 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
904 }
905
906 static void r300_render_unmap_vertices(struct vbuf_render* render,
907 ushort min,
908 ushort max)
909 {
910 struct r300_render* r300render = r300_render(render);
911 struct pipe_context* context = &r300render->r300->context;
912
913 assert(r300render->vbo_transfer);
914
915 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
916 r300render->vertex_size * (max + 1));
917 pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer);
918
919 r300render->vbo_transfer = NULL;
920 }
921
922 static void r300_render_release_vertices(struct vbuf_render* render)
923 {
924 struct r300_render* r300render = r300_render(render);
925
926 r300render->vbo_offset += r300render->vbo_max_used;
927 r300render->vbo_max_used = 0;
928 }
929
930 static boolean r300_render_set_primitive(struct vbuf_render* render,
931 unsigned prim)
932 {
933 struct r300_render* r300render = r300_render(render);
934
935 r300render->prim = prim;
936 r300render->hwprim = r300_translate_primitive(prim);
937
938 return TRUE;
939 }
940
941 static void r500_render_draw_arrays(struct vbuf_render* render,
942 unsigned start,
943 unsigned count)
944 {
945 struct r300_render* r300render = r300_render(render);
946 struct r300_context* r300 = r300render->r300;
947 uint8_t* ptr;
948 unsigned i;
949 unsigned dwords = 6;
950
951 CS_LOCALS(r300);
952
953 (void) i; (void) ptr;
954
955 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL,
956 NULL, dwords, 0, 0);
957
958 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
959
960 /* Uncomment to dump all VBOs rendered through this interface.
961 * Slow and noisy!
962 ptr = pipe_buffer_map(&r300render->r300->context,
963 r300render->vbo, PIPE_TRANSFER_READ,
964 &r300render->vbo_transfer);
965
966 for (i = 0; i < count; i++) {
967 printf("r300: Vertex %d\n", i);
968 draw_dump_emitted_vertex(&r300->vertex_info, ptr);
969 ptr += r300->vertex_info.size * 4;
970 printf("\n");
971 }
972
973 pipe_buffer_unmap(&r300render->r300->context, r300render->vbo,
974 r300render->vbo_transfer);
975 */
976
977 BEGIN_CS(dwords);
978 OUT_CS_REG(R300_GA_COLOR_CONTROL,
979 r300_provoking_vertex_fixes(r300, r300render->prim));
980 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
981 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
982 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
983 r300render->hwprim);
984 END_CS;
985 }
986
987 static void r500_render_draw_elements(struct vbuf_render* render,
988 const ushort* indices,
989 uint count)
990 {
991 struct r300_render* r300render = r300_render(render);
992 struct r300_context* r300 = r300render->r300;
993 int i;
994 unsigned dwords = 6 + (count+1)/2;
995 unsigned max_index = (r300render->vbo_size - r300render->vbo_offset) /
996 (r300render->r300->vertex_info.size * 4) - 1;
997
998 CS_LOCALS(r300);
999
1000 r300_prepare_for_rendering(r300,
1001 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL | PREP_INDEXED,
1002 NULL, dwords, 0, 0);
1003
1004 BEGIN_CS(dwords);
1005 OUT_CS_REG(R300_GA_COLOR_CONTROL,
1006 r300_provoking_vertex_fixes(r300, r300render->prim));
1007 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
1008 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
1009 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
1010 r300render->hwprim);
1011 for (i = 0; i < count-1; i += 2) {
1012 OUT_CS(indices[i+1] << 16 | indices[i]);
1013 }
1014 if (count % 2) {
1015 OUT_CS(indices[count-1]);
1016 }
1017 END_CS;
1018 }
1019
1020 static void r300_render_draw_arrays(struct vbuf_render* render,
1021 unsigned start,
1022 unsigned count)
1023 {
1024 struct r300_context* r300 = r300_render(render)->r300;
1025
1026 if (!r300->stencil_ref_bf_fallback) {
1027 r500_render_draw_arrays(render, start, count);
1028 } else {
1029 r300_begin_stencil_ref_fallback(r300);
1030 r500_render_draw_arrays(render, start, count);
1031 r300_switch_stencil_ref_side(r300);
1032 r500_render_draw_arrays(render, start, count);
1033 r300_end_stencil_ref_fallback(r300);
1034 }
1035 }
1036
1037 static void r300_render_draw_elements(struct vbuf_render* render,
1038 const ushort* indices,
1039 uint count)
1040 {
1041 struct r300_context* r300 = r300_render(render)->r300;
1042
1043 if (!r300->stencil_ref_bf_fallback) {
1044 r500_render_draw_elements(render, indices, count);
1045 } else {
1046 r300_begin_stencil_ref_fallback(r300);
1047 r500_render_draw_elements(render, indices, count);
1048 r300_switch_stencil_ref_side(r300);
1049 r500_render_draw_elements(render, indices, count);
1050 r300_end_stencil_ref_fallback(r300);
1051 }
1052 }
1053
1054 static void r300_render_destroy(struct vbuf_render* render)
1055 {
1056 FREE(render);
1057 }
1058
1059 static struct vbuf_render* r300_render_create(struct r300_context* r300)
1060 {
1061 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
1062
1063 r300render->r300 = r300;
1064
1065 /* XXX find real numbers plz */
1066 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
1067 r300render->base.max_indices = 16 * 1024;
1068
1069 r300render->base.get_vertex_info = r300_render_get_vertex_info;
1070 r300render->base.allocate_vertices = r300_render_allocate_vertices;
1071 r300render->base.map_vertices = r300_render_map_vertices;
1072 r300render->base.unmap_vertices = r300_render_unmap_vertices;
1073 r300render->base.set_primitive = r300_render_set_primitive;
1074 if (r300->screen->caps.is_r500) {
1075 r300render->base.draw_elements = r500_render_draw_elements;
1076 r300render->base.draw_arrays = r500_render_draw_arrays;
1077 } else {
1078 r300render->base.draw_elements = r300_render_draw_elements;
1079 r300render->base.draw_arrays = r300_render_draw_arrays;
1080 }
1081 r300render->base.release_vertices = r300_render_release_vertices;
1082 r300render->base.destroy = r300_render_destroy;
1083
1084 r300render->vbo = NULL;
1085 r300render->vbo_size = 0;
1086 r300render->vbo_offset = 0;
1087
1088 return &r300render->base;
1089 }
1090
1091 struct draw_stage* r300_draw_stage(struct r300_context* r300)
1092 {
1093 struct vbuf_render* render;
1094 struct draw_stage* stage;
1095
1096 render = r300_render_create(r300);
1097
1098 if (!render) {
1099 return NULL;
1100 }
1101
1102 stage = draw_vbuf_stage(r300->draw, render);
1103
1104 if (!stage) {
1105 render->destroy(render);
1106 return NULL;
1107 }
1108
1109 draw_set_render(r300->draw, render);
1110
1111 return stage;
1112 }
1113
1114 void r300_init_render_functions(struct r300_context *r300)
1115 {
1116 if (r300->screen->caps.has_tcl) {
1117 r300->context.draw_arrays = r300_draw_arrays;
1118 r300->context.draw_elements = r300_draw_elements;
1119 r300->context.draw_range_elements = r300_draw_range_elements;
1120
1121 if (r300->screen->caps.is_r500) {
1122 r300->emit_draw_arrays_immediate = r500_emit_draw_arrays_immediate;
1123 r300->emit_draw_arrays = r500_emit_draw_arrays;
1124 r300->emit_draw_elements = r500_emit_draw_elements;
1125 } else {
1126 r300->emit_draw_arrays_immediate = r300_emit_draw_arrays_immediate;
1127 r300->emit_draw_arrays = r300_emit_draw_arrays;
1128 r300->emit_draw_elements = r300_emit_draw_elements;
1129 }
1130 } else {
1131 r300->context.draw_arrays = r300_swtcl_draw_arrays;
1132 r300->context.draw_elements = r300_draw_elements;
1133 r300->context.draw_range_elements = r300_swtcl_draw_range_elements;
1134 }
1135 }