r300g/swtcl: flush draw to avoid the rejection of CS
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "util/u_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_upload_mgr.h"
34 #include "util/u_prim.h"
35
36 #include "r300_cs.h"
37 #include "r300_context.h"
38 #include "r300_screen_buffer.h"
39 #include "r300_emit.h"
40 #include "r300_reg.h"
41 #include "r300_render.h"
42 #include "r300_state_derived.h"
43
44 static uint32_t r300_translate_primitive(unsigned prim)
45 {
46 switch (prim) {
47 case PIPE_PRIM_POINTS:
48 return R300_VAP_VF_CNTL__PRIM_POINTS;
49 case PIPE_PRIM_LINES:
50 return R300_VAP_VF_CNTL__PRIM_LINES;
51 case PIPE_PRIM_LINE_LOOP:
52 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
53 case PIPE_PRIM_LINE_STRIP:
54 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
55 case PIPE_PRIM_TRIANGLES:
56 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
57 case PIPE_PRIM_TRIANGLE_STRIP:
58 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
59 case PIPE_PRIM_TRIANGLE_FAN:
60 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
61 case PIPE_PRIM_QUADS:
62 return R300_VAP_VF_CNTL__PRIM_QUADS;
63 case PIPE_PRIM_QUAD_STRIP:
64 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
65 case PIPE_PRIM_POLYGON:
66 return R300_VAP_VF_CNTL__PRIM_POLYGON;
67 default:
68 return 0;
69 }
70 }
71
72 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
73 unsigned mode)
74 {
75 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
76 uint32_t color_control = rs->color_control;
77
78 /* By default (see r300_state.c:r300_create_rs_state) color_control is
79 * initialized to provoking the first vertex.
80 *
81 * Triangle fans must be reduced to the second vertex, not the first, in
82 * Gallium flatshade-first mode, as per the GL spec.
83 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
84 *
85 * Quads never provoke correctly in flatshade-first mode. The first
86 * vertex is never considered as provoking, so only the second, third,
87 * and fourth vertices can be selected, and both "third" and "last" modes
88 * select the fourth vertex. This is probably due to D3D lacking quads.
89 *
90 * Similarly, polygons reduce to the first, not the last, vertex, when in
91 * "last" mode, and all other modes start from the second vertex.
92 *
93 * ~ C.
94 */
95
96 if (rs->rs.flatshade_first) {
97 switch (mode) {
98 case PIPE_PRIM_TRIANGLE_FAN:
99 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
100 break;
101 case PIPE_PRIM_QUADS:
102 case PIPE_PRIM_QUAD_STRIP:
103 case PIPE_PRIM_POLYGON:
104 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
105 break;
106 default:
107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
108 break;
109 }
110 } else {
111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
112 }
113
114 return color_control;
115 }
116
117 static void r500_emit_index_offset(struct r300_context *r300, int index_bias)
118 {
119 CS_LOCALS(r300);
120
121 if (r300->screen->caps.is_r500 &&
122 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
123 BEGIN_CS(2);
124 OUT_CS_REG(R500_VAP_INDEX_OFFSET,
125 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));
126 END_CS;
127 } else {
128 if (index_bias) {
129 fprintf(stderr, "r300: Non-zero index bias is unsupported "
130 "on this hardware.\n");
131 assert(0);
132 }
133 }
134 }
135
136 enum r300_prepare_flags {
137 PREP_FIRST_DRAW = (1 << 0),
138 PREP_VALIDATE_VBOS = (1 << 1),
139 PREP_EMIT_AOS = (1 << 2),
140 PREP_INDEXED = (1 << 3)
141 };
142
143 /* Check if the requested number of dwords is available in the CS and
144 * if not, flush. Then validate buffers and emit dirty state.
145 * Return TRUE if flush occured. */
146 static void r300_prepare_for_rendering(struct r300_context *r300,
147 enum r300_prepare_flags flags,
148 struct pipe_resource *index_buffer,
149 unsigned cs_dwords,
150 unsigned aos_offset,
151 int index_bias)
152 {
153 boolean flushed = FALSE;
154 boolean first_draw = flags & PREP_FIRST_DRAW;
155 boolean emit_aos = flags & PREP_EMIT_AOS;
156
157 /* Stencil ref fallback. */
158 if (r300->stencil_ref_bf_fallback) {
159 cs_dwords = cs_dwords * 2 + 10;
160 }
161
162 /* Add dirty state, index offset, and AOS. */
163 if (first_draw) {
164 cs_dwords += r300_get_num_dirty_dwords(r300);
165
166 if (r300->screen->caps.is_r500)
167 cs_dwords += 2; /* emit_index_offset */
168
169 if (emit_aos)
170 cs_dwords += 55; /* emit_aos */
171 }
172
173 /* Emitted in flush. */
174 cs_dwords += 26; /* emit_query_end */
175
176 /* Reserve requested CS space. */
177 if (!r300->rws->check_cs(r300->rws, cs_dwords)) {
178 r300->context.flush(&r300->context, 0, NULL);
179 flushed = TRUE;
180 }
181
182 /* Validate buffers and emit dirty state if needed. */
183 if (first_draw || flushed) {
184 r300_emit_buffer_validate(r300, flags & PREP_VALIDATE_VBOS, index_buffer);
185 r300_emit_dirty_state(r300);
186 r500_emit_index_offset(r300, index_bias);
187 if (emit_aos)
188 r300_emit_aos(r300, aos_offset, flags & PREP_INDEXED);
189 }
190 }
191
192 static boolean immd_is_good_idea(struct r300_context *r300,
193 unsigned count)
194 {
195 struct pipe_vertex_element* velem;
196 struct pipe_vertex_buffer* vbuf;
197 boolean checked[PIPE_MAX_ATTRIBS] = {0};
198 unsigned vertex_element_count = r300->velems->count;
199 unsigned i, vbi;
200
201 if (DBG_ON(r300, DBG_NO_IMMD)) {
202 return FALSE;
203 }
204
205 if (r300->draw) {
206 return FALSE;
207 }
208
209 if (count > 10) {
210 return FALSE;
211 }
212
213 /* We shouldn't map buffers referenced by CS, busy buffers,
214 * and ones placed in VRAM. */
215 /* XXX Check for VRAM buffers. */
216 for (i = 0; i < vertex_element_count; i++) {
217 velem = &r300->velems->velem[i];
218 vbi = velem->vertex_buffer_index;
219
220 if (!checked[vbi]) {
221 vbuf = &r300->vertex_buffer[vbi];
222
223 if (r300_buffer_is_referenced(&r300->context,
224 vbuf->buffer,
225 R300_REF_CS | R300_REF_HW)) {
226 /* It's a very bad idea to map it... */
227 return FALSE;
228 }
229 checked[vbi] = TRUE;
230 }
231 }
232 return TRUE;
233 }
234
235 /*****************************************************************************
236 * The emission of draw packets for r500. Older GPUs may use these functions *
237 * after resolving fallback issues (e.g. stencil ref two-sided). *
238 ****************************************************************************/
239
240 void r500_emit_draw_arrays_immediate(struct r300_context *r300,
241 unsigned mode,
242 unsigned start,
243 unsigned count)
244 {
245 struct pipe_vertex_element* velem;
246 struct pipe_vertex_buffer* vbuf;
247 unsigned vertex_element_count = r300->velems->count;
248 unsigned i, v, vbi, dw, elem_offset, dwords;
249
250 /* Size of the vertex, in dwords. */
251 unsigned vertex_size = 0;
252
253 /* Offsets of the attribute, in dwords, from the start of the vertex. */
254 unsigned offset[PIPE_MAX_ATTRIBS];
255
256 /* Size of the vertex element, in dwords. */
257 unsigned size[PIPE_MAX_ATTRIBS];
258
259 /* Stride to the same attrib in the next vertex in the vertex buffer,
260 * in dwords. */
261 unsigned stride[PIPE_MAX_ATTRIBS] = {0};
262
263 /* Mapped vertex buffers. */
264 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
265 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {NULL};
266
267 CS_LOCALS(r300);
268
269 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
270 for (i = 0; i < vertex_element_count; i++) {
271 velem = &r300->velems->velem[i];
272 offset[i] = velem->src_offset / 4;
273 size[i] = util_format_get_blocksize(velem->src_format) / 4;
274 vertex_size += size[i];
275 vbi = velem->vertex_buffer_index;
276
277 /* Map the buffer. */
278 if (!map[vbi]) {
279 vbuf = &r300->vertex_buffer[vbi];
280 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context,
281 vbuf->buffer,
282 PIPE_TRANSFER_READ,
283 &transfer[vbi]);
284 map[vbi] += vbuf->buffer_offset / 4;
285 stride[vbi] = vbuf->stride / 4;
286 }
287 }
288
289 dwords = 9 + count * vertex_size;
290
291 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0);
292
293 BEGIN_CS(dwords);
294 OUT_CS_REG(R300_GA_COLOR_CONTROL,
295 r300_provoking_vertex_fixes(r300, mode));
296 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
297 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
298 OUT_CS(count - 1);
299 OUT_CS(0);
300 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
301 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
302 r300_translate_primitive(mode));
303
304 /* Emit vertices. */
305 for (v = 0; v < count; v++) {
306 for (i = 0; i < vertex_element_count; i++) {
307 velem = &r300->velems->velem[i];
308 vbi = velem->vertex_buffer_index;
309 elem_offset = offset[i] + stride[vbi] * (v + start);
310
311 for (dw = 0; dw < size[i]; dw++) {
312 OUT_CS(map[vbi][elem_offset + dw]);
313 }
314 }
315 }
316 END_CS;
317
318 /* Unmap buffers. */
319 for (i = 0; i < vertex_element_count; i++) {
320 vbi = r300->velems->velem[i].vertex_buffer_index;
321
322 if (map[vbi]) {
323 vbuf = &r300->vertex_buffer[vbi];
324 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]);
325 map[vbi] = NULL;
326 }
327 }
328 }
329
330 void r500_emit_draw_arrays(struct r300_context *r300,
331 unsigned mode,
332 unsigned count)
333 {
334 boolean alt_num_verts = count > 65535;
335 CS_LOCALS(r300);
336
337 if (count >= (1 << 24)) {
338 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
339 "refusing to render.\n", count);
340 return;
341 }
342
343 BEGIN_CS(7 + (alt_num_verts ? 2 : 0));
344 if (alt_num_verts) {
345 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
346 }
347 OUT_CS_REG(R300_GA_COLOR_CONTROL,
348 r300_provoking_vertex_fixes(r300, mode));
349 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
350 OUT_CS(count - 1);
351 OUT_CS(0);
352 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
353 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
354 r300_translate_primitive(mode) |
355 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
356 END_CS;
357 }
358
359 void r500_emit_draw_elements(struct r300_context *r300,
360 struct pipe_resource* indexBuffer,
361 unsigned indexSize,
362 unsigned minIndex,
363 unsigned maxIndex,
364 unsigned mode,
365 unsigned start,
366 unsigned count)
367 {
368 uint32_t count_dwords;
369 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
370 boolean alt_num_verts = count > 65535;
371 CS_LOCALS(r300);
372
373 if (count >= (1 << 24)) {
374 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
375 "refusing to render.\n", count);
376 return;
377 }
378
379 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
380
381 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
382 count, minIndex, maxIndex);
383
384 BEGIN_CS(13 + (alt_num_verts ? 2 : 0));
385 if (alt_num_verts) {
386 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
387 }
388 OUT_CS_REG(R300_GA_COLOR_CONTROL,
389 r300_provoking_vertex_fixes(r300, mode));
390 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
391 OUT_CS(maxIndex);
392 OUT_CS(minIndex);
393 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
394 if (indexSize == 4) {
395 count_dwords = count;
396 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
397 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
398 r300_translate_primitive(mode) |
399 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
400 } else {
401 count_dwords = (count + 1) / 2;
402 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
403 r300_translate_primitive(mode) |
404 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
405 }
406
407 /* INDX_BUFFER is a truly special packet3.
408 * Unlike most other packet3, where the offset is after the count,
409 * the order is reversed, so the relocation ends up carrying the
410 * size of the indexbuf instead of the offset.
411 */
412 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
413 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
414 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
415 OUT_CS(offset_dwords << 2);
416 OUT_CS_BUF_RELOC(indexBuffer, count_dwords,
417 RADEON_GEM_DOMAIN_GTT, 0, 0);
418
419 END_CS;
420 }
421
422 /*****************************************************************************
423 * The emission of draw packets for r300 which take care of the two-sided *
424 * stencil ref fallback and call r500's functions. *
425 ****************************************************************************/
426
427 /* Set drawing for front faces. */
428 static void r300_begin_stencil_ref_fallback(struct r300_context *r300)
429 {
430 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
431 CS_LOCALS(r300);
432
433 BEGIN_CS(2);
434 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK);
435 END_CS;
436 }
437
438 /* Set drawing for back faces. */
439 static void r300_switch_stencil_ref_side(struct r300_context *r300)
440 {
441 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
442 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
443 CS_LOCALS(r300);
444
445 BEGIN_CS(4);
446 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT);
447 OUT_CS_REG(R300_ZB_STENCILREFMASK,
448 dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]);
449 END_CS;
450 }
451
452 /* Restore the original state. */
453 static void r300_end_stencil_ref_fallback(struct r300_context *r300)
454 {
455 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
456 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
457 CS_LOCALS(r300);
458
459 BEGIN_CS(4);
460 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode);
461 OUT_CS_REG(R300_ZB_STENCILREFMASK,
462 dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]);
463 END_CS;
464 }
465
466 void r300_emit_draw_arrays_immediate(struct r300_context *r300,
467 unsigned mode,
468 unsigned start,
469 unsigned count)
470 {
471 if (!r300->stencil_ref_bf_fallback) {
472 r500_emit_draw_arrays_immediate(r300, mode, start, count);
473 } else {
474 r300_begin_stencil_ref_fallback(r300);
475 r500_emit_draw_arrays_immediate(r300, mode, start, count);
476 r300_switch_stencil_ref_side(r300);
477 r500_emit_draw_arrays_immediate(r300, mode, start, count);
478 r300_end_stencil_ref_fallback(r300);
479 }
480 }
481
482 void r300_emit_draw_arrays(struct r300_context *r300,
483 unsigned mode,
484 unsigned count)
485 {
486 if (!r300->stencil_ref_bf_fallback) {
487 r500_emit_draw_arrays(r300, mode, count);
488 } else {
489 r300_begin_stencil_ref_fallback(r300);
490 r500_emit_draw_arrays(r300, mode, count);
491 r300_switch_stencil_ref_side(r300);
492 r500_emit_draw_arrays(r300, mode, count);
493 r300_end_stencil_ref_fallback(r300);
494 }
495 }
496
497 void r300_emit_draw_elements(struct r300_context *r300,
498 struct pipe_resource* indexBuffer,
499 unsigned indexSize,
500 unsigned minIndex,
501 unsigned maxIndex,
502 unsigned mode,
503 unsigned start,
504 unsigned count)
505 {
506 if (!r300->stencil_ref_bf_fallback) {
507 r500_emit_draw_elements(r300, indexBuffer, indexSize,
508 minIndex, maxIndex, mode, start, count);
509 } else {
510 r300_begin_stencil_ref_fallback(r300);
511 r500_emit_draw_elements(r300, indexBuffer, indexSize,
512 minIndex, maxIndex, mode, start, count);
513 r300_switch_stencil_ref_side(r300);
514 r500_emit_draw_elements(r300, indexBuffer, indexSize,
515 minIndex, maxIndex, mode, start, count);
516 r300_end_stencil_ref_fallback(r300);
517 }
518 }
519
520 static void r300_shorten_ubyte_elts(struct r300_context* r300,
521 struct pipe_resource** elts,
522 unsigned start,
523 unsigned count)
524 {
525 struct pipe_context* context = &r300->context;
526 struct pipe_screen* screen = r300->context.screen;
527 struct pipe_resource* new_elts;
528 unsigned char *in_map;
529 unsigned short *out_map;
530 struct pipe_transfer *src_transfer, *dst_transfer;
531 unsigned i;
532
533 new_elts = pipe_buffer_create(screen,
534 PIPE_BIND_INDEX_BUFFER,
535 2 * count);
536
537 in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer);
538 out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer);
539
540 in_map += start;
541
542 for (i = 0; i < count; i++) {
543 *out_map = (unsigned short)*in_map;
544 in_map++;
545 out_map++;
546 }
547
548 pipe_buffer_unmap(context, *elts, src_transfer);
549 pipe_buffer_unmap(context, new_elts, dst_transfer);
550
551 *elts = new_elts;
552 }
553
554 static void r300_align_ushort_elts(struct r300_context *r300,
555 struct pipe_resource **elts,
556 unsigned start, unsigned count)
557 {
558 struct pipe_context* context = &r300->context;
559 struct pipe_transfer *in_transfer = NULL;
560 struct pipe_transfer *out_transfer = NULL;
561 struct pipe_resource* new_elts;
562 unsigned short *in_map;
563 unsigned short *out_map;
564
565 new_elts = pipe_buffer_create(context->screen,
566 PIPE_BIND_INDEX_BUFFER,
567 2 * count);
568
569 in_map = pipe_buffer_map(context, *elts,
570 PIPE_TRANSFER_READ, &in_transfer);
571 out_map = pipe_buffer_map(context, new_elts,
572 PIPE_TRANSFER_WRITE, &out_transfer);
573
574 memcpy(out_map, in_map+start, 2 * count);
575
576 pipe_buffer_unmap(context, *elts, in_transfer);
577 pipe_buffer_unmap(context, new_elts, out_transfer);
578
579 *elts = new_elts;
580 }
581
582 /* This is the fast-path drawing & emission for HW TCL. */
583 void r300_draw_range_elements(struct pipe_context* pipe,
584 struct pipe_resource* indexBuffer,
585 unsigned indexSize,
586 int indexBias,
587 unsigned minIndex,
588 unsigned maxIndex,
589 unsigned mode,
590 unsigned start,
591 unsigned count)
592 {
593 struct r300_context* r300 = r300_context(pipe);
594 struct pipe_resource* orgIndexBuffer = indexBuffer;
595 boolean alt_num_verts = r300->screen->caps.is_r500 &&
596 count > 65536 &&
597 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
598 unsigned short_count;
599
600 if (r300->skip_rendering) {
601 return;
602 }
603
604 if (!u_trim_pipe_prim(mode, &count)) {
605 return;
606 }
607
608 if (indexSize == 1) {
609 r300_shorten_ubyte_elts(r300, &indexBuffer, start, count);
610 indexSize = 2;
611 start = 0;
612 } else if (indexSize == 2 && start % 2 != 0) {
613 r300_align_ushort_elts(r300, &indexBuffer, start, count);
614 start = 0;
615 }
616
617 r300_update_derived_state(r300);
618 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count);
619
620 /* 15 dwords for emit_draw_elements */
621 r300_prepare_for_rendering(r300,
622 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED,
623 indexBuffer, 15, 0, indexBias);
624
625 u_upload_flush(r300->upload_vb);
626 u_upload_flush(r300->upload_ib);
627 if (alt_num_verts || count <= 65535) {
628 r300->emit_draw_elements(r300, indexBuffer, indexSize,
629 minIndex, maxIndex, mode, start, count);
630 } else {
631 do {
632 short_count = MIN2(count, 65534);
633 r300->emit_draw_elements(r300, indexBuffer, indexSize,
634 minIndex, maxIndex,
635 mode, start, short_count);
636
637 start += short_count;
638 count -= short_count;
639
640 /* 15 dwords for emit_draw_elements */
641 if (count) {
642 r300_prepare_for_rendering(r300,
643 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED,
644 indexBuffer, 15, 0, indexBias);
645 }
646 } while (count);
647 }
648
649 if (indexBuffer != orgIndexBuffer) {
650 pipe_resource_reference( &indexBuffer, NULL );
651 }
652 }
653
654 /* Simple helpers for context setup. Should probably be moved to util. */
655 void r300_draw_elements(struct pipe_context* pipe,
656 struct pipe_resource* indexBuffer,
657 unsigned indexSize, int indexBias, unsigned mode,
658 unsigned start, unsigned count)
659 {
660 struct r300_context *r300 = r300_context(pipe);
661
662 pipe->draw_range_elements(pipe, indexBuffer, indexSize, indexBias,
663 0, r300->vertex_buffer_max_index,
664 mode, start, count);
665 }
666
667 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
668 unsigned start, unsigned count)
669 {
670 struct r300_context* r300 = r300_context(pipe);
671 boolean alt_num_verts = r300->screen->caps.is_r500 &&
672 count > 65536 &&
673 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
674 unsigned short_count;
675
676 if (r300->skip_rendering) {
677 return;
678 }
679
680 if (!u_trim_pipe_prim(mode, &count)) {
681 return;
682 }
683
684 r300_update_derived_state(r300);
685
686 if (immd_is_good_idea(r300, count)) {
687 r300->emit_draw_arrays_immediate(r300, mode, start, count);
688 } else {
689 /* 9 spare dwords for emit_draw_arrays. */
690 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS,
691 NULL, 9, start, 0);
692
693 if (alt_num_verts || count <= 65535) {
694 r300->emit_draw_arrays(r300, mode, count);
695 } else {
696 do {
697 short_count = MIN2(count, 65535);
698 r300->emit_draw_arrays(r300, mode, short_count);
699
700 start += short_count;
701 count -= short_count;
702
703 /* 9 spare dwords for emit_draw_arrays. */
704 if (count) {
705 r300_prepare_for_rendering(r300,
706 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9,
707 start, 0);
708 }
709 } while (count);
710 }
711 u_upload_flush(r300->upload_vb);
712 }
713 }
714
715 /****************************************************************************
716 * The rest of this file is for SW TCL rendering only. Please be polite and *
717 * keep these functions separated so that they are easier to locate. ~C. *
718 ***************************************************************************/
719
720 /* SW TCL arrays, using Draw. */
721 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
722 unsigned mode,
723 unsigned start,
724 unsigned count)
725 {
726 struct r300_context* r300 = r300_context(pipe);
727 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
728 int i;
729
730 if (r300->skip_rendering) {
731 return;
732 }
733
734 if (!u_trim_pipe_prim(mode, &count)) {
735 return;
736 }
737
738 r300_update_derived_state(r300);
739
740 for (i = 0; i < r300->vertex_buffer_count; i++) {
741 void* buf = pipe_buffer_map(pipe,
742 r300->vertex_buffer[i].buffer,
743 PIPE_TRANSFER_READ,
744 &vb_transfer[i]);
745 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
746 }
747
748 draw_set_mapped_element_buffer(r300->draw, 0, 0, NULL);
749
750 draw_arrays(r300->draw, mode, start, count);
751
752 /* XXX Not sure whether this is the best fix.
753 * It prevents CS from being rejected and weird assertion failures. */
754 draw_flush(r300->draw);
755
756 for (i = 0; i < r300->vertex_buffer_count; i++) {
757 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
758 vb_transfer[i]);
759 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
760 }
761 }
762
763 /* SW TCL elements, using Draw. */
764 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
765 struct pipe_resource* indexBuffer,
766 unsigned indexSize,
767 int indexBias,
768 unsigned minIndex,
769 unsigned maxIndex,
770 unsigned mode,
771 unsigned start,
772 unsigned count)
773 {
774 struct r300_context* r300 = r300_context(pipe);
775 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
776 struct pipe_transfer *ib_transfer;
777 int i;
778 void* indices;
779
780 if (r300->skip_rendering) {
781 return;
782 }
783
784 if (!u_trim_pipe_prim(mode, &count)) {
785 return;
786 }
787
788 r300_update_derived_state(r300);
789
790 for (i = 0; i < r300->vertex_buffer_count; i++) {
791 void* buf = pipe_buffer_map(pipe,
792 r300->vertex_buffer[i].buffer,
793 PIPE_TRANSFER_READ,
794 &vb_transfer[i]);
795 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
796 }
797
798 indices = pipe_buffer_map(pipe, indexBuffer,
799 PIPE_TRANSFER_READ, &ib_transfer);
800 draw_set_mapped_element_buffer_range(r300->draw, indexSize, indexBias,
801 minIndex, maxIndex, indices);
802
803 draw_arrays(r300->draw, mode, start, count);
804
805 /* XXX Not sure whether this is the best fix.
806 * It prevents CS from being rejected and weird assertion failures. */
807 draw_flush(r300->draw);
808
809 for (i = 0; i < r300->vertex_buffer_count; i++) {
810 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
811 vb_transfer[i]);
812 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
813 }
814
815 pipe_buffer_unmap(pipe, indexBuffer,
816 ib_transfer);
817 draw_set_mapped_element_buffer_range(r300->draw, 0, 0,
818 start, start + count - 1,
819 NULL);
820 }
821
822 /* Object for rendering using Draw. */
823 struct r300_render {
824 /* Parent class */
825 struct vbuf_render base;
826
827 /* Pipe context */
828 struct r300_context* r300;
829
830 /* Vertex information */
831 size_t vertex_size;
832 unsigned prim;
833 unsigned hwprim;
834
835 /* VBO */
836 struct pipe_resource* vbo;
837 size_t vbo_size;
838 size_t vbo_offset;
839 size_t vbo_max_used;
840 void * vbo_ptr;
841
842 struct pipe_transfer *vbo_transfer;
843 };
844
845 static INLINE struct r300_render*
846 r300_render(struct vbuf_render* render)
847 {
848 return (struct r300_render*)render;
849 }
850
851 static const struct vertex_info*
852 r300_render_get_vertex_info(struct vbuf_render* render)
853 {
854 struct r300_render* r300render = r300_render(render);
855 struct r300_context* r300 = r300render->r300;
856
857 return &r300->vertex_info;
858 }
859
860 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
861 ushort vertex_size,
862 ushort count)
863 {
864 struct r300_render* r300render = r300_render(render);
865 struct r300_context* r300 = r300render->r300;
866 struct pipe_screen* screen = r300->context.screen;
867 size_t size = (size_t)vertex_size * (size_t)count;
868
869 if (size + r300render->vbo_offset > r300render->vbo_size)
870 {
871 pipe_resource_reference(&r300->vbo, NULL);
872 r300render->vbo = pipe_buffer_create(screen,
873 PIPE_BIND_VERTEX_BUFFER,
874 R300_MAX_DRAW_VBO_SIZE);
875 r300render->vbo_offset = 0;
876 r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE;
877 }
878
879 r300render->vertex_size = vertex_size;
880 r300->vbo = r300render->vbo;
881 r300->vbo_offset = r300render->vbo_offset;
882
883 return (r300render->vbo) ? TRUE : FALSE;
884 }
885
886 static void* r300_render_map_vertices(struct vbuf_render* render)
887 {
888 struct r300_render* r300render = r300_render(render);
889
890 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
891 r300render->vbo,
892 PIPE_TRANSFER_WRITE,
893 &r300render->vbo_transfer);
894
895 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
896 }
897
898 static void r300_render_unmap_vertices(struct vbuf_render* render,
899 ushort min,
900 ushort max)
901 {
902 struct r300_render* r300render = r300_render(render);
903 struct pipe_context* context = &r300render->r300->context;
904 CS_LOCALS(r300render->r300);
905 BEGIN_CS(2);
906 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
907 END_CS;
908
909 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
910 r300render->vertex_size * (max + 1));
911 pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer);
912 }
913
914 static void r300_render_release_vertices(struct vbuf_render* render)
915 {
916 struct r300_render* r300render = r300_render(render);
917
918 r300render->vbo_offset += r300render->vbo_max_used;
919 r300render->vbo_max_used = 0;
920 }
921
922 static boolean r300_render_set_primitive(struct vbuf_render* render,
923 unsigned prim)
924 {
925 struct r300_render* r300render = r300_render(render);
926
927 r300render->prim = prim;
928 r300render->hwprim = r300_translate_primitive(prim);
929
930 return TRUE;
931 }
932
933 static void r500_render_draw_arrays(struct vbuf_render* render,
934 unsigned start,
935 unsigned count)
936 {
937 struct r300_render* r300render = r300_render(render);
938 struct r300_context* r300 = r300render->r300;
939 uint8_t* ptr;
940 unsigned i;
941
942 CS_LOCALS(r300);
943
944 (void) i; (void) ptr;
945
946 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, 4, 0, 0);
947
948 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
949
950 /* Uncomment to dump all VBOs rendered through this interface.
951 * Slow and noisy!
952 ptr = pipe_buffer_map(&r300render->r300->context,
953 r300render->vbo, PIPE_TRANSFER_READ,
954 &r300render->vbo_transfer);
955
956 for (i = 0; i < count; i++) {
957 printf("r300: Vertex %d\n", i);
958 draw_dump_emitted_vertex(&r300->vertex_info, ptr);
959 ptr += r300->vertex_info.size * 4;
960 printf("\n");
961 }
962
963 pipe_buffer_unmap(&r300render->r300->context, r300render->vbo,
964 r300render->vbo_transfer);
965 */
966
967 BEGIN_CS(4);
968 OUT_CS_REG(R300_GA_COLOR_CONTROL,
969 r300_provoking_vertex_fixes(r300, r300render->prim));
970 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
971 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
972 r300render->hwprim);
973 END_CS;
974 }
975
976 static void r500_render_draw_elements(struct vbuf_render* render,
977 const ushort* indices,
978 uint count)
979 {
980 struct r300_render* r300render = r300_render(render);
981 struct r300_context* r300 = r300render->r300;
982 int i;
983 unsigned dwords = 4 + (count+1)/2;
984
985 CS_LOCALS(r300);
986
987 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0);
988
989 BEGIN_CS(dwords);
990 OUT_CS_REG(R300_GA_COLOR_CONTROL,
991 r300_provoking_vertex_fixes(r300, r300render->prim));
992 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
993 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
994 r300render->hwprim);
995 for (i = 0; i < count-1; i += 2) {
996 OUT_CS(indices[i+1] << 16 | indices[i]);
997 }
998 if (count % 2) {
999 OUT_CS(indices[count-1]);
1000 }
1001 END_CS;
1002 }
1003
1004 static void r300_render_draw_arrays(struct vbuf_render* render,
1005 unsigned start,
1006 unsigned count)
1007 {
1008 struct r300_context* r300 = r300_render(render)->r300;
1009
1010 if (!r300->stencil_ref_bf_fallback) {
1011 r500_render_draw_arrays(render, start, count);
1012 } else {
1013 r300_begin_stencil_ref_fallback(r300);
1014 r500_render_draw_arrays(render, start, count);
1015 r300_switch_stencil_ref_side(r300);
1016 r500_render_draw_arrays(render, start, count);
1017 r300_end_stencil_ref_fallback(r300);
1018 }
1019 }
1020
1021 static void r300_render_draw_elements(struct vbuf_render* render,
1022 const ushort* indices,
1023 uint count)
1024 {
1025 struct r300_context* r300 = r300_render(render)->r300;
1026
1027 if (!r300->stencil_ref_bf_fallback) {
1028 r500_render_draw_elements(render, indices, count);
1029 } else {
1030 r300_begin_stencil_ref_fallback(r300);
1031 r500_render_draw_elements(render, indices, count);
1032 r300_switch_stencil_ref_side(r300);
1033 r500_render_draw_elements(render, indices, count);
1034 r300_end_stencil_ref_fallback(r300);
1035 }
1036 }
1037
1038 static void r300_render_destroy(struct vbuf_render* render)
1039 {
1040 FREE(render);
1041 }
1042
1043 static struct vbuf_render* r300_render_create(struct r300_context* r300)
1044 {
1045 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
1046
1047 r300render->r300 = r300;
1048
1049 /* XXX find real numbers plz */
1050 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
1051 r300render->base.max_indices = 16 * 1024;
1052
1053 r300render->base.get_vertex_info = r300_render_get_vertex_info;
1054 r300render->base.allocate_vertices = r300_render_allocate_vertices;
1055 r300render->base.map_vertices = r300_render_map_vertices;
1056 r300render->base.unmap_vertices = r300_render_unmap_vertices;
1057 r300render->base.set_primitive = r300_render_set_primitive;
1058 if (r300->screen->caps.is_r500) {
1059 r300render->base.draw_elements = r500_render_draw_elements;
1060 r300render->base.draw_arrays = r500_render_draw_arrays;
1061 } else {
1062 r300render->base.draw_elements = r300_render_draw_elements;
1063 r300render->base.draw_arrays = r300_render_draw_arrays;
1064 }
1065 r300render->base.release_vertices = r300_render_release_vertices;
1066 r300render->base.destroy = r300_render_destroy;
1067
1068 r300render->vbo = NULL;
1069 r300render->vbo_size = 0;
1070 r300render->vbo_offset = 0;
1071
1072 return &r300render->base;
1073 }
1074
1075 struct draw_stage* r300_draw_stage(struct r300_context* r300)
1076 {
1077 struct vbuf_render* render;
1078 struct draw_stage* stage;
1079
1080 render = r300_render_create(r300);
1081
1082 if (!render) {
1083 return NULL;
1084 }
1085
1086 stage = draw_vbuf_stage(r300->draw, render);
1087
1088 if (!stage) {
1089 render->destroy(render);
1090 return NULL;
1091 }
1092
1093 draw_set_render(r300->draw, render);
1094
1095 return stage;
1096 }