r300g: support rendering more than 65535 vertices in one batch on r500
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "util/u_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_upload_mgr.h"
34 #include "util/u_prim.h"
35
36 #include "r300_cs.h"
37 #include "r300_context.h"
38 #include "r300_screen_buffer.h"
39 #include "r300_emit.h"
40 #include "r300_reg.h"
41 #include "r300_render.h"
42 #include "r300_state_derived.h"
43
44 static uint32_t r300_translate_primitive(unsigned prim)
45 {
46 switch (prim) {
47 case PIPE_PRIM_POINTS:
48 return R300_VAP_VF_CNTL__PRIM_POINTS;
49 case PIPE_PRIM_LINES:
50 return R300_VAP_VF_CNTL__PRIM_LINES;
51 case PIPE_PRIM_LINE_LOOP:
52 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
53 case PIPE_PRIM_LINE_STRIP:
54 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
55 case PIPE_PRIM_TRIANGLES:
56 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
57 case PIPE_PRIM_TRIANGLE_STRIP:
58 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
59 case PIPE_PRIM_TRIANGLE_FAN:
60 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
61 case PIPE_PRIM_QUADS:
62 return R300_VAP_VF_CNTL__PRIM_QUADS;
63 case PIPE_PRIM_QUAD_STRIP:
64 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
65 case PIPE_PRIM_POLYGON:
66 return R300_VAP_VF_CNTL__PRIM_POLYGON;
67 default:
68 return 0;
69 }
70 }
71
72 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
73 unsigned mode)
74 {
75 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
76 uint32_t color_control = rs->color_control;
77
78 /* By default (see r300_state.c:r300_create_rs_state) color_control is
79 * initialized to provoking the first vertex.
80 *
81 * Triangle fans must be reduced to the second vertex, not the first, in
82 * Gallium flatshade-first mode, as per the GL spec.
83 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
84 *
85 * Quads never provoke correctly in flatshade-first mode. The first
86 * vertex is never considered as provoking, so only the second, third,
87 * and fourth vertices can be selected, and both "third" and "last" modes
88 * select the fourth vertex. This is probably due to D3D lacking quads.
89 *
90 * Similarly, polygons reduce to the first, not the last, vertex, when in
91 * "last" mode, and all other modes start from the second vertex.
92 *
93 * ~ C.
94 */
95
96 if (rs->rs.flatshade_first) {
97 switch (mode) {
98 case PIPE_PRIM_TRIANGLE_FAN:
99 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
100 break;
101 case PIPE_PRIM_QUADS:
102 case PIPE_PRIM_QUAD_STRIP:
103 case PIPE_PRIM_POLYGON:
104 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
105 break;
106 default:
107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
108 break;
109 }
110 } else {
111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
112 }
113
114 return color_control;
115 }
116
117 /* Check if the requested number of dwords is available in the CS and
118 * if not, flush. Return TRUE if the flush occured. */
119 static boolean r300_reserve_cs_space(struct r300_context *r300,
120 unsigned dwords)
121 {
122 if (!r300->rws->check_cs(r300->rws, dwords)) {
123 r300->context.flush(&r300->context, 0, NULL);
124 return TRUE;
125 }
126 return FALSE;
127 }
128
129 static boolean immd_is_good_idea(struct r300_context *r300,
130 unsigned count)
131 {
132 struct pipe_vertex_element* velem;
133 struct pipe_vertex_buffer* vbuf;
134 boolean checked[PIPE_MAX_ATTRIBS] = {0};
135 unsigned vertex_element_count = r300->velems->count;
136 unsigned i, vbi;
137
138 if (count > 10 || DBG_ON(r300, DBG_NO_IMMD)) {
139 return FALSE;
140 }
141
142 /* We shouldn't map buffers referenced by CS, busy buffers,
143 * and ones placed in VRAM. */
144 /* XXX Check for VRAM buffers. */
145 for (i = 0; i < vertex_element_count; i++) {
146 velem = &r300->velems->velem[i];
147 vbi = velem->vertex_buffer_index;
148
149 if (!checked[vbi]) {
150 vbuf = &r300->vertex_buffer[vbi];
151
152 if (r300_buffer_is_referenced(&r300->context,
153 vbuf->buffer,
154 R300_REF_CS | R300_REF_HW)) {
155 /* It's a very bad idea to map it... */
156 return FALSE;
157 }
158 checked[vbi] = TRUE;
159 }
160 }
161 return TRUE;
162 }
163
164 /*****************************************************************************
165 * The emission of draw packets for r500. Older GPUs may use these functions *
166 * after resolving fallback issues (e.g. stencil ref two-sided). *
167 ****************************************************************************/
168
169 void r500_emit_draw_arrays_immediate(struct r300_context *r300,
170 unsigned mode,
171 unsigned start,
172 unsigned count)
173 {
174 struct pipe_vertex_element* velem;
175 struct pipe_vertex_buffer* vbuf;
176 unsigned vertex_element_count = r300->velems->count;
177 unsigned i, v, vbi, dw, elem_offset, dwords;
178
179 /* Size of the vertex, in dwords. */
180 unsigned vertex_size = 0;
181
182 /* Offsets of the attribute, in dwords, from the start of the vertex. */
183 unsigned offset[PIPE_MAX_ATTRIBS];
184
185 /* Size of the vertex element, in dwords. */
186 unsigned size[PIPE_MAX_ATTRIBS];
187
188 /* Stride to the same attrib in the next vertex in the vertex buffer,
189 * in dwords. */
190 unsigned stride[PIPE_MAX_ATTRIBS] = {0};
191
192 /* Mapped vertex buffers. */
193 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
194 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {NULL};
195
196 CS_LOCALS(r300);
197
198 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
199 for (i = 0; i < vertex_element_count; i++) {
200 velem = &r300->velems->velem[i];
201 offset[i] = velem->src_offset / 4;
202 size[i] = util_format_get_blocksize(velem->src_format) / 4;
203 vertex_size += size[i];
204 vbi = velem->vertex_buffer_index;
205
206 /* Map the buffer. */
207 if (!map[vbi]) {
208 vbuf = &r300->vertex_buffer[vbi];
209 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context,
210 vbuf->buffer,
211 PIPE_TRANSFER_READ,
212 &transfer[vbi]);
213 map[vbi] += vbuf->buffer_offset / 4;
214 stride[vbi] = vbuf->stride / 4;
215 }
216 }
217
218 dwords = 9 + count * vertex_size;
219
220 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
221 r300_emit_buffer_validate(r300, FALSE, NULL);
222 r300_emit_dirty_state(r300);
223
224 BEGIN_CS(dwords);
225 OUT_CS_REG(R300_GA_COLOR_CONTROL,
226 r300_provoking_vertex_fixes(r300, mode));
227 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
228 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
229 OUT_CS(count - 1);
230 OUT_CS(0);
231 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
232 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
233 r300_translate_primitive(mode));
234
235 /* Emit vertices. */
236 for (v = 0; v < count; v++) {
237 for (i = 0; i < vertex_element_count; i++) {
238 velem = &r300->velems->velem[i];
239 vbi = velem->vertex_buffer_index;
240 elem_offset = offset[i] + stride[vbi] * (v + start);
241
242 for (dw = 0; dw < size[i]; dw++) {
243 OUT_CS(map[vbi][elem_offset + dw]);
244 }
245 }
246 }
247 END_CS;
248
249 /* Unmap buffers. */
250 for (i = 0; i < vertex_element_count; i++) {
251 vbi = r300->velems->velem[i].vertex_buffer_index;
252
253 if (map[vbi]) {
254 vbuf = &r300->vertex_buffer[vbi];
255 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]);
256 map[vbi] = NULL;
257 }
258 }
259 }
260
261 void r500_emit_draw_arrays(struct r300_context *r300,
262 unsigned mode,
263 unsigned count)
264 {
265 boolean alt_num_verts = count > 65535;
266 CS_LOCALS(r300);
267
268 if (alt_num_verts) {
269 if (count >= (1 << 24)) {
270 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
271 "refusing to render.\n", count);
272 return;
273 }
274 BEGIN_CS(9);
275 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
276 } else {
277 BEGIN_CS(7);
278 }
279 OUT_CS_REG(R300_GA_COLOR_CONTROL,
280 r300_provoking_vertex_fixes(r300, mode));
281 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
282 OUT_CS(count - 1);
283 OUT_CS(0);
284 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
285 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
286 r300_translate_primitive(mode) |
287 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
288 END_CS;
289 }
290
291 void r500_emit_draw_elements(struct r300_context *r300,
292 struct pipe_resource* indexBuffer,
293 unsigned indexSize,
294 int indexBias,
295 unsigned minIndex,
296 unsigned maxIndex,
297 unsigned mode,
298 unsigned start,
299 unsigned count)
300 {
301 uint32_t count_dwords;
302 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
303 boolean alt_num_verts = count > 65535;
304 CS_LOCALS(r300);
305
306 if (count >= (1 << 24)) {
307 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
308 "refusing to render.\n", count);
309 return;
310 }
311
312 assert(indexBias == 0);
313
314 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
315
316 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
317 count, minIndex, maxIndex);
318
319 if (alt_num_verts) {
320 BEGIN_CS(15);
321 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
322 } else {
323 BEGIN_CS(13);
324 }
325 OUT_CS_REG(R300_GA_COLOR_CONTROL,
326 r300_provoking_vertex_fixes(r300, mode));
327 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
328 OUT_CS(maxIndex);
329 OUT_CS(minIndex);
330 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
331 if (indexSize == 4) {
332 count_dwords = count;
333 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
334 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
335 r300_translate_primitive(mode) |
336 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
337 } else {
338 count_dwords = (count + 1) / 2;
339 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
340 r300_translate_primitive(mode) |
341 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
342 }
343
344 /* INDX_BUFFER is a truly special packet3.
345 * Unlike most other packet3, where the offset is after the count,
346 * the order is reversed, so the relocation ends up carrying the
347 * size of the indexbuf instead of the offset.
348 */
349 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
350 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
351 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
352 OUT_CS(offset_dwords << 2);
353 OUT_CS_BUF_RELOC(indexBuffer, count_dwords,
354 RADEON_GEM_DOMAIN_GTT, 0, 0);
355
356 END_CS;
357 }
358
359 /*****************************************************************************
360 * The emission of draw packets for r300 which take care of the two-sided *
361 * stencil ref fallback and call r500's functions. *
362 ****************************************************************************/
363
364 /* Set drawing for front faces. */
365 static void r300_begin_stencil_ref_fallback(struct r300_context *r300)
366 {
367 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
368 CS_LOCALS(r300);
369
370 BEGIN_CS(2);
371 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK);
372 END_CS;
373 }
374
375 /* Set drawing for back faces. */
376 static void r300_switch_stencil_ref_side(struct r300_context *r300)
377 {
378 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
379 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
380 CS_LOCALS(r300);
381
382 BEGIN_CS(4);
383 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT);
384 OUT_CS_REG(R300_ZB_STENCILREFMASK,
385 dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]);
386 END_CS;
387 }
388
389 /* Restore the original state. */
390 static void r300_end_stencil_ref_fallback(struct r300_context *r300)
391 {
392 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
393 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
394 CS_LOCALS(r300);
395
396 BEGIN_CS(4);
397 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode);
398 OUT_CS_REG(R300_ZB_STENCILREFMASK,
399 dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]);
400 END_CS;
401 }
402
403 void r300_emit_draw_arrays_immediate(struct r300_context *r300,
404 unsigned mode,
405 unsigned start,
406 unsigned count)
407 {
408 if (!r300->stencil_ref_bf_fallback) {
409 r500_emit_draw_arrays_immediate(r300, mode, start, count);
410 } else {
411 r300_begin_stencil_ref_fallback(r300);
412 r500_emit_draw_arrays_immediate(r300, mode, start, count);
413 r300_switch_stencil_ref_side(r300);
414 r500_emit_draw_arrays_immediate(r300, mode, start, count);
415 r300_end_stencil_ref_fallback(r300);
416 }
417 }
418
419 void r300_emit_draw_arrays(struct r300_context *r300,
420 unsigned mode,
421 unsigned count)
422 {
423 if (!r300->stencil_ref_bf_fallback) {
424 r500_emit_draw_arrays(r300, mode, count);
425 } else {
426 r300_begin_stencil_ref_fallback(r300);
427 r500_emit_draw_arrays(r300, mode, count);
428 r300_switch_stencil_ref_side(r300);
429 r500_emit_draw_arrays(r300, mode, count);
430 r300_end_stencil_ref_fallback(r300);
431 }
432 }
433
434 void r300_emit_draw_elements(struct r300_context *r300,
435 struct pipe_resource* indexBuffer,
436 unsigned indexSize,
437 int indexBias,
438 unsigned minIndex,
439 unsigned maxIndex,
440 unsigned mode,
441 unsigned start,
442 unsigned count)
443 {
444 if (!r300->stencil_ref_bf_fallback) {
445 r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias,
446 minIndex, maxIndex, mode, start, count);
447 } else {
448 r300_begin_stencil_ref_fallback(r300);
449 r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias,
450 minIndex, maxIndex, mode, start, count);
451 r300_switch_stencil_ref_side(r300);
452 r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias,
453 minIndex, maxIndex, mode, start, count);
454 r300_end_stencil_ref_fallback(r300);
455 }
456 }
457
458 static void r300_shorten_ubyte_elts(struct r300_context* r300,
459 struct pipe_resource** elts,
460 unsigned start,
461 unsigned count)
462 {
463 struct pipe_context* context = &r300->context;
464 struct pipe_screen* screen = r300->context.screen;
465 struct pipe_resource* new_elts;
466 unsigned char *in_map;
467 unsigned short *out_map;
468 struct pipe_transfer *src_transfer, *dst_transfer;
469 unsigned i;
470
471 new_elts = pipe_buffer_create(screen,
472 PIPE_BIND_INDEX_BUFFER,
473 2 * count);
474
475 in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer);
476 out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer);
477
478 in_map += start;
479
480 for (i = 0; i < count; i++) {
481 *out_map = (unsigned short)*in_map;
482 in_map++;
483 out_map++;
484 }
485
486 pipe_buffer_unmap(context, *elts, src_transfer);
487 pipe_buffer_unmap(context, new_elts, dst_transfer);
488
489 *elts = new_elts;
490 }
491
492 static void r300_align_ushort_elts(struct r300_context *r300,
493 struct pipe_resource **elts,
494 unsigned start, unsigned count)
495 {
496 struct pipe_context* context = &r300->context;
497 struct pipe_transfer *in_transfer = NULL;
498 struct pipe_transfer *out_transfer = NULL;
499 struct pipe_resource* new_elts;
500 unsigned short *in_map;
501 unsigned short *out_map;
502
503 new_elts = pipe_buffer_create(context->screen,
504 PIPE_BIND_INDEX_BUFFER,
505 2 * count);
506
507 in_map = pipe_buffer_map(context, *elts,
508 PIPE_TRANSFER_READ, &in_transfer);
509 out_map = pipe_buffer_map(context, new_elts,
510 PIPE_TRANSFER_WRITE, &out_transfer);
511
512 memcpy(out_map, in_map+start, 2 * count);
513
514 pipe_buffer_unmap(context, *elts, in_transfer);
515 pipe_buffer_unmap(context, new_elts, out_transfer);
516
517 *elts = new_elts;
518 }
519
520 /* This is the fast-path drawing & emission for HW TCL. */
521 void r300_draw_range_elements(struct pipe_context* pipe,
522 struct pipe_resource* indexBuffer,
523 unsigned indexSize,
524 int indexBias,
525 unsigned minIndex,
526 unsigned maxIndex,
527 unsigned mode,
528 unsigned start,
529 unsigned count)
530 {
531 struct r300_context* r300 = r300_context(pipe);
532 struct pipe_resource* orgIndexBuffer = indexBuffer;
533 boolean alt_num_verts = r300->screen->caps.is_r500 &&
534 count > 65536 &&
535 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
536 unsigned short_count;
537
538 if (r300->skip_rendering) {
539 return;
540 }
541
542 if (!u_trim_pipe_prim(mode, &count)) {
543 return;
544 }
545
546 if (indexSize == 1) {
547 r300_shorten_ubyte_elts(r300, &indexBuffer, start, count);
548 indexSize = 2;
549 start = 0;
550 } else if (indexSize == 2 && start % 2 != 0) {
551 r300_align_ushort_elts(r300, &indexBuffer, start, count);
552 start = 0;
553 }
554
555 r300_update_derived_state(r300);
556
557 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count);
558
559 /* 128 dwords for emit_aos and emit_draw_elements */
560 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
561 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
562 r300_emit_dirty_state(r300);
563 r300_emit_aos(r300, 0, TRUE);
564
565 u_upload_flush(r300->upload_vb);
566 u_upload_flush(r300->upload_ib);
567 if (alt_num_verts || count <= 65535) {
568 r300->emit_draw_elements(r300, indexBuffer, indexSize, indexBias,
569 minIndex, maxIndex, mode, start, count);
570 } else {
571 do {
572 short_count = MIN2(count, 65534);
573 r300->emit_draw_elements(r300, indexBuffer, indexSize, indexBias,
574 minIndex, maxIndex,
575 mode, start, short_count);
576
577 start += short_count;
578 count -= short_count;
579
580 /* 16 spare dwords are enough for emit_draw_elements. */
581 if (count && r300_reserve_cs_space(r300, 16)) {
582 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
583 r300_emit_dirty_state(r300);
584 r300_emit_aos(r300, 0, TRUE);
585 }
586 } while (count);
587 }
588
589 if (indexBuffer != orgIndexBuffer) {
590 pipe_resource_reference( &indexBuffer, NULL );
591 }
592 }
593
594 /* Simple helpers for context setup. Should probably be moved to util. */
595 void r300_draw_elements(struct pipe_context* pipe,
596 struct pipe_resource* indexBuffer,
597 unsigned indexSize, int indexBias, unsigned mode,
598 unsigned start, unsigned count)
599 {
600 struct r300_context *r300 = r300_context(pipe);
601
602 pipe->draw_range_elements(pipe, indexBuffer, indexSize, indexBias,
603 0, r300->vertex_buffer_max_index,
604 mode, start, count);
605 }
606
607 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
608 unsigned start, unsigned count)
609 {
610 struct r300_context* r300 = r300_context(pipe);
611 boolean alt_num_verts = r300->screen->caps.is_r500 &&
612 count > 65536 &&
613 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0);
614 unsigned short_count;
615
616 if (r300->skip_rendering) {
617 return;
618 }
619
620 if (!u_trim_pipe_prim(mode, &count)) {
621 return;
622 }
623
624 r300_update_derived_state(r300);
625
626 if (immd_is_good_idea(r300, count)) {
627 r300->emit_draw_arrays_immediate(r300, mode, start, count);
628 } else {
629 /* Make sure there are at least 128 spare dwords in the command buffer.
630 * (most of it being consumed by emit_aos) */
631 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
632 r300_emit_buffer_validate(r300, TRUE, NULL);
633 r300_emit_dirty_state(r300);
634
635 if (alt_num_verts || count <= 65535) {
636 r300_emit_aos(r300, start, FALSE);
637 r300->emit_draw_arrays(r300, mode, count);
638 } else {
639 do {
640 short_count = MIN2(count, 65535);
641 r300_emit_aos(r300, start, FALSE);
642 r300->emit_draw_arrays(r300, mode, short_count);
643
644 start += short_count;
645 count -= short_count;
646
647 /* Again, we emit both AOS and draw_arrays so there should be
648 * at least 128 spare dwords. */
649 if (count && r300_reserve_cs_space(r300, 128)) {
650 r300_emit_buffer_validate(r300, TRUE, NULL);
651 r300_emit_dirty_state(r300);
652 }
653 } while (count);
654 }
655 u_upload_flush(r300->upload_vb);
656 }
657 }
658
659 /****************************************************************************
660 * The rest of this file is for SW TCL rendering only. Please be polite and *
661 * keep these functions separated so that they are easier to locate. ~C. *
662 ***************************************************************************/
663
664 /* SW TCL arrays, using Draw. */
665 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
666 unsigned mode,
667 unsigned start,
668 unsigned count)
669 {
670 struct r300_context* r300 = r300_context(pipe);
671 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
672 int i;
673
674 if (r300->skip_rendering) {
675 return;
676 }
677
678 if (!u_trim_pipe_prim(mode, &count)) {
679 return;
680 }
681
682 for (i = 0; i < r300->vertex_buffer_count; i++) {
683 void* buf = pipe_buffer_map(pipe,
684 r300->vertex_buffer[i].buffer,
685 PIPE_TRANSFER_READ,
686 &vb_transfer[i]);
687 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
688 }
689
690 draw_set_mapped_element_buffer(r300->draw, 0, 0, NULL);
691
692 draw_arrays(r300->draw, mode, start, count);
693
694 for (i = 0; i < r300->vertex_buffer_count; i++) {
695 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
696 vb_transfer[i]);
697 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
698 }
699 }
700
701 /* SW TCL elements, using Draw. */
702 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
703 struct pipe_resource* indexBuffer,
704 unsigned indexSize,
705 int indexBias,
706 unsigned minIndex,
707 unsigned maxIndex,
708 unsigned mode,
709 unsigned start,
710 unsigned count)
711 {
712 struct r300_context* r300 = r300_context(pipe);
713 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
714 struct pipe_transfer *ib_transfer;
715 int i;
716 void* indices;
717
718 if (r300->skip_rendering) {
719 return;
720 }
721
722 if (!u_trim_pipe_prim(mode, &count)) {
723 return;
724 }
725
726 for (i = 0; i < r300->vertex_buffer_count; i++) {
727 void* buf = pipe_buffer_map(pipe,
728 r300->vertex_buffer[i].buffer,
729 PIPE_TRANSFER_READ,
730 &vb_transfer[i]);
731 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
732 }
733
734 indices = pipe_buffer_map(pipe, indexBuffer,
735 PIPE_TRANSFER_READ, &ib_transfer);
736 draw_set_mapped_element_buffer_range(r300->draw, indexSize, indexBias,
737 minIndex, maxIndex, indices);
738
739 draw_arrays(r300->draw, mode, start, count);
740
741 for (i = 0; i < r300->vertex_buffer_count; i++) {
742 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer,
743 vb_transfer[i]);
744 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
745 }
746
747 pipe_buffer_unmap(pipe, indexBuffer,
748 ib_transfer);
749 draw_set_mapped_element_buffer_range(r300->draw, 0, 0,
750 start, start + count - 1,
751 NULL);
752 }
753
754 /* Object for rendering using Draw. */
755 struct r300_render {
756 /* Parent class */
757 struct vbuf_render base;
758
759 /* Pipe context */
760 struct r300_context* r300;
761
762 /* Vertex information */
763 size_t vertex_size;
764 unsigned prim;
765 unsigned hwprim;
766
767 /* VBO */
768 struct pipe_resource* vbo;
769 size_t vbo_size;
770 size_t vbo_offset;
771 size_t vbo_max_used;
772 void * vbo_ptr;
773
774 struct pipe_transfer *vbo_transfer;
775 };
776
777 static INLINE struct r300_render*
778 r300_render(struct vbuf_render* render)
779 {
780 return (struct r300_render*)render;
781 }
782
783 static const struct vertex_info*
784 r300_render_get_vertex_info(struct vbuf_render* render)
785 {
786 struct r300_render* r300render = r300_render(render);
787 struct r300_context* r300 = r300render->r300;
788
789 r300_update_derived_state(r300);
790
791 return &r300->vertex_info;
792 }
793
794 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
795 ushort vertex_size,
796 ushort count)
797 {
798 struct r300_render* r300render = r300_render(render);
799 struct r300_context* r300 = r300render->r300;
800 struct pipe_screen* screen = r300->context.screen;
801 size_t size = (size_t)vertex_size * (size_t)count;
802
803 if (size + r300render->vbo_offset > r300render->vbo_size)
804 {
805 pipe_resource_reference(&r300->vbo, NULL);
806 r300render->vbo = pipe_buffer_create(screen,
807 PIPE_BIND_VERTEX_BUFFER,
808 R300_MAX_DRAW_VBO_SIZE);
809 r300render->vbo_offset = 0;
810 r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE;
811 }
812
813 r300render->vertex_size = vertex_size;
814 r300->vbo = r300render->vbo;
815 r300->vbo_offset = r300render->vbo_offset;
816
817 return (r300render->vbo) ? TRUE : FALSE;
818 }
819
820 static void* r300_render_map_vertices(struct vbuf_render* render)
821 {
822 struct r300_render* r300render = r300_render(render);
823
824 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
825 r300render->vbo,
826 PIPE_TRANSFER_WRITE,
827 &r300render->vbo_transfer);
828
829 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
830 }
831
832 static void r300_render_unmap_vertices(struct vbuf_render* render,
833 ushort min,
834 ushort max)
835 {
836 struct r300_render* r300render = r300_render(render);
837 struct pipe_context* context = &r300render->r300->context;
838 CS_LOCALS(r300render->r300);
839 BEGIN_CS(2);
840 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
841 END_CS;
842
843 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
844 r300render->vertex_size * (max + 1));
845 pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer);
846 }
847
848 static void r300_render_release_vertices(struct vbuf_render* render)
849 {
850 struct r300_render* r300render = r300_render(render);
851
852 r300render->vbo_offset += r300render->vbo_max_used;
853 r300render->vbo_max_used = 0;
854 }
855
856 static boolean r300_render_set_primitive(struct vbuf_render* render,
857 unsigned prim)
858 {
859 struct r300_render* r300render = r300_render(render);
860
861 r300render->prim = prim;
862 r300render->hwprim = r300_translate_primitive(prim);
863
864 return TRUE;
865 }
866
867 static void r500_render_draw_arrays(struct vbuf_render* render,
868 unsigned start,
869 unsigned count)
870 {
871 struct r300_render* r300render = r300_render(render);
872 struct r300_context* r300 = r300render->r300;
873
874 CS_LOCALS(r300);
875
876 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2);
877 r300_emit_buffer_validate(r300, FALSE, NULL);
878 r300_emit_dirty_state(r300);
879
880 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
881
882 BEGIN_CS(2);
883 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
884 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
885 r300render->hwprim);
886 END_CS;
887 }
888
889 static void r500_render_draw(struct vbuf_render* render,
890 const ushort* indices,
891 uint count)
892 {
893 struct r300_render* r300render = r300_render(render);
894 struct r300_context* r300 = r300render->r300;
895 int i;
896 unsigned dwords = 2 + (count+1)/2;
897
898 CS_LOCALS(r300);
899
900 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
901 r300_emit_buffer_validate(r300, FALSE, NULL);
902 r300_emit_dirty_state(r300);
903
904 BEGIN_CS(dwords);
905 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
906 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
907 r300render->hwprim);
908 for (i = 0; i < count-1; i += 2) {
909 OUT_CS(indices[i+1] << 16 | indices[i]);
910 }
911 if (count % 2) {
912 OUT_CS(indices[count-1]);
913 }
914 END_CS;
915 }
916
917 static void r300_render_draw_arrays(struct vbuf_render* render,
918 unsigned start,
919 unsigned count)
920 {
921 struct r300_context* r300 = r300_render(render)->r300;
922
923 if (!r300->stencil_ref_bf_fallback) {
924 r500_render_draw_arrays(render, start, count);
925 } else {
926 r300_begin_stencil_ref_fallback(r300);
927 r500_render_draw_arrays(render, start, count);
928 r300_switch_stencil_ref_side(r300);
929 r500_render_draw_arrays(render, start, count);
930 r300_end_stencil_ref_fallback(r300);
931 }
932 }
933
934 static void r300_render_draw(struct vbuf_render* render,
935 const ushort* indices,
936 uint count)
937 {
938 struct r300_context* r300 = r300_render(render)->r300;
939
940 if (!r300->stencil_ref_bf_fallback) {
941 r500_render_draw(render, indices, count);
942 } else {
943 r300_begin_stencil_ref_fallback(r300);
944 r500_render_draw(render, indices, count);
945 r300_switch_stencil_ref_side(r300);
946 r500_render_draw(render, indices, count);
947 r300_end_stencil_ref_fallback(r300);
948 }
949 }
950
951 static void r300_render_destroy(struct vbuf_render* render)
952 {
953 FREE(render);
954 }
955
956 static struct vbuf_render* r300_render_create(struct r300_context* r300)
957 {
958 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
959
960 r300render->r300 = r300;
961
962 /* XXX find real numbers plz */
963 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
964 r300render->base.max_indices = 16 * 1024;
965
966 r300render->base.get_vertex_info = r300_render_get_vertex_info;
967 r300render->base.allocate_vertices = r300_render_allocate_vertices;
968 r300render->base.map_vertices = r300_render_map_vertices;
969 r300render->base.unmap_vertices = r300_render_unmap_vertices;
970 r300render->base.set_primitive = r300_render_set_primitive;
971 if (r300->screen->caps.is_r500) {
972 r300render->base.draw = r500_render_draw;
973 r300render->base.draw_arrays = r500_render_draw_arrays;
974 } else {
975 r300render->base.draw = r300_render_draw;
976 r300render->base.draw_arrays = r300_render_draw_arrays;
977 }
978 r300render->base.release_vertices = r300_render_release_vertices;
979 r300render->base.destroy = r300_render_destroy;
980
981 r300render->vbo = NULL;
982 r300render->vbo_size = 0;
983 r300render->vbo_offset = 0;
984
985 return &r300render->base;
986 }
987
988 struct draw_stage* r300_draw_stage(struct r300_context* r300)
989 {
990 struct vbuf_render* render;
991 struct draw_stage* stage;
992
993 render = r300_render_create(r300);
994
995 if (!render) {
996 return NULL;
997 }
998
999 stage = draw_vbuf_stage(r300->draw, render);
1000
1001 if (!stage) {
1002 render->destroy(render);
1003 return NULL;
1004 }
1005
1006 draw_set_render(r300->draw, render);
1007
1008 return stage;
1009 }