Merge remote branch 'origin/opengl-es-v2'
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "pipe/p_inlines.h"
30
31 #include "util/u_memory.h"
32 #include "util/u_prim.h"
33
34 #include "r300_cs.h"
35 #include "r300_context.h"
36 #include "r300_emit.h"
37 #include "r300_reg.h"
38 #include "r300_render.h"
39 #include "r300_state_derived.h"
40
41 /* r300_render: Vertex and index buffer primitive emission. */
42 #define R300_MAX_VBO_SIZE (1024 * 1024)
43
44 uint32_t r300_translate_primitive(unsigned prim)
45 {
46 switch (prim) {
47 case PIPE_PRIM_POINTS:
48 return R300_VAP_VF_CNTL__PRIM_POINTS;
49 case PIPE_PRIM_LINES:
50 return R300_VAP_VF_CNTL__PRIM_LINES;
51 case PIPE_PRIM_LINE_LOOP:
52 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
53 case PIPE_PRIM_LINE_STRIP:
54 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
55 case PIPE_PRIM_TRIANGLES:
56 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
57 case PIPE_PRIM_TRIANGLE_STRIP:
58 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
59 case PIPE_PRIM_TRIANGLE_FAN:
60 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
61 case PIPE_PRIM_QUADS:
62 return R300_VAP_VF_CNTL__PRIM_QUADS;
63 case PIPE_PRIM_QUAD_STRIP:
64 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
65 case PIPE_PRIM_POLYGON:
66 return R300_VAP_VF_CNTL__PRIM_POLYGON;
67 default:
68 return 0;
69 }
70 }
71
72 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
73 unsigned mode)
74 {
75 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
76 uint32_t color_control = rs->color_control;
77
78 /* By default (see r300_state.c:r300_create_rs_state) color_control is
79 * initialized to provoking the first vertex.
80 *
81 * Triangle fans must be reduced to the second vertex, not the first, in
82 * Gallium flatshade-first mode, as per the GL spec.
83 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
84 *
85 * Quads never provoke correctly in flatshade-first mode. The first
86 * vertex is never considered as provoking, so only the second, third,
87 * and fourth vertices can be selected, and both "third" and "last" modes
88 * select the fourth vertex. This is probably due to D3D lacking quads.
89 *
90 * Similarly, polygons reduce to the first, not the last, vertex, when in
91 * "last" mode, and all other modes start from the second vertex.
92 *
93 * ~ C.
94 */
95
96 if (rs->rs.flatshade_first) {
97 switch (mode) {
98 case PIPE_PRIM_TRIANGLE_FAN:
99 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
100 break;
101 case PIPE_PRIM_QUADS:
102 case PIPE_PRIM_QUAD_STRIP:
103 case PIPE_PRIM_POLYGON:
104 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
105 break;
106 default:
107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
108 break;
109 }
110 } else {
111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
112 }
113
114 return color_control;
115 }
116
117 static void r300_emit_draw_immediate(struct r300_context *r300,
118 unsigned mode,
119 unsigned start,
120 unsigned count)
121 {
122 struct pipe_buffer* vbo = r300->vertex_buffer[0].buffer;
123 unsigned vertex_size = r300->vertex_buffer[0].stride / sizeof(float);
124 unsigned i;
125 uint32_t* map;
126 CS_LOCALS(r300);
127
128 map = (uint32_t*)pipe_buffer_map_range(r300->context.screen, vbo,
129 start * vertex_size, count * vertex_size,
130 PIPE_BUFFER_USAGE_CPU_READ);
131
132 BEGIN_CS(10 + count * vertex_size);
133 OUT_CS_REG(R300_GA_COLOR_CONTROL,
134 r300_provoking_vertex_fixes(r300, mode));
135 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
136 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
137 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
138 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
139 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
140 r300_translate_primitive(mode));
141 //debug_printf("r300: Immd %d verts, %d attrs\n", count, vertex_size);
142 for (i = 0; i < count * vertex_size; i++) {
143 if (i % vertex_size == 0) {
144 //debug_printf("r300: -- vert --\n");
145 }
146 //debug_printf("r300: 0x%08x\n", *map);
147 OUT_CS(*map);
148 map++;
149 }
150 END_CS;
151
152 pipe_buffer_unmap(r300->context.screen, vbo);
153 }
154
155 static void r300_emit_draw_arrays(struct r300_context *r300,
156 unsigned mode,
157 unsigned count)
158 {
159 CS_LOCALS(r300);
160
161 BEGIN_CS(8);
162 OUT_CS_REG(R300_GA_COLOR_CONTROL,
163 r300_provoking_vertex_fixes(r300, mode));
164 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
165 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
166 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
167 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
168 r300_translate_primitive(mode));
169 END_CS;
170 }
171
172 static void r300_emit_draw_elements(struct r300_context *r300,
173 struct pipe_buffer* indexBuffer,
174 unsigned indexSize,
175 unsigned minIndex,
176 unsigned maxIndex,
177 unsigned mode,
178 unsigned start,
179 unsigned count)
180 {
181 uint32_t count_dwords;
182 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
183 CS_LOCALS(r300);
184
185 /* XXX most of these are stupid */
186 assert(indexSize == 4 || indexSize == 2);
187 assert((start * indexSize) % 4 == 0);
188 assert(offset_dwords == 0);
189
190 BEGIN_CS(14);
191 OUT_CS_REG(R300_GA_COLOR_CONTROL,
192 r300_provoking_vertex_fixes(r300, mode));
193 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, minIndex);
194 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, maxIndex);
195 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
196 if (indexSize == 4) {
197 count_dwords = count + start;
198 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
199 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
200 r300_translate_primitive(mode));
201 } else {
202 count_dwords = (count + start + 1) / 2;
203 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
204 r300_translate_primitive(mode));
205 }
206
207 /* INDX_BUFFER is a truly special packet3.
208 * Unlike most other packet3, where the offset is after the count,
209 * the order is reversed, so the relocation ends up carrying the
210 * size of the indexbuf instead of the offset.
211 *
212 * XXX Fix offset
213 */
214 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
215 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
216 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
217 OUT_CS(offset_dwords);
218 OUT_CS_RELOC(indexBuffer, count_dwords,
219 RADEON_GEM_DOMAIN_GTT, 0, 0);
220
221 END_CS;
222 }
223
224
225 static boolean r300_setup_vertex_buffers(struct r300_context *r300)
226 {
227 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
228 struct pipe_vertex_element *velem = r300->vertex_element;
229
230 validate:
231 for (int i = 0; i < r300->vertex_element_count; i++) {
232 if (!r300->winsys->add_buffer(r300->winsys,
233 vbuf[velem[i].vertex_buffer_index].buffer,
234 RADEON_GEM_DOMAIN_GTT, 0)) {
235 r300->context.flush(&r300->context, 0, NULL);
236 goto validate;
237 }
238 }
239
240 if (!r300->winsys->validate(r300->winsys)) {
241 r300->context.flush(&r300->context, 0, NULL);
242 return r300->winsys->validate(r300->winsys);
243 }
244
245 return TRUE;
246 }
247
248 static void r300_shorten_ubyte_elts(struct r300_context* r300,
249 struct pipe_buffer** elts,
250 unsigned count)
251 {
252 struct pipe_screen* screen = r300->context.screen;
253 struct pipe_buffer* new_elts;
254 unsigned char *in_map;
255 unsigned short *out_map;
256 unsigned i;
257
258 new_elts = screen->buffer_create(screen, 32,
259 PIPE_BUFFER_USAGE_INDEX |
260 PIPE_BUFFER_USAGE_CPU_WRITE |
261 PIPE_BUFFER_USAGE_GPU_READ,
262 2 * count);
263
264 in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
265 out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
266
267 for (i = 0; i < count; i++) {
268 *out_map = (unsigned short)*in_map;
269 in_map++;
270 out_map++;
271 }
272
273 pipe_buffer_unmap(screen, *elts);
274 pipe_buffer_unmap(screen, new_elts);
275
276 *elts = new_elts;
277 }
278
279 /* This is the fast-path drawing & emission for HW TCL. */
280 void r300_draw_range_elements(struct pipe_context* pipe,
281 struct pipe_buffer* indexBuffer,
282 unsigned indexSize,
283 unsigned minIndex,
284 unsigned maxIndex,
285 unsigned mode,
286 unsigned start,
287 unsigned count)
288 {
289 struct r300_context* r300 = r300_context(pipe);
290 struct pipe_buffer* orgIndexBuffer = indexBuffer;
291
292 if (!u_trim_pipe_prim(mode, &count)) {
293 return;
294 }
295
296 if (count > 65535) {
297 /* XXX: use aux/indices functions to split this into smaller
298 * primitives.
299 */
300 return;
301 }
302
303 r300_update_derived_state(r300);
304
305 if (!r300_setup_vertex_buffers(r300)) {
306 return;
307 }
308
309 if (indexSize == 1) {
310 r300_shorten_ubyte_elts(r300, &indexBuffer, count);
311 indexSize = 2;
312 }
313
314 if (!r300->winsys->add_buffer(r300->winsys, indexBuffer,
315 RADEON_GEM_DOMAIN_GTT, 0)) {
316 goto cleanup;
317 }
318
319 if (!r300->winsys->validate(r300->winsys)) {
320 goto cleanup;
321 }
322
323 r300_emit_dirty_state(r300);
324
325 r300_emit_aos(r300, 0);
326
327 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex, maxIndex,
328 mode, start, count);
329
330 cleanup:
331 if (indexBuffer != orgIndexBuffer) {
332 pipe->screen->buffer_destroy(indexBuffer);
333 }
334 }
335
336 /* Simple helpers for context setup. Should probably be moved to util. */
337 void r300_draw_elements(struct pipe_context* pipe,
338 struct pipe_buffer* indexBuffer,
339 unsigned indexSize, unsigned mode,
340 unsigned start, unsigned count)
341 {
342 pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0, ~0,
343 mode, start, count);
344 }
345
346 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
347 unsigned start, unsigned count)
348 {
349 struct r300_context* r300 = r300_context(pipe);
350
351 if (!u_trim_pipe_prim(mode, &count)) {
352 return;
353 }
354
355 if (count > 65535) {
356 /* XXX: driver needs to handle this -- use the functions in
357 * aux/indices to split this into several smaller primitives.
358 */
359 return;
360 }
361
362 r300_update_derived_state(r300);
363
364 if (!r300_setup_vertex_buffers(r300)) {
365 return;
366 }
367
368 r300_emit_dirty_state(r300);
369
370 if (FALSE && count <= 4 && r300->vertex_buffer_count == 1) {
371 r300_emit_draw_immediate(r300, mode, start, count);
372 } else {
373 r300_emit_aos(r300, start);
374 r300_emit_draw_arrays(r300, mode, count);
375 }
376 }
377
378 /****************************************************************************
379 * The rest of this file is for SW TCL rendering only. Please be polite and *
380 * keep these functions separated so that they are easier to locate. ~C. *
381 ***************************************************************************/
382
383 /* SW TCL arrays, using Draw. */
384 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
385 unsigned mode,
386 unsigned start,
387 unsigned count)
388 {
389 struct r300_context* r300 = r300_context(pipe);
390 int i;
391
392 if (!u_trim_pipe_prim(mode, &count)) {
393 return;
394 }
395
396 for (i = 0; i < r300->vertex_buffer_count; i++) {
397 void* buf = pipe_buffer_map(pipe->screen,
398 r300->vertex_buffer[i].buffer,
399 PIPE_BUFFER_USAGE_CPU_READ);
400 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
401 }
402
403 draw_set_mapped_element_buffer(r300->draw, 0, NULL);
404
405 draw_set_mapped_constant_buffer(r300->draw,
406 PIPE_SHADER_VERTEX,
407 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
408 r300->shader_constants[PIPE_SHADER_VERTEX].count *
409 (sizeof(float) * 4));
410
411 draw_arrays(r300->draw, mode, start, count);
412
413 for (i = 0; i < r300->vertex_buffer_count; i++) {
414 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
415 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
416 }
417 }
418
419 /* SW TCL elements, using Draw. */
420 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
421 struct pipe_buffer* indexBuffer,
422 unsigned indexSize,
423 unsigned minIndex,
424 unsigned maxIndex,
425 unsigned mode,
426 unsigned start,
427 unsigned count)
428 {
429 struct r300_context* r300 = r300_context(pipe);
430 int i;
431 void* indices;
432
433 if (!u_trim_pipe_prim(mode, &count)) {
434 return;
435 }
436
437 for (i = 0; i < r300->vertex_buffer_count; i++) {
438 void* buf = pipe_buffer_map(pipe->screen,
439 r300->vertex_buffer[i].buffer,
440 PIPE_BUFFER_USAGE_CPU_READ);
441 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
442 }
443
444 indices = pipe_buffer_map(pipe->screen, indexBuffer,
445 PIPE_BUFFER_USAGE_CPU_READ);
446 draw_set_mapped_element_buffer_range(r300->draw, indexSize,
447 minIndex, maxIndex, indices);
448
449 draw_set_mapped_constant_buffer(r300->draw,
450 PIPE_SHADER_VERTEX,
451 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
452 r300->shader_constants[PIPE_SHADER_VERTEX].count *
453 (sizeof(float) * 4));
454
455 draw_arrays(r300->draw, mode, start, count);
456
457 for (i = 0; i < r300->vertex_buffer_count; i++) {
458 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
459 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
460 }
461
462 pipe_buffer_unmap(pipe->screen, indexBuffer);
463 draw_set_mapped_element_buffer_range(r300->draw, 0, start,
464 start + count - 1, NULL);
465 }
466
467 /* Object for rendering using Draw. */
468 struct r300_render {
469 /* Parent class */
470 struct vbuf_render base;
471
472 /* Pipe context */
473 struct r300_context* r300;
474
475 /* Vertex information */
476 size_t vertex_size;
477 unsigned prim;
478 unsigned hwprim;
479
480 /* VBO */
481 struct pipe_buffer* vbo;
482 size_t vbo_size;
483 size_t vbo_offset;
484 size_t vbo_max_used;
485 void * vbo_ptr;
486 };
487
488 static INLINE struct r300_render*
489 r300_render(struct vbuf_render* render)
490 {
491 return (struct r300_render*)render;
492 }
493
494 static const struct vertex_info*
495 r300_render_get_vertex_info(struct vbuf_render* render)
496 {
497 struct r300_render* r300render = r300_render(render);
498 struct r300_context* r300 = r300render->r300;
499
500 r300_update_derived_state(r300);
501
502 return &r300->vertex_info->vinfo;
503 }
504
505 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
506 ushort vertex_size,
507 ushort count)
508 {
509 struct r300_render* r300render = r300_render(render);
510 struct r300_context* r300 = r300render->r300;
511 struct pipe_screen* screen = r300->context.screen;
512 size_t size = (size_t)vertex_size * (size_t)count;
513
514 if (size + r300render->vbo_offset > r300render->vbo_size)
515 {
516 pipe_buffer_reference(&r300->vbo, NULL);
517 r300render->vbo = pipe_buffer_create(screen,
518 64,
519 PIPE_BUFFER_USAGE_VERTEX,
520 R300_MAX_VBO_SIZE);
521 r300render->vbo_offset = 0;
522 r300render->vbo_size = R300_MAX_VBO_SIZE;
523 }
524
525 r300render->vertex_size = vertex_size;
526 r300->vbo = r300render->vbo;
527 r300->vbo_offset = r300render->vbo_offset;
528
529 return (r300render->vbo) ? TRUE : FALSE;
530 }
531
532 static void* r300_render_map_vertices(struct vbuf_render* render)
533 {
534 struct r300_render* r300render = r300_render(render);
535 struct pipe_screen* screen = r300render->r300->context.screen;
536
537 r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo,
538 PIPE_BUFFER_USAGE_CPU_WRITE);
539
540 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
541 }
542
543 static void r300_render_unmap_vertices(struct vbuf_render* render,
544 ushort min,
545 ushort max)
546 {
547 struct r300_render* r300render = r300_render(render);
548 struct pipe_screen* screen = r300render->r300->context.screen;
549 CS_LOCALS(r300render->r300);
550 BEGIN_CS(2);
551 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
552 END_CS;
553
554 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
555 r300render->vertex_size * (max + 1));
556 pipe_buffer_unmap(screen, r300render->vbo);
557 }
558
559 static void r300_render_release_vertices(struct vbuf_render* render)
560 {
561 struct r300_render* r300render = r300_render(render);
562
563 r300render->vbo_offset += r300render->vbo_max_used;
564 r300render->vbo_max_used = 0;
565 }
566
567 static boolean r300_render_set_primitive(struct vbuf_render* render,
568 unsigned prim)
569 {
570 struct r300_render* r300render = r300_render(render);
571
572 r300render->prim = prim;
573 r300render->hwprim = r300_translate_primitive(prim);
574
575 return TRUE;
576 }
577
578 static void r300_render_draw_arrays(struct vbuf_render* render,
579 unsigned start,
580 unsigned count)
581 {
582 struct r300_render* r300render = r300_render(render);
583 struct r300_context* r300 = r300render->r300;
584
585 CS_LOCALS(r300);
586
587 r300_emit_dirty_state(r300);
588
589 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
590
591 BEGIN_CS(2);
592 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
593 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
594 r300render->hwprim);
595 END_CS;
596 }
597
598 static void r300_render_draw(struct vbuf_render* render,
599 const ushort* indices,
600 uint count)
601 {
602 struct r300_render* r300render = r300_render(render);
603 struct r300_context* r300 = r300render->r300;
604 int i;
605
606 CS_LOCALS(r300);
607
608 r300_emit_dirty_state(r300);
609
610 BEGIN_CS(2 + (count+1)/2);
611 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
612 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
613 r300render->hwprim);
614 for (i = 0; i < count-1; i += 2) {
615 OUT_CS(indices[i+1] << 16 | indices[i]);
616 }
617 if (count % 2) {
618 OUT_CS(indices[count-1]);
619 }
620 END_CS;
621 }
622
623 static void r300_render_destroy(struct vbuf_render* render)
624 {
625 FREE(render);
626 }
627
628 static struct vbuf_render* r300_render_create(struct r300_context* r300)
629 {
630 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
631
632 r300render->r300 = r300;
633
634 /* XXX find real numbers plz */
635 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
636 r300render->base.max_indices = 16 * 1024;
637
638 r300render->base.get_vertex_info = r300_render_get_vertex_info;
639 r300render->base.allocate_vertices = r300_render_allocate_vertices;
640 r300render->base.map_vertices = r300_render_map_vertices;
641 r300render->base.unmap_vertices = r300_render_unmap_vertices;
642 r300render->base.set_primitive = r300_render_set_primitive;
643 r300render->base.draw = r300_render_draw;
644 r300render->base.draw_arrays = r300_render_draw_arrays;
645 r300render->base.release_vertices = r300_render_release_vertices;
646 r300render->base.destroy = r300_render_destroy;
647
648 r300render->vbo = NULL;
649 r300render->vbo_size = 0;
650 r300render->vbo_offset = 0;
651
652 return &r300render->base;
653 }
654
655 struct draw_stage* r300_draw_stage(struct r300_context* r300)
656 {
657 struct vbuf_render* render;
658 struct draw_stage* stage;
659
660 render = r300_render_create(r300);
661
662 if (!render) {
663 return NULL;
664 }
665
666 stage = draw_vbuf_stage(r300->draw, render);
667
668 if (!stage) {
669 render->destroy(render);
670 return NULL;
671 }
672
673 draw_set_render(r300->draw, render);
674
675 return stage;
676 }