Merge branch 'gallium-vertexelementcso'
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "util/u_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_prim.h"
34
35 #include "r300_cs.h"
36 #include "r300_context.h"
37 #include "r300_emit.h"
38 #include "r300_reg.h"
39 #include "r300_render.h"
40 #include "r300_state_derived.h"
41
42 /* r300_render: Vertex and index buffer primitive emission. */
43 #define R300_MAX_VBO_SIZE (1024 * 1024)
44
45 /* XXX The DRM rejects VAP_ALT_NUM_VERTICES.. */
46 //#define ENABLE_ALT_NUM_VERTS
47
48 uint32_t r300_translate_primitive(unsigned prim)
49 {
50 switch (prim) {
51 case PIPE_PRIM_POINTS:
52 return R300_VAP_VF_CNTL__PRIM_POINTS;
53 case PIPE_PRIM_LINES:
54 return R300_VAP_VF_CNTL__PRIM_LINES;
55 case PIPE_PRIM_LINE_LOOP:
56 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
57 case PIPE_PRIM_LINE_STRIP:
58 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
59 case PIPE_PRIM_TRIANGLES:
60 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
61 case PIPE_PRIM_TRIANGLE_STRIP:
62 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
63 case PIPE_PRIM_TRIANGLE_FAN:
64 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
65 case PIPE_PRIM_QUADS:
66 return R300_VAP_VF_CNTL__PRIM_QUADS;
67 case PIPE_PRIM_QUAD_STRIP:
68 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
69 case PIPE_PRIM_POLYGON:
70 return R300_VAP_VF_CNTL__PRIM_POLYGON;
71 default:
72 return 0;
73 }
74 }
75
76 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
77 unsigned mode)
78 {
79 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
80 uint32_t color_control = rs->color_control;
81
82 /* By default (see r300_state.c:r300_create_rs_state) color_control is
83 * initialized to provoking the first vertex.
84 *
85 * Triangle fans must be reduced to the second vertex, not the first, in
86 * Gallium flatshade-first mode, as per the GL spec.
87 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
88 *
89 * Quads never provoke correctly in flatshade-first mode. The first
90 * vertex is never considered as provoking, so only the second, third,
91 * and fourth vertices can be selected, and both "third" and "last" modes
92 * select the fourth vertex. This is probably due to D3D lacking quads.
93 *
94 * Similarly, polygons reduce to the first, not the last, vertex, when in
95 * "last" mode, and all other modes start from the second vertex.
96 *
97 * ~ C.
98 */
99
100 if (rs->rs.flatshade_first) {
101 switch (mode) {
102 case PIPE_PRIM_TRIANGLE_FAN:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
104 break;
105 case PIPE_PRIM_QUADS:
106 case PIPE_PRIM_QUAD_STRIP:
107 case PIPE_PRIM_POLYGON:
108 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
109 break;
110 default:
111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
112 break;
113 }
114 } else {
115 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
116 }
117
118 return color_control;
119 }
120
121 /* Check if the requested number of dwords is available in the CS and
122 * if not, flush. Return TRUE if the flush occured. */
123 static boolean r300_reserve_cs_space(struct r300_context *r300,
124 unsigned dwords)
125 {
126 if (!r300->winsys->check_cs(r300->winsys, dwords)) {
127 r300->context.flush(&r300->context, 0, NULL);
128 return TRUE;
129 }
130 return FALSE;
131 }
132
133 static boolean immd_is_good_idea(struct r300_context *r300,
134 unsigned count)
135 {
136 return count <= 4;
137 }
138
139 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
140 unsigned mode,
141 unsigned start,
142 unsigned count)
143 {
144 struct pipe_vertex_element* velem;
145 struct pipe_vertex_buffer* vbuf;
146 unsigned vertex_element_count = r300->velems->count;
147 unsigned i, v, vbi, dw, elem_offset, dwords;
148
149 /* Size of the vertex, in dwords. */
150 unsigned vertex_size = 0;
151
152 /* Offsets of the attribute, in dwords, from the start of the vertex. */
153 unsigned offset[PIPE_MAX_ATTRIBS];
154
155 /* Size of the vertex element, in dwords. */
156 unsigned size[PIPE_MAX_ATTRIBS];
157
158 /* Stride to the same attrib in the next vertex in the vertex buffer,
159 * in dwords. */
160 unsigned stride[PIPE_MAX_ATTRIBS] = {0};
161
162 /* Mapped vertex buffers. */
163 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
164
165 CS_LOCALS(r300);
166
167 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
168 for (i = 0; i < vertex_element_count; i++) {
169 velem = &r300->velems->velem[i];
170 offset[i] = velem->src_offset / 4;
171 size[i] = util_format_get_blocksize(velem->src_format) / 4;
172 vertex_size += size[i];
173 vbi = velem->vertex_buffer_index;
174
175 /* Map the buffer. */
176 if (!map[vbi]) {
177 vbuf = &r300->vertex_buffer[vbi];
178 map[vbi] = (uint32_t*)pipe_buffer_map(r300->context.screen,
179 vbuf->buffer,
180 PIPE_BUFFER_USAGE_CPU_READ);
181 map[vbi] += vbuf->buffer_offset / 4;
182 stride[vbi] = vbuf->stride / 4;
183 }
184 }
185
186 dwords = 10 + count * vertex_size;
187
188 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
189 r300_emit_buffer_validate(r300, FALSE, NULL);
190 r300_emit_dirty_state(r300);
191
192 BEGIN_CS(dwords);
193 OUT_CS_REG(R300_GA_COLOR_CONTROL,
194 r300_provoking_vertex_fixes(r300, mode));
195 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
196 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
197 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
198 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
199 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
200 r300_translate_primitive(mode));
201
202 /* Emit vertices. */
203 for (v = 0; v < count; v++) {
204 for (i = 0; i < vertex_element_count; i++) {
205 velem = &r300->velems->velem[i];
206 vbi = velem->vertex_buffer_index;
207 elem_offset = offset[i] + stride[vbi] * (v + start);
208
209 for (dw = 0; dw < size[i]; dw++) {
210 OUT_CS(map[vbi][elem_offset + dw]);
211 }
212 }
213 }
214 END_CS;
215
216 /* Unmap buffers. */
217 for (i = 0; i < vertex_element_count; i++) {
218 vbi = r300->velems->velem[i].vertex_buffer_index;
219
220 if (map[vbi]) {
221 vbuf = &r300->vertex_buffer[vbi];
222 pipe_buffer_unmap(r300->context.screen, vbuf->buffer);
223 map[vbi] = NULL;
224 }
225 }
226 }
227
228 static void r300_emit_draw_arrays(struct r300_context *r300,
229 unsigned mode,
230 unsigned count)
231 {
232 #if defined(ENABLE_ALT_NUM_VERTS)
233 boolean alt_num_verts = count > 65535;
234 #else
235 boolean alt_num_verts = FALSE;
236 #endif
237 CS_LOCALS(r300);
238
239 if (alt_num_verts) {
240 assert(count < (1 << 24));
241 BEGIN_CS(10);
242 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
243 } else {
244 BEGIN_CS(8);
245 }
246 OUT_CS_REG(R300_GA_COLOR_CONTROL,
247 r300_provoking_vertex_fixes(r300, mode));
248 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
249 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
250 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
251 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
252 r300_translate_primitive(mode) |
253 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
254 END_CS;
255 }
256
257 static void r300_emit_draw_elements(struct r300_context *r300,
258 struct pipe_buffer* indexBuffer,
259 unsigned indexSize,
260 unsigned minIndex,
261 unsigned maxIndex,
262 unsigned mode,
263 unsigned start,
264 unsigned count)
265 {
266 uint32_t count_dwords;
267 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
268 #if defined(ENABLE_ALT_NUM_VERTS)
269 boolean alt_num_verts = count > 65535;
270 #else
271 boolean alt_num_verts = FALSE;
272 #endif
273 CS_LOCALS(r300);
274
275 assert((start * indexSize) % 4 == 0);
276 assert(count < (1 << 24));
277
278 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
279 count, minIndex, maxIndex);
280
281 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
282
283 if (alt_num_verts) {
284 BEGIN_CS(16);
285 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
286 } else {
287 BEGIN_CS(14);
288 }
289 OUT_CS_REG(R300_GA_COLOR_CONTROL,
290 r300_provoking_vertex_fixes(r300, mode));
291 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, minIndex);
292 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, maxIndex);
293 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
294 if (indexSize == 4) {
295 count_dwords = count;
296 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
297 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
298 r300_translate_primitive(mode) |
299 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
300 } else {
301 count_dwords = (count + 1) / 2;
302 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
303 r300_translate_primitive(mode) |
304 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
305 }
306
307 /* INDX_BUFFER is a truly special packet3.
308 * Unlike most other packet3, where the offset is after the count,
309 * the order is reversed, so the relocation ends up carrying the
310 * size of the indexbuf instead of the offset.
311 */
312 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
313 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
314 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
315 OUT_CS(offset_dwords << 2);
316 OUT_CS_RELOC(indexBuffer, count_dwords,
317 RADEON_GEM_DOMAIN_GTT, 0, 0);
318
319 END_CS;
320 }
321
322 static boolean r300_setup_vertex_buffers(struct r300_context *r300)
323 {
324 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
325 struct pipe_vertex_element *velem = r300->velems->velem;
326 struct pipe_buffer *pbuf;
327
328 validate:
329 for (int i = 0; i < r300->velems->count; i++) {
330 pbuf = vbuf[velem[i].vertex_buffer_index].buffer;
331
332 if (!r300->winsys->add_buffer(r300->winsys, pbuf,
333 RADEON_GEM_DOMAIN_GTT, 0)) {
334 r300->context.flush(&r300->context, 0, NULL);
335 goto validate;
336 }
337 }
338
339 if (!r300->winsys->validate(r300->winsys)) {
340 r300->context.flush(&r300->context, 0, NULL);
341 return r300->winsys->validate(r300->winsys);
342 }
343
344 return TRUE;
345 }
346
347 static void r300_shorten_ubyte_elts(struct r300_context* r300,
348 struct pipe_buffer** elts,
349 unsigned count)
350 {
351 struct pipe_screen* screen = r300->context.screen;
352 struct pipe_buffer* new_elts;
353 unsigned char *in_map;
354 unsigned short *out_map;
355 unsigned i;
356
357 new_elts = screen->buffer_create(screen, 32,
358 PIPE_BUFFER_USAGE_INDEX |
359 PIPE_BUFFER_USAGE_CPU_WRITE |
360 PIPE_BUFFER_USAGE_GPU_READ,
361 2 * count);
362
363 in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
364 out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
365
366 for (i = 0; i < count; i++) {
367 *out_map = (unsigned short)*in_map;
368 in_map++;
369 out_map++;
370 }
371
372 pipe_buffer_unmap(screen, *elts);
373 pipe_buffer_unmap(screen, new_elts);
374
375 *elts = new_elts;
376 }
377
378 /* This is the fast-path drawing & emission for HW TCL. */
379 void r300_draw_range_elements(struct pipe_context* pipe,
380 struct pipe_buffer* indexBuffer,
381 unsigned indexSize,
382 unsigned minIndex,
383 unsigned maxIndex,
384 unsigned mode,
385 unsigned start,
386 unsigned count)
387 {
388 struct r300_context* r300 = r300_context(pipe);
389 struct pipe_buffer* orgIndexBuffer = indexBuffer;
390 #if defined(ENABLE_ALT_NUM_VERTS)
391 boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 &&
392 count > 65536;
393 #else
394 boolean alt_num_verts = FALSE;
395 #endif
396 unsigned short_count;
397
398 if (!u_trim_pipe_prim(mode, &count)) {
399 return;
400 }
401
402 if (indexSize == 1) {
403 r300_shorten_ubyte_elts(r300, &indexBuffer, count);
404 indexSize = 2;
405 }
406
407 r300_update_derived_state(r300);
408
409 /* 128 dwords for emit_aos and emit_draw_elements */
410 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
411 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
412 r300_emit_dirty_state(r300);
413 r300_emit_aos(r300, 0);
414
415 if (alt_num_verts || count <= 65535) {
416 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
417 maxIndex, mode, start, count);
418 } else {
419 do {
420 short_count = MIN2(count, 65534);
421 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
422 maxIndex, mode, start, short_count);
423
424 start += short_count;
425 count -= short_count;
426
427 /* 16 spare dwords are enough for emit_draw_elements. */
428 if (count && r300_reserve_cs_space(r300, 16)) {
429 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
430 r300_emit_dirty_state(r300);
431 r300_emit_aos(r300, 0);
432 }
433 } while (count);
434 }
435
436 if (indexBuffer != orgIndexBuffer) {
437 pipe->screen->buffer_destroy(indexBuffer);
438 }
439 }
440
441 /* Simple helpers for context setup. Should probably be moved to util. */
442 void r300_draw_elements(struct pipe_context* pipe,
443 struct pipe_buffer* indexBuffer,
444 unsigned indexSize, unsigned mode,
445 unsigned start, unsigned count)
446 {
447 struct r300_context *r300 = r300_context(pipe);
448
449 pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0,
450 r300->vertex_buffer_max_index,
451 mode, start, count);
452 }
453
454 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
455 unsigned start, unsigned count)
456 {
457 struct r300_context* r300 = r300_context(pipe);
458 #if defined(ENABLE_ALT_NUM_VERTS)
459 boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 &&
460 count > 65536;
461 #else
462 boolean alt_num_verts = FALSE;
463 #endif
464 unsigned short_count;
465
466 if (!u_trim_pipe_prim(mode, &count)) {
467 return;
468 }
469
470 r300_update_derived_state(r300);
471
472 if (immd_is_good_idea(r300, count)) {
473 r300_emit_draw_arrays_immediate(r300, mode, start, count);
474 } else {
475 /* Make sure there are at least 128 spare dwords in the command buffer.
476 * (most of it being consumed by emit_aos) */
477 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
478 r300_emit_buffer_validate(r300, TRUE, NULL);
479 r300_emit_dirty_state(r300);
480
481 if (alt_num_verts || count <= 65535) {
482 r300_emit_aos(r300, start);
483 r300_emit_draw_arrays(r300, mode, count);
484 } else {
485 do {
486 short_count = MIN2(count, 65535);
487 r300_emit_aos(r300, start);
488 r300_emit_draw_arrays(r300, mode, short_count);
489
490 start += short_count;
491 count -= short_count;
492
493 /* Again, we emit both AOS and draw_arrays so there should be
494 * at least 128 spare dwords. */
495 if (count && r300_reserve_cs_space(r300, 128)) {
496 r300_emit_buffer_validate(r300, TRUE, NULL);
497 r300_emit_dirty_state(r300);
498 }
499 } while (count);
500 }
501 }
502 }
503
504 /****************************************************************************
505 * The rest of this file is for SW TCL rendering only. Please be polite and *
506 * keep these functions separated so that they are easier to locate. ~C. *
507 ***************************************************************************/
508
509 /* SW TCL arrays, using Draw. */
510 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
511 unsigned mode,
512 unsigned start,
513 unsigned count)
514 {
515 struct r300_context* r300 = r300_context(pipe);
516 int i;
517
518 if (!u_trim_pipe_prim(mode, &count)) {
519 return;
520 }
521
522 for (i = 0; i < r300->vertex_buffer_count; i++) {
523 void* buf = pipe_buffer_map(pipe->screen,
524 r300->vertex_buffer[i].buffer,
525 PIPE_BUFFER_USAGE_CPU_READ);
526 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
527 }
528
529 draw_set_mapped_element_buffer(r300->draw, 0, NULL);
530
531 draw_set_mapped_constant_buffer(r300->draw,
532 PIPE_SHADER_VERTEX,
533 0,
534 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
535 r300->shader_constants[PIPE_SHADER_VERTEX].count *
536 (sizeof(float) * 4));
537
538 draw_arrays(r300->draw, mode, start, count);
539
540 for (i = 0; i < r300->vertex_buffer_count; i++) {
541 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
542 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
543 }
544 }
545
546 /* SW TCL elements, using Draw. */
547 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
548 struct pipe_buffer* indexBuffer,
549 unsigned indexSize,
550 unsigned minIndex,
551 unsigned maxIndex,
552 unsigned mode,
553 unsigned start,
554 unsigned count)
555 {
556 struct r300_context* r300 = r300_context(pipe);
557 int i;
558 void* indices;
559
560 if (!u_trim_pipe_prim(mode, &count)) {
561 return;
562 }
563
564 for (i = 0; i < r300->vertex_buffer_count; i++) {
565 void* buf = pipe_buffer_map(pipe->screen,
566 r300->vertex_buffer[i].buffer,
567 PIPE_BUFFER_USAGE_CPU_READ);
568 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
569 }
570
571 indices = pipe_buffer_map(pipe->screen, indexBuffer,
572 PIPE_BUFFER_USAGE_CPU_READ);
573 draw_set_mapped_element_buffer_range(r300->draw, indexSize,
574 minIndex, maxIndex, indices);
575
576 draw_set_mapped_constant_buffer(r300->draw,
577 PIPE_SHADER_VERTEX,
578 0,
579 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
580 r300->shader_constants[PIPE_SHADER_VERTEX].count *
581 (sizeof(float) * 4));
582
583 draw_arrays(r300->draw, mode, start, count);
584
585 for (i = 0; i < r300->vertex_buffer_count; i++) {
586 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
587 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
588 }
589
590 pipe_buffer_unmap(pipe->screen, indexBuffer);
591 draw_set_mapped_element_buffer_range(r300->draw, 0, start,
592 start + count - 1, NULL);
593 }
594
595 /* Object for rendering using Draw. */
596 struct r300_render {
597 /* Parent class */
598 struct vbuf_render base;
599
600 /* Pipe context */
601 struct r300_context* r300;
602
603 /* Vertex information */
604 size_t vertex_size;
605 unsigned prim;
606 unsigned hwprim;
607
608 /* VBO */
609 struct pipe_buffer* vbo;
610 size_t vbo_size;
611 size_t vbo_offset;
612 size_t vbo_max_used;
613 void * vbo_ptr;
614 };
615
616 static INLINE struct r300_render*
617 r300_render(struct vbuf_render* render)
618 {
619 return (struct r300_render*)render;
620 }
621
622 static const struct vertex_info*
623 r300_render_get_vertex_info(struct vbuf_render* render)
624 {
625 struct r300_render* r300render = r300_render(render);
626 struct r300_context* r300 = r300render->r300;
627
628 r300_update_derived_state(r300);
629
630 return &r300->vertex_info;
631 }
632
633 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
634 ushort vertex_size,
635 ushort count)
636 {
637 struct r300_render* r300render = r300_render(render);
638 struct r300_context* r300 = r300render->r300;
639 struct pipe_screen* screen = r300->context.screen;
640 size_t size = (size_t)vertex_size * (size_t)count;
641
642 if (size + r300render->vbo_offset > r300render->vbo_size)
643 {
644 pipe_buffer_reference(&r300->vbo, NULL);
645 r300render->vbo = pipe_buffer_create(screen,
646 64,
647 PIPE_BUFFER_USAGE_VERTEX,
648 R300_MAX_VBO_SIZE);
649 r300render->vbo_offset = 0;
650 r300render->vbo_size = R300_MAX_VBO_SIZE;
651 }
652
653 r300render->vertex_size = vertex_size;
654 r300->vbo = r300render->vbo;
655 r300->vbo_offset = r300render->vbo_offset;
656
657 return (r300render->vbo) ? TRUE : FALSE;
658 }
659
660 static void* r300_render_map_vertices(struct vbuf_render* render)
661 {
662 struct r300_render* r300render = r300_render(render);
663 struct pipe_screen* screen = r300render->r300->context.screen;
664
665 r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo,
666 PIPE_BUFFER_USAGE_CPU_WRITE);
667
668 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
669 }
670
671 static void r300_render_unmap_vertices(struct vbuf_render* render,
672 ushort min,
673 ushort max)
674 {
675 struct r300_render* r300render = r300_render(render);
676 struct pipe_screen* screen = r300render->r300->context.screen;
677 CS_LOCALS(r300render->r300);
678 BEGIN_CS(2);
679 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
680 END_CS;
681
682 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
683 r300render->vertex_size * (max + 1));
684 pipe_buffer_unmap(screen, r300render->vbo);
685 }
686
687 static void r300_render_release_vertices(struct vbuf_render* render)
688 {
689 struct r300_render* r300render = r300_render(render);
690
691 r300render->vbo_offset += r300render->vbo_max_used;
692 r300render->vbo_max_used = 0;
693 }
694
695 static boolean r300_render_set_primitive(struct vbuf_render* render,
696 unsigned prim)
697 {
698 struct r300_render* r300render = r300_render(render);
699
700 r300render->prim = prim;
701 r300render->hwprim = r300_translate_primitive(prim);
702
703 return TRUE;
704 }
705
706 static void r300_render_draw_arrays(struct vbuf_render* render,
707 unsigned start,
708 unsigned count)
709 {
710 struct r300_render* r300render = r300_render(render);
711 struct r300_context* r300 = r300render->r300;
712
713 CS_LOCALS(r300);
714
715 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2);
716 r300_emit_buffer_validate(r300, FALSE, NULL);
717 r300_emit_dirty_state(r300);
718
719 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
720
721 BEGIN_CS(2);
722 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
723 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
724 r300render->hwprim);
725 END_CS;
726 }
727
728 static void r300_render_draw(struct vbuf_render* render,
729 const ushort* indices,
730 uint count)
731 {
732 struct r300_render* r300render = r300_render(render);
733 struct r300_context* r300 = r300render->r300;
734 int i;
735 unsigned dwords = 2 + (count+1)/2;
736
737 CS_LOCALS(r300);
738
739 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
740 r300_emit_buffer_validate(r300, FALSE, NULL);
741 r300_emit_dirty_state(r300);
742
743 BEGIN_CS(dwords);
744 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
745 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
746 r300render->hwprim);
747 for (i = 0; i < count-1; i += 2) {
748 OUT_CS(indices[i+1] << 16 | indices[i]);
749 }
750 if (count % 2) {
751 OUT_CS(indices[count-1]);
752 }
753 END_CS;
754 }
755
756 static void r300_render_destroy(struct vbuf_render* render)
757 {
758 FREE(render);
759 }
760
761 static struct vbuf_render* r300_render_create(struct r300_context* r300)
762 {
763 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
764
765 r300render->r300 = r300;
766
767 /* XXX find real numbers plz */
768 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
769 r300render->base.max_indices = 16 * 1024;
770
771 r300render->base.get_vertex_info = r300_render_get_vertex_info;
772 r300render->base.allocate_vertices = r300_render_allocate_vertices;
773 r300render->base.map_vertices = r300_render_map_vertices;
774 r300render->base.unmap_vertices = r300_render_unmap_vertices;
775 r300render->base.set_primitive = r300_render_set_primitive;
776 r300render->base.draw = r300_render_draw;
777 r300render->base.draw_arrays = r300_render_draw_arrays;
778 r300render->base.release_vertices = r300_render_release_vertices;
779 r300render->base.destroy = r300_render_destroy;
780
781 r300render->vbo = NULL;
782 r300render->vbo_size = 0;
783 r300render->vbo_offset = 0;
784
785 return &r300render->base;
786 }
787
788 struct draw_stage* r300_draw_stage(struct r300_context* r300)
789 {
790 struct vbuf_render* render;
791 struct draw_stage* stage;
792
793 render = r300_render_create(r300);
794
795 if (!render) {
796 return NULL;
797 }
798
799 stage = draw_vbuf_stage(r300->draw, render);
800
801 if (!stage) {
802 render->destroy(render);
803 return NULL;
804 }
805
806 draw_set_render(r300->draw, render);
807
808 return stage;
809 }