r300g: fix up buffer emission ordering.
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "pipe/p_inlines.h"
30
31 #include "util/u_memory.h"
32 #include "util/u_prim.h"
33
34 #include "r300_cs.h"
35 #include "r300_context.h"
36 #include "r300_emit.h"
37 #include "r300_reg.h"
38 #include "r300_render.h"
39 #include "r300_state_derived.h"
40
41 /* r300_render: Vertex and index buffer primitive emission. */
42 #define R300_MAX_VBO_SIZE (1024 * 1024)
43
44 uint32_t r300_translate_primitive(unsigned prim)
45 {
46 switch (prim) {
47 case PIPE_PRIM_POINTS:
48 return R300_VAP_VF_CNTL__PRIM_POINTS;
49 case PIPE_PRIM_LINES:
50 return R300_VAP_VF_CNTL__PRIM_LINES;
51 case PIPE_PRIM_LINE_LOOP:
52 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
53 case PIPE_PRIM_LINE_STRIP:
54 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
55 case PIPE_PRIM_TRIANGLES:
56 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
57 case PIPE_PRIM_TRIANGLE_STRIP:
58 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
59 case PIPE_PRIM_TRIANGLE_FAN:
60 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
61 case PIPE_PRIM_QUADS:
62 return R300_VAP_VF_CNTL__PRIM_QUADS;
63 case PIPE_PRIM_QUAD_STRIP:
64 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
65 case PIPE_PRIM_POLYGON:
66 return R300_VAP_VF_CNTL__PRIM_POLYGON;
67 default:
68 return 0;
69 }
70 }
71
72 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
73 unsigned mode)
74 {
75 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
76 uint32_t color_control = rs->color_control;
77
78 /* By default (see r300_state.c:r300_create_rs_state) color_control is
79 * initialized to provoking the first vertex.
80 *
81 * Triangle fans must be reduced to the second vertex, not the first, in
82 * Gallium flatshade-first mode, as per the GL spec.
83 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
84 *
85 * Quads never provoke correctly in flatshade-first mode. The first
86 * vertex is never considered as provoking, so only the second, third,
87 * and fourth vertices can be selected, and both "third" and "last" modes
88 * select the fourth vertex. This is probably due to D3D lacking quads.
89 *
90 * Similarly, polygons reduce to the first, not the last, vertex, when in
91 * "last" mode, and all other modes start from the second vertex.
92 *
93 * ~ C.
94 */
95
96 if (rs->rs.flatshade_first) {
97 switch (mode) {
98 case PIPE_PRIM_TRIANGLE_FAN:
99 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
100 break;
101 case PIPE_PRIM_QUADS:
102 case PIPE_PRIM_QUAD_STRIP:
103 case PIPE_PRIM_POLYGON:
104 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
105 break;
106 default:
107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
108 break;
109 }
110 } else {
111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
112 }
113
114 return color_control;
115 }
116
117 static void r300_emit_draw_immediate(struct r300_context *r300,
118 unsigned mode,
119 unsigned start,
120 unsigned count)
121 {
122 struct pipe_buffer* vbo = r300->vertex_buffer[0].buffer;
123 unsigned vertex_size = r300->vertex_buffer[0].stride / sizeof(float);
124 unsigned i;
125 uint32_t* map;
126 CS_LOCALS(r300);
127
128 map = (uint32_t*)pipe_buffer_map_range(r300->context.screen, vbo,
129 start * vertex_size, count * vertex_size,
130 PIPE_BUFFER_USAGE_CPU_READ);
131
132 BEGIN_CS(10 + count * vertex_size);
133 OUT_CS_REG(R300_GA_COLOR_CONTROL,
134 r300_provoking_vertex_fixes(r300, mode));
135 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
136 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
137 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
138 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
139 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
140 r300_translate_primitive(mode));
141 //debug_printf("r300: Immd %d verts, %d attrs\n", count, vertex_size);
142 for (i = 0; i < count * vertex_size; i++) {
143 if (i % vertex_size == 0) {
144 //debug_printf("r300: -- vert --\n");
145 }
146 //debug_printf("r300: 0x%08x\n", *map);
147 OUT_CS(*map);
148 map++;
149 }
150 END_CS;
151
152 pipe_buffer_unmap(r300->context.screen, vbo);
153 }
154
155 static void r300_emit_draw_arrays(struct r300_context *r300,
156 unsigned mode,
157 unsigned count)
158 {
159 CS_LOCALS(r300);
160
161 BEGIN_CS(8);
162 OUT_CS_REG(R300_GA_COLOR_CONTROL,
163 r300_provoking_vertex_fixes(r300, mode));
164 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
165 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
166 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
167 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
168 r300_translate_primitive(mode));
169 END_CS;
170 }
171
172 static void r300_emit_draw_elements(struct r300_context *r300,
173 struct pipe_buffer* indexBuffer,
174 unsigned indexSize,
175 unsigned minIndex,
176 unsigned maxIndex,
177 unsigned mode,
178 unsigned start,
179 unsigned count)
180 {
181 uint32_t count_dwords;
182 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
183 CS_LOCALS(r300);
184
185 /* XXX most of these are stupid */
186 assert(indexSize == 4 || indexSize == 2);
187 assert((start * indexSize) % 4 == 0);
188 assert(offset_dwords == 0);
189
190 BEGIN_CS(14);
191 OUT_CS_REG(R300_GA_COLOR_CONTROL,
192 r300_provoking_vertex_fixes(r300, mode));
193 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, minIndex);
194 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, maxIndex);
195 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
196 if (indexSize == 4) {
197 count_dwords = count + start;
198 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
199 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
200 r300_translate_primitive(mode));
201 } else {
202 count_dwords = (count + start + 1) / 2;
203 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
204 r300_translate_primitive(mode));
205 }
206
207 /* INDX_BUFFER is a truly special packet3.
208 * Unlike most other packet3, where the offset is after the count,
209 * the order is reversed, so the relocation ends up carrying the
210 * size of the indexbuf instead of the offset.
211 *
212 * XXX Fix offset
213 */
214 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
215 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
216 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
217 OUT_CS(offset_dwords);
218 OUT_CS_RELOC(indexBuffer, count_dwords,
219 RADEON_GEM_DOMAIN_GTT, 0, 0);
220
221 END_CS;
222 }
223
224
225 static boolean r300_setup_vertex_buffers(struct r300_context *r300)
226 {
227 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
228 struct pipe_vertex_element *velem = r300->vertex_element;
229
230 validate:
231 for (int i = 0; i < r300->vertex_element_count; i++) {
232 if (!r300->winsys->add_buffer(r300->winsys,
233 vbuf[velem[i].vertex_buffer_index].buffer,
234 RADEON_GEM_DOMAIN_GTT, 0)) {
235 r300->context.flush(&r300->context, 0, NULL);
236 goto validate;
237 }
238 }
239
240 if (!r300->winsys->validate(r300->winsys)) {
241 r300->context.flush(&r300->context, 0, NULL);
242 return r300->winsys->validate(r300->winsys);
243 }
244
245 return TRUE;
246 }
247
248 static void r300_shorten_ubyte_elts(struct r300_context* r300,
249 struct pipe_buffer** elts,
250 unsigned count)
251 {
252 struct pipe_screen* screen = r300->context.screen;
253 struct pipe_buffer* new_elts;
254 unsigned char *in_map;
255 unsigned short *out_map;
256 unsigned i;
257
258 new_elts = screen->buffer_create(screen, 32,
259 PIPE_BUFFER_USAGE_INDEX |
260 PIPE_BUFFER_USAGE_CPU_WRITE |
261 PIPE_BUFFER_USAGE_GPU_READ,
262 2 * count);
263
264 in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
265 out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
266
267 for (i = 0; i < count; i++) {
268 *out_map = (unsigned short)*in_map;
269 in_map++;
270 out_map++;
271 }
272
273 pipe_buffer_unmap(screen, *elts);
274 pipe_buffer_unmap(screen, new_elts);
275
276 *elts = new_elts;
277 }
278
279 /* This is the fast-path drawing & emission for HW TCL. */
280 void r300_draw_range_elements(struct pipe_context* pipe,
281 struct pipe_buffer* indexBuffer,
282 unsigned indexSize,
283 unsigned minIndex,
284 unsigned maxIndex,
285 unsigned mode,
286 unsigned start,
287 unsigned count)
288 {
289 struct r300_context* r300 = r300_context(pipe);
290 struct pipe_buffer* orgIndexBuffer = indexBuffer;
291
292 if (!u_trim_pipe_prim(mode, &count)) {
293 return;
294 }
295
296 if (count > 65535) {
297 /* XXX: use aux/indices functions to split this into smaller
298 * primitives.
299 */
300 return;
301 }
302
303 r300_update_derived_state(r300);
304
305 if (!r300_setup_vertex_buffers(r300)) {
306 return;
307 }
308
309 if (indexSize == 1) {
310 r300_shorten_ubyte_elts(r300, &indexBuffer, count);
311 indexSize = 2;
312 }
313
314 r300_emit_buffer_validate(r300->winsys);
315
316 if (!r300->winsys->add_buffer(r300->winsys, indexBuffer,
317 RADEON_GEM_DOMAIN_GTT, 0)) {
318 goto cleanup;
319 }
320
321 if (!r300->winsys->validate(r300->winsys)) {
322 goto cleanup;
323 }
324
325 r300_emit_dirty_state(r300);
326
327 r300_emit_aos(r300, 0);
328
329 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex, maxIndex,
330 mode, start, count);
331
332 cleanup:
333 if (indexBuffer != orgIndexBuffer) {
334 pipe->screen->buffer_destroy(indexBuffer);
335 }
336 }
337
338 /* Simple helpers for context setup. Should probably be moved to util. */
339 void r300_draw_elements(struct pipe_context* pipe,
340 struct pipe_buffer* indexBuffer,
341 unsigned indexSize, unsigned mode,
342 unsigned start, unsigned count)
343 {
344 pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0, ~0,
345 mode, start, count);
346 }
347
348 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
349 unsigned start, unsigned count)
350 {
351 struct r300_context* r300 = r300_context(pipe);
352
353 if (!u_trim_pipe_prim(mode, &count)) {
354 return;
355 }
356
357 if (count > 65535) {
358 /* XXX: driver needs to handle this -- use the functions in
359 * aux/indices to split this into several smaller primitives.
360 */
361 return;
362 }
363
364 r300_update_derived_state(r300);
365
366 r300_emit_buffer_validate(r300);
367
368 if (!r300_setup_vertex_buffers(r300)) {
369 return;
370 }
371
372 r300_emit_dirty_state(r300);
373
374 if (FALSE && count <= 4 && r300->vertex_buffer_count == 1) {
375 r300_emit_draw_immediate(r300, mode, start, count);
376 } else {
377 r300_emit_aos(r300, start);
378 r300_emit_draw_arrays(r300, mode, count);
379 }
380 }
381
382 /****************************************************************************
383 * The rest of this file is for SW TCL rendering only. Please be polite and *
384 * keep these functions separated so that they are easier to locate. ~C. *
385 ***************************************************************************/
386
387 /* SW TCL arrays, using Draw. */
388 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
389 unsigned mode,
390 unsigned start,
391 unsigned count)
392 {
393 struct r300_context* r300 = r300_context(pipe);
394 int i;
395
396 if (!u_trim_pipe_prim(mode, &count)) {
397 return;
398 }
399
400 for (i = 0; i < r300->vertex_buffer_count; i++) {
401 void* buf = pipe_buffer_map(pipe->screen,
402 r300->vertex_buffer[i].buffer,
403 PIPE_BUFFER_USAGE_CPU_READ);
404 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
405 }
406
407 draw_set_mapped_element_buffer(r300->draw, 0, NULL);
408
409 draw_set_mapped_constant_buffer(r300->draw,
410 PIPE_SHADER_VERTEX,
411 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
412 r300->shader_constants[PIPE_SHADER_VERTEX].count *
413 (sizeof(float) * 4));
414
415 draw_arrays(r300->draw, mode, start, count);
416
417 for (i = 0; i < r300->vertex_buffer_count; i++) {
418 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
419 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
420 }
421 }
422
423 /* SW TCL elements, using Draw. */
424 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
425 struct pipe_buffer* indexBuffer,
426 unsigned indexSize,
427 unsigned minIndex,
428 unsigned maxIndex,
429 unsigned mode,
430 unsigned start,
431 unsigned count)
432 {
433 struct r300_context* r300 = r300_context(pipe);
434 int i;
435 void* indices;
436
437 if (!u_trim_pipe_prim(mode, &count)) {
438 return;
439 }
440
441 for (i = 0; i < r300->vertex_buffer_count; i++) {
442 void* buf = pipe_buffer_map(pipe->screen,
443 r300->vertex_buffer[i].buffer,
444 PIPE_BUFFER_USAGE_CPU_READ);
445 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
446 }
447
448 indices = pipe_buffer_map(pipe->screen, indexBuffer,
449 PIPE_BUFFER_USAGE_CPU_READ);
450 draw_set_mapped_element_buffer_range(r300->draw, indexSize,
451 minIndex, maxIndex, indices);
452
453 draw_set_mapped_constant_buffer(r300->draw,
454 PIPE_SHADER_VERTEX,
455 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
456 r300->shader_constants[PIPE_SHADER_VERTEX].count *
457 (sizeof(float) * 4));
458
459 draw_arrays(r300->draw, mode, start, count);
460
461 for (i = 0; i < r300->vertex_buffer_count; i++) {
462 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
463 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
464 }
465
466 pipe_buffer_unmap(pipe->screen, indexBuffer);
467 draw_set_mapped_element_buffer_range(r300->draw, 0, start,
468 start + count - 1, NULL);
469 }
470
471 /* Object for rendering using Draw. */
472 struct r300_render {
473 /* Parent class */
474 struct vbuf_render base;
475
476 /* Pipe context */
477 struct r300_context* r300;
478
479 /* Vertex information */
480 size_t vertex_size;
481 unsigned prim;
482 unsigned hwprim;
483
484 /* VBO */
485 struct pipe_buffer* vbo;
486 size_t vbo_size;
487 size_t vbo_offset;
488 size_t vbo_max_used;
489 void * vbo_ptr;
490 };
491
492 static INLINE struct r300_render*
493 r300_render(struct vbuf_render* render)
494 {
495 return (struct r300_render*)render;
496 }
497
498 static const struct vertex_info*
499 r300_render_get_vertex_info(struct vbuf_render* render)
500 {
501 struct r300_render* r300render = r300_render(render);
502 struct r300_context* r300 = r300render->r300;
503
504 r300_update_derived_state(r300);
505
506 return &r300->vertex_info->vinfo;
507 }
508
509 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
510 ushort vertex_size,
511 ushort count)
512 {
513 struct r300_render* r300render = r300_render(render);
514 struct r300_context* r300 = r300render->r300;
515 struct pipe_screen* screen = r300->context.screen;
516 size_t size = (size_t)vertex_size * (size_t)count;
517
518 if (size + r300render->vbo_offset > r300render->vbo_size)
519 {
520 pipe_buffer_reference(&r300->vbo, NULL);
521 r300render->vbo = pipe_buffer_create(screen,
522 64,
523 PIPE_BUFFER_USAGE_VERTEX,
524 R300_MAX_VBO_SIZE);
525 r300render->vbo_offset = 0;
526 r300render->vbo_size = R300_MAX_VBO_SIZE;
527 }
528
529 r300render->vertex_size = vertex_size;
530 r300->vbo = r300render->vbo;
531 r300->vbo_offset = r300render->vbo_offset;
532
533 return (r300render->vbo) ? TRUE : FALSE;
534 }
535
536 static void* r300_render_map_vertices(struct vbuf_render* render)
537 {
538 struct r300_render* r300render = r300_render(render);
539 struct pipe_screen* screen = r300render->r300->context.screen;
540
541 r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo,
542 PIPE_BUFFER_USAGE_CPU_WRITE);
543
544 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
545 }
546
547 static void r300_render_unmap_vertices(struct vbuf_render* render,
548 ushort min,
549 ushort max)
550 {
551 struct r300_render* r300render = r300_render(render);
552 struct pipe_screen* screen = r300render->r300->context.screen;
553 CS_LOCALS(r300render->r300);
554 BEGIN_CS(2);
555 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
556 END_CS;
557
558 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
559 r300render->vertex_size * (max + 1));
560 pipe_buffer_unmap(screen, r300render->vbo);
561 }
562
563 static void r300_render_release_vertices(struct vbuf_render* render)
564 {
565 struct r300_render* r300render = r300_render(render);
566
567 r300render->vbo_offset += r300render->vbo_max_used;
568 r300render->vbo_max_used = 0;
569 }
570
571 static boolean r300_render_set_primitive(struct vbuf_render* render,
572 unsigned prim)
573 {
574 struct r300_render* r300render = r300_render(render);
575
576 r300render->prim = prim;
577 r300render->hwprim = r300_translate_primitive(prim);
578
579 return TRUE;
580 }
581
582 static void r300_render_draw_arrays(struct vbuf_render* render,
583 unsigned start,
584 unsigned count)
585 {
586 struct r300_render* r300render = r300_render(render);
587 struct r300_context* r300 = r300render->r300;
588
589 CS_LOCALS(r300);
590
591 r300_emit_dirty_state(r300);
592
593 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
594
595 BEGIN_CS(2);
596 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
597 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
598 r300render->hwprim);
599 END_CS;
600 }
601
602 static void r300_render_draw(struct vbuf_render* render,
603 const ushort* indices,
604 uint count)
605 {
606 struct r300_render* r300render = r300_render(render);
607 struct r300_context* r300 = r300render->r300;
608 int i;
609
610 CS_LOCALS(r300);
611
612 r300_emit_dirty_state(r300);
613
614 BEGIN_CS(2 + (count+1)/2);
615 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
616 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
617 r300render->hwprim);
618 for (i = 0; i < count-1; i += 2) {
619 OUT_CS(indices[i+1] << 16 | indices[i]);
620 }
621 if (count % 2) {
622 OUT_CS(indices[count-1]);
623 }
624 END_CS;
625 }
626
627 static void r300_render_destroy(struct vbuf_render* render)
628 {
629 FREE(render);
630 }
631
632 static struct vbuf_render* r300_render_create(struct r300_context* r300)
633 {
634 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
635
636 r300render->r300 = r300;
637
638 /* XXX find real numbers plz */
639 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
640 r300render->base.max_indices = 16 * 1024;
641
642 r300render->base.get_vertex_info = r300_render_get_vertex_info;
643 r300render->base.allocate_vertices = r300_render_allocate_vertices;
644 r300render->base.map_vertices = r300_render_map_vertices;
645 r300render->base.unmap_vertices = r300_render_unmap_vertices;
646 r300render->base.set_primitive = r300_render_set_primitive;
647 r300render->base.draw = r300_render_draw;
648 r300render->base.draw_arrays = r300_render_draw_arrays;
649 r300render->base.release_vertices = r300_render_release_vertices;
650 r300render->base.destroy = r300_render_destroy;
651
652 r300render->vbo = NULL;
653 r300render->vbo_size = 0;
654 r300render->vbo_offset = 0;
655
656 return &r300render->base;
657 }
658
659 struct draw_stage* r300_draw_stage(struct r300_context* r300)
660 {
661 struct vbuf_render* render;
662 struct draw_stage* stage;
663
664 render = r300_render_create(r300);
665
666 if (!render) {
667 return NULL;
668 }
669
670 stage = draw_vbuf_stage(r300->draw, render);
671
672 if (!stage) {
673 render->destroy(render);
674 return NULL;
675 }
676
677 draw_set_render(r300->draw, render);
678
679 return stage;
680 }