u_vbuf_mgr: make u_vbuf_mgr_draw_begin return flags in a bitmask
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_render: Vertex and index buffer primitive emission. Contains both
25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
26
27 #include "draw/draw_context.h"
28 #include "draw/draw_vbuf.h"
29
30 #include "util/u_inlines.h"
31
32 #include "util/u_format.h"
33 #include "util/u_memory.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36
37 #include "r300_cs.h"
38 #include "r300_context.h"
39 #include "r300_screen_buffer.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42
43 #include <limits.h>
44
45 #define IMMD_DWORDS 32
46
47 static uint32_t r300_translate_primitive(unsigned prim)
48 {
49 static const int prim_conv[] = {
50 R300_VAP_VF_CNTL__PRIM_POINTS,
51 R300_VAP_VF_CNTL__PRIM_LINES,
52 R300_VAP_VF_CNTL__PRIM_LINE_LOOP,
53 R300_VAP_VF_CNTL__PRIM_LINE_STRIP,
54 R300_VAP_VF_CNTL__PRIM_TRIANGLES,
55 R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP,
56 R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN,
57 R300_VAP_VF_CNTL__PRIM_QUADS,
58 R300_VAP_VF_CNTL__PRIM_QUAD_STRIP,
59 R300_VAP_VF_CNTL__PRIM_POLYGON,
60 -1,
61 -1,
62 -1,
63 -1
64 };
65 unsigned hwprim = prim_conv[prim];
66
67 assert(hwprim != -1);
68 return hwprim;
69 }
70
71 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
72 unsigned mode)
73 {
74 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
75 uint32_t color_control = rs->color_control;
76
77 /* By default (see r300_state.c:r300_create_rs_state) color_control is
78 * initialized to provoking the first vertex.
79 *
80 * Triangle fans must be reduced to the second vertex, not the first, in
81 * Gallium flatshade-first mode, as per the GL spec.
82 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
83 *
84 * Quads never provoke correctly in flatshade-first mode. The first
85 * vertex is never considered as provoking, so only the second, third,
86 * and fourth vertices can be selected, and both "third" and "last" modes
87 * select the fourth vertex. This is probably due to D3D lacking quads.
88 *
89 * Similarly, polygons reduce to the first, not the last, vertex, when in
90 * "last" mode, and all other modes start from the second vertex.
91 *
92 * ~ C.
93 */
94
95 if (rs->rs.flatshade_first) {
96 switch (mode) {
97 case PIPE_PRIM_TRIANGLE_FAN:
98 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
99 break;
100 case PIPE_PRIM_QUADS:
101 case PIPE_PRIM_QUAD_STRIP:
102 case PIPE_PRIM_POLYGON:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
104 break;
105 default:
106 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
107 break;
108 }
109 } else {
110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
111 }
112
113 return color_control;
114 }
115
116 void r500_emit_index_bias(struct r300_context *r300, int index_bias)
117 {
118 CS_LOCALS(r300);
119
120 BEGIN_CS(2);
121 OUT_CS_REG(R500_VAP_INDEX_OFFSET,
122 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));
123 END_CS;
124 }
125
126 static void r300_emit_draw_init(struct r300_context *r300, unsigned mode,
127 unsigned min_index, unsigned max_index)
128 {
129 CS_LOCALS(r300);
130
131 BEGIN_CS(5);
132 OUT_CS_REG(R300_GA_COLOR_CONTROL,
133 r300_provoking_vertex_fixes(r300, mode));
134 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
135 OUT_CS(max_index);
136 OUT_CS(min_index);
137 END_CS;
138 }
139
140 /* This function splits the index bias value into two parts:
141 * - buffer_offset: the value that can be safely added to buffer offsets
142 * in r300_emit_vertex_arrays (it must yield a positive offset when added to
143 * a vertex buffer offset)
144 * - index_offset: the value that must be manually subtracted from indices
145 * in an index buffer to achieve negative offsets. */
146 static void r300_split_index_bias(struct r300_context *r300, int index_bias,
147 int *buffer_offset, int *index_offset)
148 {
149 struct pipe_vertex_buffer *vb, *vbufs = r300->vbuf_mgr->vertex_buffer;
150 struct pipe_vertex_element *velem = r300->velems->velem;
151 unsigned i, size;
152 int max_neg_bias;
153
154 if (index_bias < 0) {
155 /* See how large index bias we may subtract. We must be careful
156 * here because negative buffer offsets are not allowed
157 * by the DRM API. */
158 max_neg_bias = INT_MAX;
159 for (i = 0; i < r300->velems->count; i++) {
160 vb = &vbufs[velem[i].vertex_buffer_index];
161 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride;
162 max_neg_bias = MIN2(max_neg_bias, size);
163 }
164
165 /* Now set the minimum allowed value. */
166 *buffer_offset = MAX2(-max_neg_bias, index_bias);
167 } else {
168 /* A positive index bias is OK. */
169 *buffer_offset = index_bias;
170 }
171
172 *index_offset = index_bias - *buffer_offset;
173 }
174
175 enum r300_prepare_flags {
176 PREP_EMIT_STATES = (1 << 0), /* call emit_dirty_state and friends? */
177 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */
178 PREP_EMIT_VARRAYS = (1 << 2), /* call emit_vertex_arrays? */
179 PREP_EMIT_VARRAYS_SWTCL = (1 << 3), /* call emit_vertex_arrays_swtcl? */
180 PREP_INDEXED = (1 << 4) /* is this draw_elements? */
181 };
182
183 /**
184 * Check if the requested number of dwords is available in the CS and
185 * if not, flush.
186 * \param r300 The context.
187 * \param flags See r300_prepare_flags.
188 * \param cs_dwords The number of dwords to reserve in CS.
189 * \return TRUE if the CS was flushed
190 */
191 static boolean r300_reserve_cs_dwords(struct r300_context *r300,
192 enum r300_prepare_flags flags,
193 unsigned cs_dwords)
194 {
195 boolean flushed = FALSE;
196 boolean emit_states = flags & PREP_EMIT_STATES;
197 boolean emit_vertex_arrays = flags & PREP_EMIT_VARRAYS;
198 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_VARRAYS_SWTCL;
199
200 /* Add dirty state, index offset, and AOS. */
201 if (emit_states)
202 cs_dwords += r300_get_num_dirty_dwords(r300);
203
204 if (r300->screen->caps.is_r500)
205 cs_dwords += 2; /* emit_index_offset */
206
207 if (emit_vertex_arrays)
208 cs_dwords += 55; /* emit_vertex_arrays */
209
210 if (emit_vertex_arrays_swtcl)
211 cs_dwords += 7; /* emit_vertex_arrays_swtcl */
212
213 cs_dwords += r300_get_num_cs_end_dwords(r300);
214
215 /* Reserve requested CS space. */
216 if (cs_dwords > (RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw)) {
217 r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL);
218 flushed = TRUE;
219 }
220
221 return flushed;
222 }
223
224 /**
225 * Validate buffers and emit dirty state.
226 * \param r300 The context.
227 * \param flags See r300_prepare_flags.
228 * \param index_buffer The index buffer to validate. The parameter may be NULL.
229 * \param buffer_offset The offset passed to emit_vertex_arrays.
230 * \param index_bias The index bias to emit.
231 * \param instance_id Index of instance to render
232 * \return TRUE if rendering should be skipped
233 */
234 static boolean r300_emit_states(struct r300_context *r300,
235 enum r300_prepare_flags flags,
236 struct pipe_resource *index_buffer,
237 int buffer_offset,
238 int index_bias, int instance_id)
239 {
240 boolean emit_states = flags & PREP_EMIT_STATES;
241 boolean emit_vertex_arrays = flags & PREP_EMIT_VARRAYS;
242 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_VARRAYS_SWTCL;
243 boolean indexed = flags & PREP_INDEXED;
244 boolean validate_vbos = flags & PREP_VALIDATE_VBOS;
245
246 /* Validate buffers and emit dirty state if needed. */
247 if (emit_states || (emit_vertex_arrays && validate_vbos)) {
248 if (!r300_emit_buffer_validate(r300, validate_vbos,
249 index_buffer)) {
250 fprintf(stderr, "r300: CS space validation failed. "
251 "(not enough memory?) Skipping rendering.\n");
252 return FALSE;
253 }
254 }
255
256 if (emit_states)
257 r300_emit_dirty_state(r300);
258
259 if (r300->screen->caps.is_r500) {
260 if (r300->screen->caps.has_tcl)
261 r500_emit_index_bias(r300, index_bias);
262 else
263 r500_emit_index_bias(r300, 0);
264 }
265
266 if (emit_vertex_arrays &&
267 (r300->vertex_arrays_dirty ||
268 r300->vertex_arrays_indexed != indexed ||
269 r300->vertex_arrays_offset != buffer_offset ||
270 r300->vertex_arrays_instance_id != instance_id)) {
271 r300_emit_vertex_arrays(r300, buffer_offset, indexed, instance_id);
272
273 r300->vertex_arrays_dirty = FALSE;
274 r300->vertex_arrays_indexed = indexed;
275 r300->vertex_arrays_offset = buffer_offset;
276 r300->vertex_arrays_instance_id = instance_id;
277 }
278
279 if (emit_vertex_arrays_swtcl)
280 r300_emit_vertex_arrays_swtcl(r300, indexed);
281
282 return TRUE;
283 }
284
285 /**
286 * Check if the requested number of dwords is available in the CS and
287 * if not, flush. Then validate buffers and emit dirty state.
288 * \param r300 The context.
289 * \param flags See r300_prepare_flags.
290 * \param index_buffer The index buffer to validate. The parameter may be NULL.
291 * \param cs_dwords The number of dwords to reserve in CS.
292 * \param buffer_offset The offset passed to emit_vertex_arrays.
293 * \param index_bias The index bias to emit.
294 * \param instance_id The instance to render.
295 * \return TRUE if rendering should be skipped
296 */
297 static boolean r300_prepare_for_rendering(struct r300_context *r300,
298 enum r300_prepare_flags flags,
299 struct pipe_resource *index_buffer,
300 unsigned cs_dwords,
301 int buffer_offset,
302 int index_bias,
303 int instance_id)
304 {
305 /* Make sure there is enough space in the command stream and emit states. */
306 if (r300_reserve_cs_dwords(r300, flags, cs_dwords))
307 flags |= PREP_EMIT_STATES;
308
309 return r300_emit_states(r300, flags, index_buffer, buffer_offset,
310 index_bias, instance_id);
311 }
312
313 static boolean immd_is_good_idea(struct r300_context *r300,
314 unsigned count)
315 {
316 struct pipe_vertex_element* velem;
317 struct pipe_resource *buf;
318 boolean checked[PIPE_MAX_ATTRIBS] = {0};
319 unsigned vertex_element_count = r300->velems->count;
320 unsigned i, vbi;
321
322 if (DBG_ON(r300, DBG_NO_IMMD)) {
323 return FALSE;
324 }
325
326 if (r300->draw) {
327 return FALSE;
328 }
329
330 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) {
331 return FALSE;
332 }
333
334 /* We shouldn't map buffers referenced by CS, busy buffers,
335 * and ones placed in VRAM. */
336 for (i = 0; i < vertex_element_count; i++) {
337 velem = &r300->velems->velem[i];
338 vbi = velem->vertex_buffer_index;
339
340 if (!checked[vbi]) {
341 buf = r300->vbuf_mgr->real_vertex_buffer[vbi];
342
343 if ((r300_resource(buf)->domain != RADEON_DOMAIN_GTT)) {
344 return FALSE;
345 }
346
347 checked[vbi] = TRUE;
348 }
349 }
350 return TRUE;
351 }
352
353 /*****************************************************************************
354 * The HWTCL draw functions. *
355 ****************************************************************************/
356
357 static void r300_draw_arrays_immediate(struct r300_context *r300,
358 const struct pipe_draw_info *info)
359 {
360 struct pipe_vertex_element* velem;
361 struct pipe_vertex_buffer* vbuf;
362 unsigned vertex_element_count = r300->velems->count;
363 unsigned i, v, vbi;
364
365 /* Size of the vertex, in dwords. */
366 unsigned vertex_size = r300->velems->vertex_size_dwords;
367
368 /* The number of dwords for this draw operation. */
369 unsigned dwords = 4 + info->count * vertex_size;
370
371 /* Size of the vertex element, in dwords. */
372 unsigned size[PIPE_MAX_ATTRIBS];
373
374 /* Stride to the same attrib in the next vertex in the vertex buffer,
375 * in dwords. */
376 unsigned stride[PIPE_MAX_ATTRIBS];
377
378 /* Mapped vertex buffers. */
379 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
380 uint32_t* mapelem[PIPE_MAX_ATTRIBS];
381
382 CS_LOCALS(r300);
383
384 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1))
385 return;
386
387 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
388 for (i = 0; i < vertex_element_count; i++) {
389 velem = &r300->velems->velem[i];
390 size[i] = r300->velems->format_size[i] / 4;
391 vbi = velem->vertex_buffer_index;
392 vbuf = &r300->vbuf_mgr->vertex_buffer[vbi];
393 stride[i] = vbuf->stride / 4;
394
395 /* Map the buffer. */
396 if (!map[vbi]) {
397 map[vbi] = (uint32_t*)r300->rws->buffer_map(
398 r300_resource(r300->vbuf_mgr->real_vertex_buffer[vbi])->buf,
399 r300->cs, PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED);
400 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * info->start;
401 }
402 mapelem[i] = map[vbi] + (velem->src_offset / 4);
403 }
404
405 r300_emit_draw_init(r300, info->mode, 0, info->count-1);
406
407 BEGIN_CS(dwords);
408 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
409 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, info->count * vertex_size);
410 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (info->count << 16) |
411 r300_translate_primitive(info->mode));
412
413 /* Emit vertices. */
414 for (v = 0; v < info->count; v++) {
415 for (i = 0; i < vertex_element_count; i++) {
416 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]);
417 }
418 }
419 END_CS;
420
421 /* Unmap buffers. */
422 for (i = 0; i < vertex_element_count; i++) {
423 vbi = r300->velems->velem[i].vertex_buffer_index;
424
425 if (map[vbi]) {
426 r300->rws->buffer_unmap(r300_resource(r300->vbuf_mgr->real_vertex_buffer[vbi])->buf);
427 map[vbi] = NULL;
428 }
429 }
430 }
431
432 static void r300_emit_draw_arrays(struct r300_context *r300,
433 unsigned mode,
434 unsigned count)
435 {
436 boolean alt_num_verts = count > 65535;
437 CS_LOCALS(r300);
438
439 if (count >= (1 << 24)) {
440 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
441 "refusing to render.\n", count);
442 return;
443 }
444
445 r300_emit_draw_init(r300, mode, 0, count-1);
446
447 BEGIN_CS(2 + (alt_num_verts ? 2 : 0));
448 if (alt_num_verts) {
449 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
450 }
451 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
452 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
453 r300_translate_primitive(mode) |
454 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
455 END_CS;
456 }
457
458 static void r300_emit_draw_elements(struct r300_context *r300,
459 struct pipe_resource* indexBuffer,
460 unsigned indexSize,
461 unsigned min_index,
462 unsigned max_index,
463 unsigned mode,
464 unsigned start,
465 unsigned count,
466 uint16_t *imm_indices3)
467 {
468 uint32_t count_dwords, offset_dwords;
469 boolean alt_num_verts = count > 65535;
470 CS_LOCALS(r300);
471
472 if (count >= (1 << 24) || max_index >= (1 << 24)) {
473 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
474 "refusing to render (max_index: %i).\n", count, max_index);
475 return;
476 }
477
478 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
479 count, min_index, max_index);
480
481 r300_emit_draw_init(r300, mode, min_index, max_index);
482
483 /* If start is odd, render the first triangle with indices embedded
484 * in the command stream. This will increase start by 3 and make it
485 * even. We can then proceed without a fallback. */
486 if (indexSize == 2 && (start & 1) &&
487 mode == PIPE_PRIM_TRIANGLES) {
488 BEGIN_CS(4);
489 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 2);
490 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (3 << 16) |
491 R300_VAP_VF_CNTL__PRIM_TRIANGLES);
492 OUT_CS(imm_indices3[1] << 16 | imm_indices3[0]);
493 OUT_CS(imm_indices3[2]);
494 END_CS;
495
496 start += 3;
497 count -= 3;
498 if (!count)
499 return;
500 }
501
502 offset_dwords = indexSize * start / sizeof(uint32_t);
503
504 BEGIN_CS(8 + (alt_num_verts ? 2 : 0));
505 if (alt_num_verts) {
506 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
507 }
508 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
509 if (indexSize == 4) {
510 count_dwords = count;
511 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
512 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
513 r300_translate_primitive(mode) |
514 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
515 } else {
516 count_dwords = (count + 1) / 2;
517 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
518 r300_translate_primitive(mode) |
519 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
520 }
521
522 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
523 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
524 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
525 OUT_CS(offset_dwords << 2);
526 OUT_CS(count_dwords);
527 OUT_CS_RELOC(r300_resource(indexBuffer));
528 END_CS;
529 }
530
531 static void r300_draw_elements_immediate(struct r300_context *r300,
532 const struct pipe_draw_info *info)
533 {
534 uint8_t *ptr1;
535 uint16_t *ptr2;
536 uint32_t *ptr4;
537 unsigned index_size = r300->index_buffer.index_size;
538 unsigned i, count_dwords = index_size == 4 ? info->count :
539 (info->count + 1) / 2;
540 CS_LOCALS(r300);
541
542 /* 19 dwords for r300_draw_elements_immediate. Give up if the function fails. */
543 if (!r300_prepare_for_rendering(r300,
544 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS |
545 PREP_INDEXED, NULL, 2+count_dwords, 0, info->index_bias, -1))
546 return;
547
548 r300_emit_draw_init(r300, info->mode, info->min_index, info->max_index);
549
550 BEGIN_CS(2 + count_dwords);
551 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, count_dwords);
552
553 switch (index_size) {
554 case 1:
555 ptr1 = r300_resource(r300->index_buffer.buffer)->b.user_ptr;
556 ptr1 += info->start;
557
558 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
559 r300_translate_primitive(info->mode));
560
561 if (info->index_bias && !r300->screen->caps.is_r500) {
562 for (i = 0; i < info->count-1; i += 2)
563 OUT_CS(((ptr1[i+1] + info->index_bias) << 16) |
564 (ptr1[i] + info->index_bias));
565
566 if (info->count & 1)
567 OUT_CS(ptr1[i] + info->index_bias);
568 } else {
569 for (i = 0; i < info->count-1; i += 2)
570 OUT_CS(((ptr1[i+1]) << 16) |
571 (ptr1[i] ));
572
573 if (info->count & 1)
574 OUT_CS(ptr1[i]);
575 }
576 break;
577
578 case 2:
579 ptr2 = (uint16_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr;
580 ptr2 += info->start;
581
582 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
583 r300_translate_primitive(info->mode));
584
585 if (info->index_bias && !r300->screen->caps.is_r500) {
586 for (i = 0; i < info->count-1; i += 2)
587 OUT_CS(((ptr2[i+1] + info->index_bias) << 16) |
588 (ptr2[i] + info->index_bias));
589
590 if (info->count & 1)
591 OUT_CS(ptr2[i] + info->index_bias);
592 } else {
593 OUT_CS_TABLE(ptr2, count_dwords);
594 }
595 break;
596
597 case 4:
598 ptr4 = (uint32_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr;
599 ptr4 += info->start;
600
601 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
602 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
603 r300_translate_primitive(info->mode));
604
605 if (info->index_bias && !r300->screen->caps.is_r500) {
606 for (i = 0; i < info->count; i++)
607 OUT_CS(ptr4[i] + info->index_bias);
608 } else {
609 OUT_CS_TABLE(ptr4, count_dwords);
610 }
611 break;
612 }
613 END_CS;
614 }
615
616 static void r300_draw_elements(struct r300_context *r300,
617 const struct pipe_draw_info *info,
618 int instance_id)
619 {
620 struct pipe_resource *indexBuffer = r300->index_buffer.buffer;
621 unsigned indexSize = r300->index_buffer.index_size;
622 struct pipe_resource* orgIndexBuffer = indexBuffer;
623 unsigned start = info->start;
624 unsigned count = info->count;
625 boolean alt_num_verts = r300->screen->caps.is_r500 &&
626 count > 65536;
627 unsigned short_count;
628 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */
629 uint16_t indices3[3];
630
631 if (info->index_bias && !r300->screen->caps.is_r500) {
632 r300_split_index_bias(r300, info->index_bias, &buffer_offset, &index_offset);
633 }
634
635 r300_translate_index_buffer(r300, &indexBuffer, &indexSize, index_offset,
636 &start, count);
637
638 /* Fallback for misaligned ushort indices. */
639 if (indexSize == 2 && (start & 1) &&
640 !r300_resource(indexBuffer)->b.user_ptr) {
641 /* If we got here, then orgIndexBuffer == indexBuffer. */
642 uint16_t *ptr = r300->rws->buffer_map(r300_resource(orgIndexBuffer)->buf,
643 r300->cs,
644 PIPE_TRANSFER_READ |
645 PIPE_TRANSFER_UNSYNCHRONIZED);
646
647 if (info->mode == PIPE_PRIM_TRIANGLES) {
648 memcpy(indices3, ptr + start, 6);
649 } else {
650 /* Copy the mapped index buffer directly to the upload buffer.
651 * The start index will be aligned simply from the fact that
652 * every sub-buffer in the upload buffer is aligned. */
653 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start,
654 count, (uint8_t*)ptr);
655 }
656 r300->rws->buffer_unmap(r300_resource(orgIndexBuffer)->buf);
657 } else {
658 if (r300_resource(indexBuffer)->b.user_ptr)
659 r300_upload_index_buffer(r300, &indexBuffer, indexSize,
660 &start, count,
661 r300_resource(indexBuffer)->b.user_ptr);
662 }
663
664 /* 19 dwords for emit_draw_elements. Give up if the function fails. */
665 if (!r300_prepare_for_rendering(r300,
666 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS |
667 PREP_INDEXED, indexBuffer, 19, buffer_offset, info->index_bias,
668 instance_id))
669 goto done;
670
671 if (alt_num_verts || count <= 65535) {
672 r300_emit_draw_elements(r300, indexBuffer, indexSize, info->min_index,
673 info->max_index, info->mode, start, count,
674 indices3);
675 } else {
676 do {
677 /* The maximum must be divisible by 4 and 3,
678 * so that quad and triangle lists are split correctly.
679 *
680 * Strips, loops, and fans won't work. */
681 short_count = MIN2(count, 65532);
682
683 r300_emit_draw_elements(r300, indexBuffer, indexSize,
684 info->min_index, info->max_index,
685 info->mode, start, short_count, indices3);
686
687 start += short_count;
688 count -= short_count;
689
690 /* 15 dwords for emit_draw_elements */
691 if (count) {
692 if (!r300_prepare_for_rendering(r300,
693 PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS | PREP_INDEXED,
694 indexBuffer, 19, buffer_offset, info->index_bias,
695 instance_id))
696 goto done;
697 }
698 } while (count);
699 }
700
701 done:
702 if (indexBuffer != orgIndexBuffer) {
703 pipe_resource_reference( &indexBuffer, NULL );
704 }
705 }
706
707 static void r300_draw_arrays(struct r300_context *r300,
708 const struct pipe_draw_info *info,
709 int instance_id)
710 {
711 boolean alt_num_verts = r300->screen->caps.is_r500 &&
712 info->count > 65536;
713 unsigned start = info->start;
714 unsigned count = info->count;
715 unsigned short_count;
716
717 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
718 if (!r300_prepare_for_rendering(r300,
719 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS,
720 NULL, 9, start, 0, instance_id))
721 return;
722
723 if (alt_num_verts || count <= 65535) {
724 r300_emit_draw_arrays(r300, info->mode, count);
725 } else {
726 do {
727 /* The maximum must be divisible by 4 and 3,
728 * so that quad and triangle lists are split correctly.
729 *
730 * Strips, loops, and fans won't work. */
731 short_count = MIN2(count, 65532);
732 r300_emit_draw_arrays(r300, info->mode, short_count);
733
734 start += short_count;
735 count -= short_count;
736
737 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
738 if (count) {
739 if (!r300_prepare_for_rendering(r300,
740 PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS, NULL, 9,
741 start, 0, instance_id))
742 return;
743 }
744 } while (count);
745 }
746 }
747
748 static void r300_draw_arrays_instanced(struct r300_context *r300,
749 const struct pipe_draw_info *info)
750 {
751 int i;
752
753 for (i = 0; i < info->instance_count; i++)
754 r300_draw_arrays(r300, info, i);
755 }
756
757 static void r300_draw_elements_instanced(struct r300_context *r300,
758 const struct pipe_draw_info *info)
759 {
760 int i;
761
762 for (i = 0; i < info->instance_count; i++)
763 r300_draw_elements(r300, info, i);
764 }
765
766 static void r300_draw_vbo(struct pipe_context* pipe,
767 const struct pipe_draw_info *dinfo)
768 {
769 struct r300_context* r300 = r300_context(pipe);
770 struct pipe_draw_info info = *dinfo;
771
772 info.indexed = info.indexed && r300->index_buffer.buffer;
773
774 if (r300->skip_rendering ||
775 !u_trim_pipe_prim(info.mode, &info.count)) {
776 return;
777 }
778
779 r300_update_derived_state(r300);
780
781 /* Start the vbuf manager and update buffers if needed. */
782 if (u_vbuf_mgr_draw_begin(r300->vbuf_mgr, &info) & U_VBUF_BUFFERS_UPDATED) {
783 r300->vertex_arrays_dirty = TRUE;
784 }
785
786 /* Draw. */
787 if (info.indexed) {
788 info.start += r300->index_buffer.offset;
789 info.max_index = MIN2(r300->vbuf_mgr->max_index, info.max_index);
790
791 if (info.instance_count <= 1) {
792 if (info.count <= 8 &&
793 r300_resource(r300->index_buffer.buffer)->b.user_ptr) {
794 r300_draw_elements_immediate(r300, &info);
795 } else {
796 r300_draw_elements(r300, &info, -1);
797 }
798 } else {
799 r300_draw_elements_instanced(r300, &info);
800 }
801 } else {
802 if (info.instance_count <= 1) {
803 if (immd_is_good_idea(r300, info.count)) {
804 r300_draw_arrays_immediate(r300, &info);
805 } else {
806 r300_draw_arrays(r300, &info, -1);
807 }
808 } else {
809 r300_draw_arrays_instanced(r300, &info);
810 }
811 }
812
813 u_vbuf_mgr_draw_end(r300->vbuf_mgr);
814 }
815
816 /****************************************************************************
817 * The rest of this file is for SW TCL rendering only. Please be polite and *
818 * keep these functions separated so that they are easier to locate. ~C. *
819 ***************************************************************************/
820
821 /* SW TCL elements, using Draw. */
822 static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
823 const struct pipe_draw_info *info)
824 {
825 struct r300_context* r300 = r300_context(pipe);
826 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
827 struct pipe_transfer *ib_transfer = NULL;
828 unsigned count = info->count;
829 int i;
830 void *indices = NULL;
831 boolean indexed = info->indexed && r300->index_buffer.buffer;
832
833 if (r300->skip_rendering) {
834 return;
835 }
836
837 if (!u_trim_pipe_prim(info->mode, &count)) {
838 return;
839 }
840
841 r300_update_derived_state(r300);
842
843 r300_reserve_cs_dwords(r300,
844 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL |
845 (indexed ? PREP_INDEXED : 0),
846 indexed ? 256 : 6);
847
848 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
849 if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
850 void *buf = pipe_buffer_map(pipe,
851 r300->vbuf_mgr->vertex_buffer[i].buffer,
852 PIPE_TRANSFER_READ |
853 PIPE_TRANSFER_UNSYNCHRONIZED,
854 &vb_transfer[i]);
855 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
856 }
857 }
858
859 if (indexed) {
860 indices = pipe_buffer_map(pipe, r300->index_buffer.buffer,
861 PIPE_TRANSFER_READ |
862 PIPE_TRANSFER_UNSYNCHRONIZED, &ib_transfer);
863 }
864
865 draw_set_mapped_index_buffer(r300->draw, indices);
866
867 r300->draw_vbo_locked = TRUE;
868 r300->draw_first_emitted = FALSE;
869 draw_vbo(r300->draw, info);
870 draw_flush(r300->draw);
871 r300->draw_vbo_locked = FALSE;
872
873 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
874 if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
875 pipe_buffer_unmap(pipe, vb_transfer[i]);
876 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
877 }
878 }
879
880 if (indexed) {
881 pipe_buffer_unmap(pipe, ib_transfer);
882 draw_set_mapped_index_buffer(r300->draw, NULL);
883 }
884 }
885
886 /* Object for rendering using Draw. */
887 struct r300_render {
888 /* Parent class */
889 struct vbuf_render base;
890
891 /* Pipe context */
892 struct r300_context* r300;
893
894 /* Vertex information */
895 size_t vertex_size;
896 unsigned prim;
897 unsigned hwprim;
898
899 /* VBO */
900 size_t vbo_max_used;
901 void * vbo_ptr;
902
903 struct pipe_transfer *vbo_transfer;
904 };
905
906 static INLINE struct r300_render*
907 r300_render(struct vbuf_render* render)
908 {
909 return (struct r300_render*)render;
910 }
911
912 static const struct vertex_info*
913 r300_render_get_vertex_info(struct vbuf_render* render)
914 {
915 struct r300_render* r300render = r300_render(render);
916 struct r300_context* r300 = r300render->r300;
917
918 return &r300->vertex_info;
919 }
920
921 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
922 ushort vertex_size,
923 ushort count)
924 {
925 struct r300_render* r300render = r300_render(render);
926 struct r300_context* r300 = r300render->r300;
927 struct pipe_screen* screen = r300->context.screen;
928 size_t size = (size_t)vertex_size * (size_t)count;
929
930 DBG(r300, DBG_DRAW, "r300: render_allocate_vertices (size: %d)\n", size);
931
932 if (size + r300->draw_vbo_offset > r300->draw_vbo_size)
933 {
934 pipe_resource_reference(&r300->vbo, NULL);
935 r300->vbo = pipe_buffer_create(screen,
936 PIPE_BIND_VERTEX_BUFFER,
937 PIPE_USAGE_STREAM,
938 R300_MAX_DRAW_VBO_SIZE);
939 r300->draw_vbo_offset = 0;
940 r300->draw_vbo_size = R300_MAX_DRAW_VBO_SIZE;
941 }
942
943 r300render->vertex_size = vertex_size;
944
945 return (r300->vbo) ? TRUE : FALSE;
946 }
947
948 static void* r300_render_map_vertices(struct vbuf_render* render)
949 {
950 struct r300_render* r300render = r300_render(render);
951 struct r300_context* r300 = r300render->r300;
952
953 assert(!r300render->vbo_transfer);
954
955 DBG(r300, DBG_DRAW, "r300: render_map_vertices\n");
956
957 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
958 r300->vbo,
959 PIPE_TRANSFER_WRITE |
960 PIPE_TRANSFER_UNSYNCHRONIZED,
961 &r300render->vbo_transfer);
962
963 assert(r300render->vbo_ptr);
964
965 return ((uint8_t*)r300render->vbo_ptr + r300->draw_vbo_offset);
966 }
967
968 static void r300_render_unmap_vertices(struct vbuf_render* render,
969 ushort min,
970 ushort max)
971 {
972 struct r300_render* r300render = r300_render(render);
973 struct pipe_context* context = &r300render->r300->context;
974 struct r300_context* r300 = r300render->r300;
975
976 assert(r300render->vbo_transfer);
977
978 DBG(r300, DBG_DRAW, "r300: render_unmap_vertices\n");
979
980 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
981 r300render->vertex_size * (max + 1));
982 pipe_buffer_unmap(context, r300render->vbo_transfer);
983
984 r300render->vbo_transfer = NULL;
985 }
986
987 static void r300_render_release_vertices(struct vbuf_render* render)
988 {
989 struct r300_render* r300render = r300_render(render);
990 struct r300_context* r300 = r300render->r300;
991
992 DBG(r300, DBG_DRAW, "r300: render_release_vertices\n");
993
994 r300->draw_vbo_offset += r300render->vbo_max_used;
995 r300render->vbo_max_used = 0;
996 }
997
998 static boolean r300_render_set_primitive(struct vbuf_render* render,
999 unsigned prim)
1000 {
1001 struct r300_render* r300render = r300_render(render);
1002
1003 r300render->prim = prim;
1004 r300render->hwprim = r300_translate_primitive(prim);
1005
1006 return TRUE;
1007 }
1008
1009 static void r300_render_draw_arrays(struct vbuf_render* render,
1010 unsigned start,
1011 unsigned count)
1012 {
1013 struct r300_render* r300render = r300_render(render);
1014 struct r300_context* r300 = r300render->r300;
1015 uint8_t* ptr;
1016 unsigned i;
1017 unsigned dwords = 6;
1018
1019 CS_LOCALS(r300);
1020 (void) i; (void) ptr;
1021
1022 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count);
1023
1024 if (r300->draw_first_emitted) {
1025 if (!r300_prepare_for_rendering(r300,
1026 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL,
1027 NULL, dwords, 0, 0, -1))
1028 return;
1029 } else {
1030 if (!r300_emit_states(r300,
1031 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL,
1032 NULL, 0, 0, -1))
1033 return;
1034 }
1035
1036 BEGIN_CS(dwords);
1037 OUT_CS_REG(R300_GA_COLOR_CONTROL,
1038 r300_provoking_vertex_fixes(r300, r300render->prim));
1039 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
1040 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
1041 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
1042 r300render->hwprim);
1043 END_CS;
1044
1045 r300->draw_first_emitted = TRUE;
1046 }
1047
1048 static void r300_render_draw_elements(struct vbuf_render* render,
1049 const ushort* indices,
1050 uint count)
1051 {
1052 struct r300_render* r300render = r300_render(render);
1053 struct r300_context* r300 = r300render->r300;
1054 int i;
1055 unsigned end_cs_dwords;
1056 unsigned max_index = (r300->draw_vbo_size - r300->draw_vbo_offset) /
1057 (r300render->r300->vertex_info.size * 4) - 1;
1058 unsigned short_count;
1059 unsigned free_dwords;
1060
1061 CS_LOCALS(r300);
1062 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count);
1063
1064 if (r300->draw_first_emitted) {
1065 if (!r300_prepare_for_rendering(r300,
1066 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
1067 NULL, 256, 0, 0, -1))
1068 return;
1069 } else {
1070 if (!r300_emit_states(r300,
1071 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
1072 NULL, 0, 0, -1))
1073 return;
1074 }
1075
1076 /* Below we manage the CS space manually because there may be more
1077 * indices than it can fit in CS. */
1078
1079 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1080
1081 while (count) {
1082 free_dwords = RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw;
1083
1084 short_count = MIN2(count, (free_dwords - end_cs_dwords - 6) * 2);
1085
1086 BEGIN_CS(6 + (short_count+1)/2);
1087 OUT_CS_REG(R300_GA_COLOR_CONTROL,
1088 r300_provoking_vertex_fixes(r300, r300render->prim));
1089 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
1090 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2);
1091 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) |
1092 r300render->hwprim);
1093 for (i = 0; i < short_count-1; i += 2) {
1094 OUT_CS(indices[i+1] << 16 | indices[i]);
1095 }
1096 if (short_count % 2) {
1097 OUT_CS(indices[short_count-1]);
1098 }
1099 END_CS;
1100
1101 /* OK now subtract the emitted indices and see if we need to emit
1102 * another draw packet. */
1103 indices += short_count;
1104 count -= short_count;
1105
1106 if (count) {
1107 if (!r300_prepare_for_rendering(r300,
1108 PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
1109 NULL, 256, 0, 0, -1))
1110 return;
1111
1112 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1113 }
1114 }
1115
1116 r300->draw_first_emitted = TRUE;
1117 }
1118
1119 static void r300_render_destroy(struct vbuf_render* render)
1120 {
1121 FREE(render);
1122 }
1123
1124 static struct vbuf_render* r300_render_create(struct r300_context* r300)
1125 {
1126 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
1127
1128 r300render->r300 = r300;
1129
1130 r300render->base.max_vertex_buffer_bytes = 1024 * 1024;
1131 r300render->base.max_indices = 16 * 1024;
1132
1133 r300render->base.get_vertex_info = r300_render_get_vertex_info;
1134 r300render->base.allocate_vertices = r300_render_allocate_vertices;
1135 r300render->base.map_vertices = r300_render_map_vertices;
1136 r300render->base.unmap_vertices = r300_render_unmap_vertices;
1137 r300render->base.set_primitive = r300_render_set_primitive;
1138 r300render->base.draw_elements = r300_render_draw_elements;
1139 r300render->base.draw_arrays = r300_render_draw_arrays;
1140 r300render->base.release_vertices = r300_render_release_vertices;
1141 r300render->base.destroy = r300_render_destroy;
1142
1143 return &r300render->base;
1144 }
1145
1146 struct draw_stage* r300_draw_stage(struct r300_context* r300)
1147 {
1148 struct vbuf_render* render;
1149 struct draw_stage* stage;
1150
1151 render = r300_render_create(r300);
1152
1153 if (!render) {
1154 return NULL;
1155 }
1156
1157 stage = draw_vbuf_stage(r300->draw, render);
1158
1159 if (!stage) {
1160 render->destroy(render);
1161 return NULL;
1162 }
1163
1164 draw_set_render(r300->draw, render);
1165
1166 return stage;
1167 }
1168
1169 void r300_draw_flush_vbuf(struct r300_context *r300)
1170 {
1171 pipe_resource_reference(&r300->vbo, NULL);
1172 r300->draw_vbo_size = 0;
1173 }
1174
1175 /****************************************************************************
1176 * End of SW TCL functions *
1177 ***************************************************************************/
1178
1179 /* This functions is used to draw a rectangle for the blitter module.
1180 *
1181 * If we rendered a quad, the pixels on the main diagonal
1182 * would be computed and stored twice, which makes the clear/copy codepaths
1183 * somewhat inefficient. Instead we use a rectangular point sprite. */
1184 static void r300_blitter_draw_rectangle(struct blitter_context *blitter,
1185 unsigned x1, unsigned y1,
1186 unsigned x2, unsigned y2,
1187 float depth,
1188 enum blitter_attrib_type type,
1189 const float attrib[4])
1190 {
1191 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter));
1192 unsigned last_sprite_coord_enable = r300->sprite_coord_enable;
1193 unsigned width = x2 - x1;
1194 unsigned height = y2 - y1;
1195 unsigned vertex_size =
1196 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4;
1197 unsigned dwords = 13 + vertex_size +
1198 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0);
1199 const float zeros[4] = {0, 0, 0, 0};
1200 CS_LOCALS(r300);
1201
1202 if (r300->skip_rendering)
1203 return;
1204
1205 r300->context.set_vertex_buffers(&r300->context, 0, NULL);
1206
1207 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD)
1208 r300->sprite_coord_enable = 1;
1209
1210 r300_update_derived_state(r300);
1211
1212 /* Mark some states we don't care about as non-dirty. */
1213 r300->clip_state.dirty = FALSE;
1214 r300->viewport_state.dirty = FALSE;
1215
1216 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1))
1217 goto done;
1218
1219 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n");
1220
1221 BEGIN_CS(dwords);
1222 /* Set up GA. */
1223 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16));
1224
1225 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) {
1226 /* Set up the GA to generate texcoords. */
1227 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE |
1228 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT));
1229 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
1230 OUT_CS_32F(attrib[0]);
1231 OUT_CS_32F(attrib[3]);
1232 OUT_CS_32F(attrib[2]);
1233 OUT_CS_32F(attrib[1]);
1234 }
1235
1236 /* Set up VAP controls. */
1237 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
1238 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT);
1239 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
1240 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
1241 OUT_CS(1);
1242 OUT_CS(0);
1243
1244 /* Draw. */
1245 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size);
1246 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) |
1247 R300_VAP_VF_CNTL__PRIM_POINTS);
1248
1249 OUT_CS_32F(x1 + width * 0.5f);
1250 OUT_CS_32F(y1 + height * 0.5f);
1251 OUT_CS_32F(depth);
1252 OUT_CS_32F(1);
1253
1254 if (vertex_size == 8) {
1255 if (!attrib)
1256 attrib = zeros;
1257 OUT_CS_TABLE(attrib, 4);
1258 }
1259 END_CS;
1260
1261 done:
1262 /* Restore the state. */
1263 r300_mark_atom_dirty(r300, &r300->clip_state);
1264 r300_mark_atom_dirty(r300, &r300->rs_state);
1265 r300_mark_atom_dirty(r300, &r300->viewport_state);
1266
1267 r300->sprite_coord_enable = last_sprite_coord_enable;
1268 }
1269
1270 static void r300_resource_resolve(struct pipe_context* pipe,
1271 struct pipe_resource* dest,
1272 unsigned dst_layer,
1273 struct pipe_resource* src,
1274 unsigned src_layer)
1275 {
1276 struct r300_context* r300 = r300_context(pipe);
1277 struct pipe_surface* srcsurf, surf_tmpl;
1278 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
1279 float color[] = {0, 0, 0, 0};
1280
1281 memset(&surf_tmpl, 0, sizeof(surf_tmpl));
1282 surf_tmpl.format = src->format;
1283 surf_tmpl.usage = 0; /* not really a surface hence no bind flags */
1284 surf_tmpl.u.tex.level = 0; /* msaa resources cannot have mipmaps */
1285 surf_tmpl.u.tex.first_layer = src_layer;
1286 surf_tmpl.u.tex.last_layer = src_layer;
1287 srcsurf = pipe->create_surface(pipe, src, &surf_tmpl);
1288 surf_tmpl.format = dest->format;
1289 surf_tmpl.u.tex.first_layer = dst_layer;
1290 surf_tmpl.u.tex.last_layer = dst_layer;
1291
1292 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n");
1293
1294 /* Enable AA resolve. */
1295 aa->dest = r300_surface(pipe->create_surface(pipe, dest, &surf_tmpl));
1296
1297 aa->aaresolve_ctl =
1298 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE |
1299 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE;
1300 r300->aa_state.size = 10;
1301 r300_mark_atom_dirty(r300, &r300->aa_state);
1302
1303 /* Resolve the surface. */
1304 r300->context.clear_render_target(pipe,
1305 srcsurf, color, 0, 0, src->width0, src->height0);
1306
1307 /* Disable AA resolve. */
1308 aa->aaresolve_ctl = 0;
1309 r300->aa_state.size = 4;
1310 r300_mark_atom_dirty(r300, &r300->aa_state);
1311
1312 pipe_surface_reference((struct pipe_surface**)&srcsurf, NULL);
1313 pipe_surface_reference((struct pipe_surface**)&aa->dest, NULL);
1314 }
1315
1316 void r300_init_render_functions(struct r300_context *r300)
1317 {
1318 /* Set draw functions based on presence of HW TCL. */
1319 if (r300->screen->caps.has_tcl) {
1320 r300->context.draw_vbo = r300_draw_vbo;
1321 } else {
1322 r300->context.draw_vbo = r300_swtcl_draw_vbo;
1323 }
1324
1325 r300->context.resource_resolve = r300_resource_resolve;
1326 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
1327
1328 /* Plug in the two-sided stencil reference value fallback if needed. */
1329 if (!r300->screen->caps.is_r500)
1330 r300_plug_in_stencil_ref_fallback(r300);
1331 }