src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_TWO_SIDED_STENCIL:
  99         case PIPE_CAP_ANISOTROPIC_FILTER:
 100         case PIPE_CAP_POINT_SPRITE:
 101         case PIPE_CAP_OCCLUSION_QUERY:
 102         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 103         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 104         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 105         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 106         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 107         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 108         case PIPE_CAP_CONDITIONAL_RENDER:
 109         case PIPE_CAP_TEXTURE_BARRIER:
 110         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 111         case PIPE_CAP_USER_INDEX_BUFFERS:
 112         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 113         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 114         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 115         case PIPE_CAP_CLIP_HALFZ:
 116             return 1;
 117
 118         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 119             return R300_BUFFER_ALIGNMENT;
 120
 121         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 122             return 16;
 123
 124         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 125             return 120;
 126
 127         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 128         case PIPE_CAP_TEXTURE_SWIZZLE:
 129             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 130
 131         /* We don't support color clamping on r500, so that we can use color
 132          * intepolators for generic varyings. */
 133         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 134             return !is_r500;
 135
 136         /* Supported on r500 only. */
 137         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 138         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 139         case PIPE_CAP_SM3:
 140             return is_r500 ? 1 : 0;
 141
 142         /* Unsupported features. */
 143         case PIPE_CAP_QUERY_TIME_ELAPSED:
 144         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 145         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 146         case PIPE_CAP_INDEP_BLEND_ENABLE:
 147         case PIPE_CAP_INDEP_BLEND_FUNC:
 148         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 149         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 150         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 151         case PIPE_CAP_TGSI_INSTANCEID:
 152         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 153         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 154         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 155         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 156         case PIPE_CAP_MIN_TEXEL_OFFSET:
 157         case PIPE_CAP_MAX_TEXEL_OFFSET:
 158         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 159         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 160         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 163         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 164         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 165         case PIPE_CAP_MAX_VERTEX_STREAMS:
 166         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 167         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 168         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 169         case PIPE_CAP_COMPUTE:
 170         case PIPE_CAP_START_INSTANCE:
 171         case PIPE_CAP_QUERY_TIMESTAMP:
 172         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 173         case PIPE_CAP_CUBE_MAP_ARRAY:
 174         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 175         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 176         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 177         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 178         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 179         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 180         case PIPE_CAP_TEXTURE_GATHER_SM5:
 181         case PIPE_CAP_TEXTURE_QUERY_LOD:
 182         case PIPE_CAP_FAKE_SW_MSAA:
 183         case PIPE_CAP_SAMPLE_SHADING:
 184         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 185         case PIPE_CAP_DRAW_INDIRECT:
 186         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 187         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 188         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 189         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 190         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 191         case PIPE_CAP_VERTEXID_NOBASE:
 192         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 193         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 194         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 195         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 196         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 197         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 198         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 199         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 200         case PIPE_CAP_TGSI_TXQS:
 201         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 202         case PIPE_CAP_SHAREABLE_SHADERS:
 203         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 204         case PIPE_CAP_CLEAR_TEXTURE:
 205         case PIPE_CAP_DRAW_PARAMETERS:
 206         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 207         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 208         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 209         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 210         case PIPE_CAP_INVALIDATE_BUFFER:
 211         case PIPE_CAP_GENERATE_MIPMAP:
 212         case PIPE_CAP_STRING_MARKER:
 213         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 214         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 215         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 216         case PIPE_CAP_QUERY_MEMORY_INFO:
 217             return 0;
 218
 219         /* SWTCL-only features. */
 220         case PIPE_CAP_PRIMITIVE_RESTART:
 221         case PIPE_CAP_USER_VERTEX_BUFFERS:
 222         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 223             return !r300screen->caps.has_tcl;
 224
 225         /* HWTCL-only features / limitations. */
 226         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 227         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 228         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 229             return r300screen->caps.has_tcl;
 230         case PIPE_CAP_TGSI_TEXCOORD:
 231             return 0;
 232
 233         /* Texturing. */
 234         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 235         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 236         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 237             /* 13 == 4096, 12 == 2048 */
 238             return is_r500 ? 13 : 12;
 239
 240         /* Render targets. */
 241         case PIPE_CAP_MAX_RENDER_TARGETS:
 242             return 4;
 243         case PIPE_CAP_ENDIANNESS:
 244             return PIPE_ENDIAN_LITTLE;
 245
 246         case PIPE_CAP_MAX_VIEWPORTS:
 247             return 1;
 248
 249         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 250             return 2048;
 251
 252         case PIPE_CAP_VENDOR_ID:
 253                 return 0x1002;
 254         case PIPE_CAP_DEVICE_ID:
 255                 return r300screen->info.pci_id;
 256         case PIPE_CAP_ACCELERATED:
 257                 return 1;
 258         case PIPE_CAP_VIDEO_MEMORY:
 259                 return r300screen->info.vram_size >> 20;
 260         case PIPE_CAP_UMA:
 261                 return 0;
 262         case PIPE_CAP_PCI_GROUP:
 263             return r300screen->info.pci_domain;
 264         case PIPE_CAP_PCI_BUS:
 265             return r300screen->info.pci_bus;
 266         case PIPE_CAP_PCI_DEVICE:
 267             return r300screen->info.pci_dev;
 268         case PIPE_CAP_PCI_FUNCTION:
 269             return r300screen->info.pci_func;
 270     }
 271     return 0;
 272 }
 273
 274 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
 275 {
 276    struct r300_screen* r300screen = r300_screen(pscreen);
 277    boolean is_r400 = r300screen->caps.is_r400;
 278    boolean is_r500 = r300screen->caps.is_r500;
 279
 280    switch (shader) {
 281     case PIPE_SHADER_FRAGMENT:
 282         switch (param)
 283         {
 284         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 285             return is_r500 || is_r400 ? 512 : 96;
 286         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 287             return is_r500 || is_r400 ? 512 : 64;
 288         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 289             return is_r500 || is_r400 ? 512 : 32;
 290         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 291             return is_r500 ? 511 : 4;
 292         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 293             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 294             /* Fragment shader limits. */
 295         case PIPE_SHADER_CAP_MAX_INPUTS:
 296             /* 2 colors + 8 texcoords are always supported
 297              * (minus fog and wpos).
 298              *
 299              * R500 has the ability to turn 3rd and 4th color into
 300              * additional texcoords but there is no two-sided color
 301              * selection then. However the facing bit can be used instead. */
 302             return 10;
 303         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 304             return 4;
 305         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 306             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 307         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 308         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 309             return 1;
 310         case PIPE_SHADER_CAP_MAX_TEMPS:
 311             return is_r500 ? 128 : is_r400 ? 64 : 32;
 312         case PIPE_SHADER_CAP_MAX_PREDS:
 313             return 0; /* unused */
 314         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 315         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 316            return r300screen->caps.num_tex_units;
 317         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 318         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 319         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 320         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 321         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 322         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 323         case PIPE_SHADER_CAP_SUBROUTINES:
 324         case PIPE_SHADER_CAP_INTEGERS:
 325         case PIPE_SHADER_CAP_DOUBLES:
 326         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 327         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 328         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 329         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 330         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 331             return 0;
 332         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 333             return 32;
 334         case PIPE_SHADER_CAP_PREFERRED_IR:
 335             return PIPE_SHADER_IR_TGSI;
 336         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 337             return 0;
 338         }
 339         break;
 340     case PIPE_SHADER_VERTEX:
 341         switch (param)
 342         {
 343         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 344         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 345         case PIPE_SHADER_CAP_SUBROUTINES:
 346             return 0;
 347         default:;
 348         }
 349
 350         if (!r300screen->caps.has_tcl) {
 351             return draw_get_shader_param(shader, param);
 352         }
 353
 354         switch (param)
 355         {
 356         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 357         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 358             return is_r500 ? 1024 : 256;
 359         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 360             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 361         case PIPE_SHADER_CAP_MAX_INPUTS:
 362             return 16;
 363         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 364             return 10;
 365         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 366             return 256 * sizeof(float[4]);
 367         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 368             return 1;
 369         case PIPE_SHADER_CAP_MAX_TEMPS:
 370             return 32;
 371         case PIPE_SHADER_CAP_MAX_PREDS:
 372             return 0; /* unused */
 373         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 374         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 375             return 1;
 376         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 377         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 378         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 379         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 380         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 381         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 382         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 383         case PIPE_SHADER_CAP_SUBROUTINES:
 384         case PIPE_SHADER_CAP_INTEGERS:
 385         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 386         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 387         case PIPE_SHADER_CAP_DOUBLES:
 388         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 389         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 390         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 391         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 392         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 393             return 0;
 394         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 395             return 32;
 396         case PIPE_SHADER_CAP_PREFERRED_IR:
 397             return PIPE_SHADER_IR_TGSI;
 398         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 399             return 0;
 400         }
 401         break;
 402     }
 403     return 0;
 404 }
 405
 406 static float r300_get_paramf(struct pipe_screen* pscreen,
 407                              enum pipe_capf param)
 408 {
 409     struct r300_screen* r300screen = r300_screen(pscreen);
 410
 411     switch (param) {
 412         case PIPE_CAPF_MAX_LINE_WIDTH:
 413         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 414         case PIPE_CAPF_MAX_POINT_WIDTH:
 415         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 416             /* The maximum dimensions of the colorbuffer are our practical
 417              * rendering limits. 2048 pixels should be enough for anybody. */
 418             if (r300screen->caps.is_r500) {
 419                 return 4096.0f;
 420             } else if (r300screen->caps.is_r400) {
 421                 return 4021.0f;
 422             } else {
 423                 return 2560.0f;
 424             }
 425         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 426             return 16.0f;
 427         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 428             return 16.0f;
 429         case PIPE_CAPF_GUARD_BAND_LEFT:
 430         case PIPE_CAPF_GUARD_BAND_TOP:
 431         case PIPE_CAPF_GUARD_BAND_RIGHT:
 432         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 433             return 0.0f;
 434         default:
 435             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 436                          param);
 437             return 0.0f;
 438     }
 439 }
 440
 441 static int r300_get_video_param(struct pipe_screen *screen,
 442                                 enum pipe_video_profile profile,
 443                                 enum pipe_video_entrypoint entrypoint,
 444                                 enum pipe_video_cap param)
 445 {
 446    switch (param) {
 447       case PIPE_VIDEO_CAP_SUPPORTED:
 448          return vl_profile_supported(screen, profile, entrypoint);
 449       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 450          return 0;
 451       case PIPE_VIDEO_CAP_MAX_WIDTH:
 452       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 453          return vl_video_buffer_max_size(screen);
 454       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 455          return PIPE_FORMAT_NV12;
 456       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 457          return false;
 458       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 459          return false;
 460       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 461          return true;
 462       case PIPE_VIDEO_CAP_MAX_LEVEL:
 463          return vl_level_supported(screen, profile);
 464       default:
 465          return 0;
 466    }
 467 }
 468
 469 /**
 470  * Whether the format matches:
 471  *   PIPE_FORMAT_?10?10?10?2_UNORM
 472  */
 473 static inline boolean
 474 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 475 {
 476    static const unsigned size[4] = {10, 10, 10, 2};
 477    unsigned chan;
 478
 479    if (desc->block.width != 1 ||
 480        desc->block.height != 1 ||
 481        desc->block.bits != 32)
 482       return FALSE;
 483
 484    for (chan = 0; chan < 4; ++chan) {
 485       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 486          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 487          return FALSE;
 488       if (desc->channel[chan].size != size[chan])
 489          return FALSE;
 490    }
 491
 492    return TRUE;
 493 }
 494
 495 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 496                                        enum pipe_format format)
 497 {
 498     int c;
 499     const struct util_format_description *desc =
 500         util_format_description(format);
 501
 502     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 503         return false;
 504
 505     c = util_format_get_first_non_void_channel(format);
 506
 507     /* RGBA16F */
 508     if (rscreen->caps.is_r500 &&
 509         desc->nr_channels == 4 &&
 510         desc->channel[c].size == 16 &&
 511         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 512         return true;
 513
 514     if (desc->channel[c].normalized &&
 515         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 516         desc->channel[c].size >= 4 &&
 517         desc->channel[c].size <= 10) {
 518         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 519         if (desc->nr_channels >= 3)
 520             return true;
 521
 522         if (format == PIPE_FORMAT_R8G8_UNORM)
 523             return true;
 524
 525         /* R8, I8, L8, A8 */
 526         if (desc->nr_channels == 1)
 527             return true;
 528     }
 529
 530     return false;
 531 }
 532
 533 static boolean r300_is_format_supported(struct pipe_screen* screen,
 534                                         enum pipe_format format,
 535                                         enum pipe_texture_target target,
 536                                         unsigned sample_count,
 537                                         unsigned usage)
 538 {
 539     uint32_t retval = 0;
 540     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 541     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 542     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 543                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 544                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 545                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 546                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 547     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 548                        format == PIPE_FORMAT_RGTC1_SNORM ||
 549                        format == PIPE_FORMAT_LATC1_UNORM ||
 550                        format == PIPE_FORMAT_LATC1_SNORM;
 551     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 552                        format == PIPE_FORMAT_RGTC2_SNORM ||
 553                        format == PIPE_FORMAT_LATC2_UNORM ||
 554                        format == PIPE_FORMAT_LATC2_SNORM;
 555     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 556                             format == PIPE_FORMAT_R16G16_FLOAT ||
 557                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 558                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 559                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 560     const struct util_format_description *desc;
 561
 562     if (!util_format_is_supported(format, usage))
 563        return FALSE;
 564
 565     /* Check multisampling support. */
 566     switch (sample_count) {
 567         case 0:
 568         case 1:
 569             break;
 570         case 2:
 571         case 4:
 572         case 6:
 573             /* No texturing and scanout. */
 574             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 575                          PIPE_BIND_DISPLAY_TARGET |
 576                          PIPE_BIND_SCANOUT)) {
 577                 return FALSE;
 578             }
 579
 580             desc = util_format_description(format);
 581
 582             if (is_r500) {
 583                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 584                 if (!util_format_is_depth_or_stencil(format) &&
 585                     !util_format_is_rgba8_variant(desc) &&
 586                     !util_format_is_rgba1010102_variant(desc) &&
 587                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 588                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 589                     return FALSE;
 590                 }
 591             } else {
 592                 /* Only allow depth/stencil, RGBA8. */
 593                 if (!util_format_is_depth_or_stencil(format) &&
 594                     !util_format_is_rgba8_variant(desc)) {
 595                     return FALSE;
 596                 }
 597             }
 598             break;
 599         default:
 600             return FALSE;
 601     }
 602
 603     /* Check sampler format support. */
 604     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 605         /* these two are broken for an unknown reason */
 606         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 607         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 608         /* ATI1N is r5xx-only. */
 609         (is_r500 || !is_ati1n) &&
 610         /* ATI2N is supported on r4xx-r5xx. */
 611         (is_r400 || is_r500 || !is_ati2n) &&
 612         r300_is_sampler_format_supported(format)) {
 613         retval |= PIPE_BIND_SAMPLER_VIEW;
 614     }
 615
 616     /* Check colorbuffer format support. */
 617     if ((usage & (PIPE_BIND_RENDER_TARGET |
 618                   PIPE_BIND_DISPLAY_TARGET |
 619                   PIPE_BIND_SCANOUT |
 620                   PIPE_BIND_SHARED |
 621                   PIPE_BIND_BLENDABLE)) &&
 622         /* 2101010 cannot be rendered to on non-r5xx. */
 623         (!is_color2101010 || is_r500) &&
 624         r300_is_colorbuffer_format_supported(format)) {
 625         retval |= usage &
 626             (PIPE_BIND_RENDER_TARGET |
 627              PIPE_BIND_DISPLAY_TARGET |
 628              PIPE_BIND_SCANOUT |
 629              PIPE_BIND_SHARED);
 630
 631         if (r300_is_blending_supported(r300_screen(screen), format)) {
 632             retval |= usage & PIPE_BIND_BLENDABLE;
 633         }
 634     }
 635
 636     /* Check depth-stencil format support. */
 637     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 638         r300_is_zs_format_supported(format)) {
 639         retval |= PIPE_BIND_DEPTH_STENCIL;
 640     }
 641
 642     /* Check vertex buffer format support. */
 643     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 644         if (r300_screen(screen)->caps.has_tcl) {
 645             /* Half float is supported on >= R400. */
 646             if ((is_r400 || is_r500 || !is_half_float) &&
 647                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 648                 retval |= PIPE_BIND_VERTEX_BUFFER;
 649             }
 650         } else {
 651             /* SW TCL */
 652             if (!util_format_is_pure_integer(format)) {
 653                 retval |= PIPE_BIND_VERTEX_BUFFER;
 654             }
 655         }
 656     }
 657
 658     /* Transfers are always supported. */
 659     if (usage & PIPE_BIND_TRANSFER_READ)
 660         retval |= PIPE_BIND_TRANSFER_READ;
 661     if (usage & PIPE_BIND_TRANSFER_WRITE)
 662         retval |= PIPE_BIND_TRANSFER_WRITE;
 663
 664     return retval == usage;
 665 }
 666
 667 static void r300_destroy_screen(struct pipe_screen* pscreen)
 668 {
 669     struct r300_screen* r300screen = r300_screen(pscreen);
 670     struct radeon_winsys *rws = radeon_winsys(pscreen);
 671
 672     if (rws && !rws->unref(rws))
 673       return;
 674
 675     pipe_mutex_destroy(r300screen->cmask_mutex);
 676
 677     if (rws)
 678       rws->destroy(rws);
 679
 680     FREE(r300screen);
 681 }
 682
 683 static void r300_fence_reference(struct pipe_screen *screen,
 684                                  struct pipe_fence_handle **ptr,
 685                                  struct pipe_fence_handle *fence)
 686 {
 687     struct radeon_winsys *rws = r300_screen(screen)->rws;
 688
 689     rws->fence_reference(ptr, fence);
 690 }
 691
 692 static boolean r300_fence_finish(struct pipe_screen *screen,
 693                                  struct pipe_fence_handle *fence,
 694                                  uint64_t timeout)
 695 {
 696     struct radeon_winsys *rws = r300_screen(screen)->rws;
 697
 698     return rws->fence_wait(rws, fence, timeout);
 699 }
 700
 701 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 702 {
 703     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 704
 705     if (!r300screen) {
 706         FREE(r300screen);
 707         return NULL;
 708     }
 709
 710     rws->query_info(rws, &r300screen->info);
 711
 712     r300_init_debug(r300screen);
 713     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 714
 715     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 716         r300screen->caps.zmask_ram = 0;
 717     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 718         r300screen->caps.hiz_ram = 0;
 719
 720     r300screen->rws = rws;
 721     r300screen->screen.destroy = r300_destroy_screen;
 722     r300screen->screen.get_name = r300_get_name;
 723     r300screen->screen.get_vendor = r300_get_vendor;
 724     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 725     r300screen->screen.get_param = r300_get_param;
 726     r300screen->screen.get_shader_param = r300_get_shader_param;
 727     r300screen->screen.get_paramf = r300_get_paramf;
 728     r300screen->screen.get_video_param = r300_get_video_param;
 729     r300screen->screen.is_format_supported = r300_is_format_supported;
 730     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 731     r300screen->screen.context_create = r300_create_context;
 732     r300screen->screen.fence_reference = r300_fence_reference;
 733     r300screen->screen.fence_finish = r300_fence_finish;
 734
 735     r300_init_screen_resource_functions(r300screen);
 736
 737     util_format_s3tc_init();
 738     pipe_mutex_init(r300screen->cmask_mutex);
 739
 740     return &r300screen->screen;
 741 }