36b5dc78db93d10af8fe8c3bb69cf59a187c9754
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* chip_families[] = {
51 "ATI R300",
52 "ATI R350",
53 "ATI RV350",
54 "ATI RV370",
55 "ATI RV380",
56 "ATI RS400",
57 "ATI RC410",
58 "ATI RS480",
59 "ATI R420",
60 "ATI R423",
61 "ATI R430",
62 "ATI R480",
63 "ATI R481",
64 "ATI RV410",
65 "ATI RS600",
66 "ATI RS690",
67 "ATI RS740",
68 "ATI RV515",
69 "ATI R520",
70 "ATI RV530",
71 "ATI R580",
72 "ATI RV560",
73 "ATI RV570"
74 };
75
76 static const char* r300_get_name(struct pipe_screen* pscreen)
77 {
78 struct r300_screen* r300screen = r300_screen(pscreen);
79
80 return chip_families[r300screen->caps.family];
81 }
82
83 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
84 {
85 struct r300_screen* r300screen = r300_screen(pscreen);
86 boolean is_r500 = r300screen->caps.is_r500;
87
88 switch (param) {
89 /* Supported features (boolean caps). */
90 case PIPE_CAP_NPOT_TEXTURES:
91 case PIPE_CAP_TWO_SIDED_STENCIL:
92 case PIPE_CAP_ANISOTROPIC_FILTER:
93 case PIPE_CAP_POINT_SPRITE:
94 case PIPE_CAP_OCCLUSION_QUERY:
95 case PIPE_CAP_TEXTURE_SHADOW_MAP:
96 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
97 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
98 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
99 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
100 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
101 case PIPE_CAP_CONDITIONAL_RENDER:
102 case PIPE_CAP_TEXTURE_BARRIER:
103 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
104 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
105 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
106 case PIPE_CAP_USER_INDEX_BUFFERS:
107 case PIPE_CAP_USER_CONSTANT_BUFFERS:
108 return 1;
109
110 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
111 return 64;
112
113 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
114 return 16;
115
116 case PIPE_CAP_GLSL_FEATURE_LEVEL:
117 return 120;
118
119 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
120 case PIPE_CAP_TEXTURE_SWIZZLE:
121 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
122
123 /* Supported on r500 only. */
124 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
125 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
126 case PIPE_CAP_SM3:
127 return is_r500 ? 1 : 0;
128
129 /* Unsupported features. */
130 case PIPE_CAP_TIMER_QUERY:
131 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
132 case PIPE_CAP_INDEP_BLEND_ENABLE:
133 case PIPE_CAP_INDEP_BLEND_FUNC:
134 case PIPE_CAP_DEPTH_CLIP_DISABLE:
135 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
136 case PIPE_CAP_SHADER_STENCIL_EXPORT:
137 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
138 case PIPE_CAP_TGSI_INSTANCEID:
139 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
140 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
141 case PIPE_CAP_SEAMLESS_CUBE_MAP:
142 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
143 case PIPE_CAP_SCALED_RESOLVE:
144 case PIPE_CAP_MIN_TEXEL_OFFSET:
145 case PIPE_CAP_MAX_TEXEL_OFFSET:
146 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
147 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
148 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
149 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
150 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
151 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
152 case PIPE_CAP_COMPUTE:
153 case PIPE_CAP_START_INSTANCE:
154 case PIPE_CAP_QUERY_TIMESTAMP:
155 case PIPE_CAP_TEXTURE_MULTISAMPLE:
156 return 0;
157
158 /* SWTCL-only features. */
159 case PIPE_CAP_PRIMITIVE_RESTART:
160 case PIPE_CAP_USER_VERTEX_BUFFERS:
161 return !r300screen->caps.has_tcl;
162
163 /* HWTCL-only features / limitations. */
164 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
165 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
166 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
167 return r300screen->caps.has_tcl;
168
169 /* Texturing. */
170 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
171 return r300screen->caps.num_tex_units;
172 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
173 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
174 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
175 /* 13 == 4096, 12 == 2048 */
176 return is_r500 ? 13 : 12;
177
178 /* Render targets. */
179 case PIPE_CAP_MAX_RENDER_TARGETS:
180 return 4;
181 }
182 return 0;
183 }
184
185 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
186 {
187 struct r300_screen* r300screen = r300_screen(pscreen);
188 boolean is_r400 = r300screen->caps.is_r400;
189 boolean is_r500 = r300screen->caps.is_r500;
190
191 switch (shader) {
192 case PIPE_SHADER_FRAGMENT:
193 switch (param)
194 {
195 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
196 return is_r500 || is_r400 ? 512 : 96;
197 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
198 return is_r500 || is_r400 ? 512 : 64;
199 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
200 return is_r500 || is_r400 ? 512 : 32;
201 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
202 return is_r500 ? 511 : 4;
203 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
204 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
205 /* Fragment shader limits. */
206 case PIPE_SHADER_CAP_MAX_INPUTS:
207 /* 2 colors + 8 texcoords are always supported
208 * (minus fog and wpos).
209 *
210 * R500 has the ability to turn 3rd and 4th color into
211 * additional texcoords but there is no two-sided color
212 * selection then. However the facing bit can be used instead. */
213 return 10;
214 case PIPE_SHADER_CAP_MAX_CONSTS:
215 return is_r500 ? 256 : 32;
216 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
217 return 1;
218 case PIPE_SHADER_CAP_MAX_TEMPS:
219 return is_r500 ? 128 : is_r400 ? 64 : 32;
220 case PIPE_SHADER_CAP_MAX_PREDS:
221 return is_r500 ? 1 : 0;
222 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
223 return r300screen->caps.num_tex_units;
224 case PIPE_SHADER_CAP_MAX_ADDRS:
225 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
226 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
227 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
228 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
229 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
230 case PIPE_SHADER_CAP_SUBROUTINES:
231 case PIPE_SHADER_CAP_INTEGERS:
232 return 0;
233 case PIPE_SHADER_CAP_PREFERRED_IR:
234 return PIPE_SHADER_IR_TGSI;
235 }
236 break;
237 case PIPE_SHADER_VERTEX:
238 switch (param)
239 {
240 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
241 case PIPE_SHADER_CAP_SUBROUTINES:
242 return 0;
243 default:;
244 }
245
246 if (!r300screen->caps.has_tcl) {
247 return draw_get_shader_param(shader, param);
248 }
249
250 switch (param)
251 {
252 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
253 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
254 return is_r500 ? 1024 : 256;
255 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
256 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
257 case PIPE_SHADER_CAP_MAX_INPUTS:
258 return 16;
259 case PIPE_SHADER_CAP_MAX_CONSTS:
260 return 256;
261 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
262 return 1;
263 case PIPE_SHADER_CAP_MAX_TEMPS:
264 return 32;
265 case PIPE_SHADER_CAP_MAX_ADDRS:
266 return 1; /* XXX guessed */
267 case PIPE_SHADER_CAP_MAX_PREDS:
268 return is_r500 ? 4 : 0; /* XXX guessed. */
269 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
270 return 1;
271 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
272 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
273 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
274 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
275 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
276 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
277 case PIPE_SHADER_CAP_SUBROUTINES:
278 case PIPE_SHADER_CAP_INTEGERS:
279 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
280 return 0;
281 case PIPE_SHADER_CAP_PREFERRED_IR:
282 return PIPE_SHADER_IR_TGSI;
283 }
284 break;
285 }
286 return 0;
287 }
288
289 static float r300_get_paramf(struct pipe_screen* pscreen,
290 enum pipe_capf param)
291 {
292 struct r300_screen* r300screen = r300_screen(pscreen);
293
294 switch (param) {
295 case PIPE_CAPF_MAX_LINE_WIDTH:
296 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
297 case PIPE_CAPF_MAX_POINT_WIDTH:
298 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
299 /* The maximum dimensions of the colorbuffer are our practical
300 * rendering limits. 2048 pixels should be enough for anybody. */
301 if (r300screen->caps.is_r500) {
302 return 4096.0f;
303 } else if (r300screen->caps.is_r400) {
304 return 4021.0f;
305 } else {
306 return 2560.0f;
307 }
308 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
309 return 16.0f;
310 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
311 return 16.0f;
312 case PIPE_CAPF_GUARD_BAND_LEFT:
313 case PIPE_CAPF_GUARD_BAND_TOP:
314 case PIPE_CAPF_GUARD_BAND_RIGHT:
315 case PIPE_CAPF_GUARD_BAND_BOTTOM:
316 /* XXX I don't know what these should be but the least we can do is
317 * silence the potential error message */
318 return 0.0f;
319 default:
320 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
321 param);
322 return 0.0f;
323 }
324 }
325
326 static int r300_get_video_param(struct pipe_screen *screen,
327 enum pipe_video_profile profile,
328 enum pipe_video_cap param)
329 {
330 switch (param) {
331 case PIPE_VIDEO_CAP_SUPPORTED:
332 return vl_profile_supported(screen, profile);
333 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
334 return 0;
335 case PIPE_VIDEO_CAP_MAX_WIDTH:
336 case PIPE_VIDEO_CAP_MAX_HEIGHT:
337 return vl_video_buffer_max_size(screen);
338 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
339 return PIPE_FORMAT_NV12;
340 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
341 return false;
342 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
343 return false;
344 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
345 return true;
346 default:
347 return 0;
348 }
349 }
350
351 static boolean r300_is_format_supported(struct pipe_screen* screen,
352 enum pipe_format format,
353 enum pipe_texture_target target,
354 unsigned sample_count,
355 unsigned usage)
356 {
357 uint32_t retval = 0;
358 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
359 boolean is_r500 = r300_screen(screen)->caps.is_r500;
360 boolean is_r400 = r300_screen(screen)->caps.is_r400;
361 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
362 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
363 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
364 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
365 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
366 format == PIPE_FORMAT_RGTC1_SNORM ||
367 format == PIPE_FORMAT_LATC1_UNORM ||
368 format == PIPE_FORMAT_LATC1_SNORM;
369 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
370 format == PIPE_FORMAT_RGTC2_SNORM ||
371 format == PIPE_FORMAT_LATC2_UNORM ||
372 format == PIPE_FORMAT_LATC2_SNORM;
373 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
374 format == PIPE_FORMAT_R16G16_FLOAT ||
375 format == PIPE_FORMAT_A16_FLOAT ||
376 format == PIPE_FORMAT_L16_FLOAT ||
377 format == PIPE_FORMAT_L16A16_FLOAT ||
378 format == PIPE_FORMAT_I16_FLOAT;
379 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
380 format == PIPE_FORMAT_R16G16_FLOAT ||
381 format == PIPE_FORMAT_R16G16B16_FLOAT ||
382 format == PIPE_FORMAT_R16G16B16A16_FLOAT;
383
384 if (!util_format_is_supported(format, usage))
385 return FALSE;
386
387 /* Check multisampling support. */
388 switch (sample_count) {
389 case 0:
390 case 1:
391 break;
392 case 2:
393 case 3:
394 case 4:
395 case 6:
396 return FALSE;
397 #if 0
398 if (usage != PIPE_BIND_RENDER_TARGET ||
399 !util_format_is_rgba8_variant(
400 util_format_description(format))) {
401 return FALSE;
402 }
403 #endif
404 break;
405 default:
406 return FALSE;
407 }
408
409 /* Check sampler format support. */
410 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
411 /* ATI1N is r5xx-only. */
412 (is_r500 || !is_ati1n) &&
413 /* ATI2N is supported on r4xx-r5xx. */
414 (is_r400 || is_r500 || !is_ati2n) &&
415 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
416 (drm_2_8_0 || !is_x16f_xy16f) &&
417 r300_is_sampler_format_supported(format)) {
418 retval |= PIPE_BIND_SAMPLER_VIEW;
419 }
420
421 /* Check colorbuffer format support. */
422 if ((usage & (PIPE_BIND_RENDER_TARGET |
423 PIPE_BIND_DISPLAY_TARGET |
424 PIPE_BIND_SCANOUT |
425 PIPE_BIND_SHARED)) &&
426 /* 2101010 cannot be rendered to on non-r5xx. */
427 (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
428 r300_is_colorbuffer_format_supported(format)) {
429 retval |= usage &
430 (PIPE_BIND_RENDER_TARGET |
431 PIPE_BIND_DISPLAY_TARGET |
432 PIPE_BIND_SCANOUT |
433 PIPE_BIND_SHARED);
434 }
435
436 /* Check depth-stencil format support. */
437 if (usage & PIPE_BIND_DEPTH_STENCIL &&
438 r300_is_zs_format_supported(format)) {
439 retval |= PIPE_BIND_DEPTH_STENCIL;
440 }
441
442 /* Check vertex buffer format support. */
443 if (usage & PIPE_BIND_VERTEX_BUFFER) {
444 if (r300_screen(screen)->caps.has_tcl) {
445 /* Half float is supported on >= R400. */
446 if ((is_r400 || is_r500 || !is_half_float) &&
447 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
448 retval |= PIPE_BIND_VERTEX_BUFFER;
449 }
450 } else {
451 /* SW TCL */
452 if (!util_format_is_pure_integer(format)) {
453 retval |= PIPE_BIND_VERTEX_BUFFER;
454 }
455 }
456 }
457
458 /* Transfers are always supported. */
459 if (usage & PIPE_BIND_TRANSFER_READ)
460 retval |= PIPE_BIND_TRANSFER_READ;
461 if (usage & PIPE_BIND_TRANSFER_WRITE)
462 retval |= PIPE_BIND_TRANSFER_WRITE;
463
464 return retval == usage;
465 }
466
467 static void r300_destroy_screen(struct pipe_screen* pscreen)
468 {
469 struct r300_screen* r300screen = r300_screen(pscreen);
470 struct radeon_winsys *rws = radeon_winsys(pscreen);
471
472 if (rws)
473 rws->destroy(rws);
474
475 FREE(r300screen);
476 }
477
478 static void r300_fence_reference(struct pipe_screen *screen,
479 struct pipe_fence_handle **ptr,
480 struct pipe_fence_handle *fence)
481 {
482 pb_reference((struct pb_buffer**)ptr,
483 (struct pb_buffer*)fence);
484 }
485
486 static boolean r300_fence_signalled(struct pipe_screen *screen,
487 struct pipe_fence_handle *fence)
488 {
489 struct radeon_winsys *rws = r300_screen(screen)->rws;
490 struct pb_buffer *rfence = (struct pb_buffer*)fence;
491
492 return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE);
493 }
494
495 static boolean r300_fence_finish(struct pipe_screen *screen,
496 struct pipe_fence_handle *fence,
497 uint64_t timeout)
498 {
499 struct radeon_winsys *rws = r300_screen(screen)->rws;
500 struct pb_buffer *rfence = (struct pb_buffer*)fence;
501
502 if (timeout != PIPE_TIMEOUT_INFINITE) {
503 int64_t start_time = os_time_get();
504
505 /* Convert to microseconds. */
506 timeout /= 1000;
507
508 /* Wait in a loop. */
509 while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) {
510 if (os_time_get() - start_time >= timeout) {
511 return FALSE;
512 }
513 os_time_sleep(10);
514 }
515 return TRUE;
516 }
517
518 rws->buffer_wait(rfence, RADEON_USAGE_READWRITE);
519 return TRUE;
520 }
521
522 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
523 {
524 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
525
526 if (!r300screen) {
527 FREE(r300screen);
528 return NULL;
529 }
530
531 rws->query_info(rws, &r300screen->info);
532
533 r300_init_debug(r300screen);
534 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
535
536 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
537 r300screen->caps.zmask_ram = 0;
538 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
539 r300screen->caps.hiz_ram = 0;
540
541 if (r300screen->info.drm_minor < 8)
542 r300screen->caps.has_us_format = FALSE;
543
544 r300screen->rws = rws;
545 r300screen->screen.destroy = r300_destroy_screen;
546 r300screen->screen.get_name = r300_get_name;
547 r300screen->screen.get_vendor = r300_get_vendor;
548 r300screen->screen.get_param = r300_get_param;
549 r300screen->screen.get_shader_param = r300_get_shader_param;
550 r300screen->screen.get_paramf = r300_get_paramf;
551 r300screen->screen.get_video_param = r300_get_video_param;
552 r300screen->screen.is_format_supported = r300_is_format_supported;
553 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
554 r300screen->screen.context_create = r300_create_context;
555 r300screen->screen.fence_reference = r300_fence_reference;
556 r300screen->screen.fence_signalled = r300_fence_signalled;
557 r300screen->screen.fence_finish = r300_fence_finish;
558
559 r300_init_screen_resource_functions(r300screen);
560
561 util_format_s3tc_init();
562
563 return &r300screen->screen;
564 }